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sachin0x18 and mahavirj Exception handlers for LoadStoreError and LoadStoreAlignmentError
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
Latest commit 301dacf Feb 26, 2020

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include/freertos freertos: moved all xtensa specific files into a separated folder Jan 27, 2020
test Exception handlers for LoadStoreError and LoadStoreAlignmentError Feb 26, 2020
xtensa
CMakeLists.txt Exception handlers for LoadStoreError and LoadStoreAlignmentError Feb 26, 2020
FreeRTOS-openocd.c freertos: fix defining uxTopUsedPriority for esp32s2beta Oct 29, 2019
Kconfig freertos: Added experimental, optional FPU usage on level 1 ISR Jan 27, 2020
component.mk Exception handlers for LoadStoreError and LoadStoreAlignmentError Feb 26, 2020
croutine.c Add UNTESTED_FUNCTION() call to untested functions, make Kconfig opti… Sep 27, 2016
event_groups.c freertos: removed likely macros from non-port specifics parts of free… Jan 3, 2020
license.txt
linker.lf ldgen: update component linker fragment files Apr 4, 2019
list.c
queue.c freertos: removed likely macros from non-port specifics parts of free… Jan 3, 2020
sdkconfig.rename Rename Kconfig options (components/freertos) May 21, 2019
stdint.readme Initial public version Aug 17, 2016
tasks.c spin_lock: added new spinlock interface and decoupled it from RTOS Jan 21, 2020
timers.c
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