FAIL: wifi_prov_mgr example + addition of simple RMT led driver (GPIO2). Log debug_level=3 Open On-Chip Debugger v0.11.0-esp32-20211220 (2021-12-20-15:43) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html User : 13 7 options.c:63 configuration_output_handler(): debug_level: 3 User : 14 7 options.c:63 configuration_output_handler(): Debug: 15 7 configuration.c:42 add_script_search_dir(): adding C:\Users\Admin\.espressif\tools\openocd-esp32\v0.11.0-esp32-20211220\openocd-esp32\share/openocd/scripts Debug: 16 8 options.c:244 add_default_dirs(): bindir=/builds/idf/openocd-esp32/_build/../openocd-esp32/bin Debug: 17 8 options.c:245 add_default_dirs(): pkgdatadir=/builds/idf/openocd-esp32/_build/../openocd-esp32/share/openocd Debug: 18 8 options.c:246 add_default_dirs(): exepath=C:/Users/Admin/.espressif/tools/openocd-esp32/v0.11.0-esp32-20211220/openocd-esp32/bin Debug: 19 8 options.c:247 add_default_dirs(): bin2data=../share/openocd Debug: 20 9 configuration.c:42 add_script_search_dir(): adding C:/Users/Admin/AppData/Roaming/OpenOCD Debug: 21 9 configuration.c:42 add_script_search_dir(): adding C:/Users/Admin/.espressif/tools/openocd-esp32/v0.11.0-esp32-20211220/openocd-esp32/bin/../share/openocd/site Debug: 22 9 configuration.c:42 add_script_search_dir(): adding C:/Users/Admin/.espressif/tools/openocd-esp32/v0.11.0-esp32-20211220/openocd-esp32/bin/../share/openocd/scripts User : 23 10 options.c:63 configuration_output_handler(): 3.3User : 24 10 options.c:63 configuration_output_handler(): Debug: 25 11 configuration.c:97 find_file(): found C:\Users\Admin\.espressif\tools\openocd-esp32\v0.11.0-esp32-20211220\openocd-esp32\share/openocd/scripts/interface/ftdi/esp32_devkitj_v1.cfg Debug: 26 17 command.c:146 script_debug(): command - adapter driver ftdi Debug: 28 17 command.c:146 script_debug(): command - ftdi_vid_pid 0x0403 0x6010 0x0403 0x6014 Debug: 30 17 command.c:146 script_debug(): command - ftdi_channel 0 Debug: 32 17 command.c:146 script_debug(): command - ftdi_layout_init 0x0008 0xf00b Debug: 34 18 command.c:146 script_debug(): command - ftdi_layout_signal LED -data 0x1000 Debug: 36 18 command.c:146 script_debug(): command - ftdi_layout_signal LED2 -data 0x2000 Debug: 38 18 command.c:146 script_debug(): command - ftdi_layout_signal LED3 -data 0x4000 Debug: 40 19 command.c:146 script_debug(): command - ftdi_layout_signal LED4 -data 0x8000 Debug: 42 19 command.c:146 script_debug(): command - reset_config none Debug: 44 19 command.c:146 script_debug(): command - adapter speed 20000 Debug: 46 19 core.c:1822 jtag_config_khz(): handle jtag khz Debug: 47 20 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value Debug: 48 20 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value User : 49 20 options.c:63 configuration_output_handler(): adapter speed: 20000 kHz User : 50 20 options.c:63 configuration_output_handler(): Debug: 51 21 configuration.c:97 find_file(): found C:\Users\Admin\.espressif\tools\openocd-esp32\v0.11.0-esp32-20211220\openocd-esp32\share/openocd/scripts/target/esp32.cfg Debug: 52 22 command.c:146 script_debug(): command - transport select jtag Debug: 53 23 configuration.c:97 find_file(): found C:\Users\Admin\.espressif\tools\openocd-esp32\v0.11.0-esp32-20211220\openocd-esp32\share/openocd/scripts/target/esp_common.cfg Debug: 54 24 command.c:146 script_debug(): command - add_help_text program_esp write an image to flash, address is only required for binary images. verify, reset, exit, compress, restore_clock are optional Debug: 56 24 command.c:1115 help_add_command(): added 'program_esp' help text Debug: 57 25 command.c:146 script_debug(): command - add_usage_text program_esp [address] [verify] [reset] [exit] [compress] [restore_clock] Debug: 59 25 command.c:1141 help_add_command(): added 'program_esp' usage text Debug: 60 25 command.c:146 script_debug(): command - add_help_text program_esp_bins write all the images at address specified in flasher_args.json generated while building idf project Debug: 62 26 command.c:1115 help_add_command(): added 'program_esp_bins' help text Debug: 63 26 command.c:146 script_debug(): command - add_usage_text program_esp_bins flasher_args.json [verify] [reset] [exit] [compress] [restore_clock] Debug: 65 27 command.c:1141 help_add_command(): added 'program_esp_bins' usage text Debug: 66 27 command.c:146 script_debug(): command - add_help_text esp_get_mac Print MAC address of the chip. Use a `format` argument to return formatted MAC value Debug: 68 28 command.c:1115 help_add_command(): added 'esp_get_mac' help text Debug: 69 28 command.c:146 script_debug(): command - add_usage_text esp_get_mac [format] Debug: 71 29 command.c:1141 help_add_command(): added 'esp_get_mac' usage text Debug: 72 29 command.c:146 script_debug(): command - jtag newtap esp32 cpu0 -irlen 5 -expected-id 0x120034e5 Debug: 73 30 tcl.c:572 jim_newtap_cmd(): Creating New Tap, Chip: esp32, Tap: cpu0, Dotted: esp32.cpu0, 4 params Debug: 74 30 tcl.c:596 jim_newtap_cmd(): Processing option: -irlen Debug: 75 30 tcl.c:596 jim_newtap_cmd(): Processing option: -expected-id Debug: 76 30 core.c:1488 jtag_tap_init(): Created Tap: esp32.cpu0 @ abs position 0, irlen 5, capture: 0x1 mask: 0x3 Debug: 77 31 command.c:146 script_debug(): command - jtag newtap esp32 cpu1 -irlen 5 -expected-id 0x120034e5 Debug: 78 31 tcl.c:572 jim_newtap_cmd(): Creating New Tap, Chip: esp32, Tap: cpu1, Dotted: esp32.cpu1, 4 params Debug: 79 32 tcl.c:596 jim_newtap_cmd(): Processing option: -irlen Debug: 80 32 tcl.c:596 jim_newtap_cmd(): Processing option: -expected-id Debug: 81 32 core.c:1488 jtag_tap_init(): Created Tap: esp32.cpu1 @ abs position 1, irlen 5, capture: 0x1 mask: 0x3 Debug: 82 33 command.c:146 script_debug(): command - target create esp32.cpu0 esp32 -endian little -chain-position esp32.cpu0 -coreid 0 -rtos FreeRTOS Debug: 83 33 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 84 33 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 85 34 FreeRTOS.c:1242 FreeRTOS_create(): FreeRTOS_create Debug: 86 34 command.c:376 register_command(): command 'esp' is already registered in '' context Debug: 87 34 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 88 35 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 89 35 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 90 36 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 91 36 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 92 36 command.c:376 register_command(): command 'flashbootstrap' is already registered in 'esp32' context Debug: 93 37 command.c:376 register_command(): command 'esp' is already registered in 'esp32.cpu0' context Debug: 94 38 command.c:376 register_command(): command 'esp32' is already registered in 'esp32.cpu0' context Debug: 95 38 command.c:376 register_command(): command 'esp32' is already registered in 'esp32.cpu0' context Debug: 96 39 command.c:376 register_command(): command 'esp32' is already registered in 'esp32.cpu0' context Debug: 97 39 command.c:376 register_command(): command 'esp32' is already registered in 'esp32.cpu0' context Debug: 98 40 command.c:376 register_command(): command 'esp32' is already registered in 'esp32.cpu0' context Debug: 99 40 command.c:376 register_command(): command 'flashbootstrap' is already registered in 'esp32' context Debug: 100 41 command.c:146 script_debug(): command - esp32.cpu0 configure -work-area-phys 0x40090000 -work-area-virt 0x40090000 -work-area-size 0x4000 -work-area-backup 1 Debug: 101 42 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 102 42 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 103 43 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 104 43 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 105 43 command.c:146 script_debug(): command - esp32.cpu0 configure -alt-work-area-phys 0x3FFC0000 -alt-work-area-virt 0x3FFC0000 -alt-work-area-size 0x18000 -alt-work-area-backup 1 Debug: 106 44 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 107 45 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 108 45 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 109 45 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 110 46 command.c:146 script_debug(): command - flash bank esp32.cpu0.flash esp32 0x0 0 0 0 esp32.cpu0 Debug: 112 46 command.c:376 register_command(): command 'esp' is already registered in '' context Debug: 113 47 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 114 47 tcl.c:1319 handle_flash_bank_command(): 'esp32' driver usage field missing Debug: 115 48 command.c:146 script_debug(): command - flash bank esp32.cpu0.irom esp32 0x0 0 0 0 esp32.cpu0 Debug: 117 48 command.c:376 register_command(): command 'esp' is already registered in '' context Debug: 118 49 command.c:376 register_command(): command 'appimage_offset' is already registered in 'esp' context Debug: 119 49 command.c:376 register_command(): command 'compression' is already registered in 'esp' context Debug: 120 50 command.c:376 register_command(): command 'verify_bank_hash' is already registered in 'esp' context Debug: 121 50 command.c:376 register_command(): command 'flash_stub_clock_boost' is already registered in 'esp' context Debug: 122 51 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 123 51 command.c:376 register_command(): command 'appimage_offset' is already registered in 'esp32' context Debug: 124 51 command.c:376 register_command(): command 'compression' is already registered in 'esp32' context Debug: 125 52 command.c:376 register_command(): command 'verify_bank_hash' is already registered in 'esp32' context Debug: 126 52 command.c:376 register_command(): command 'flash_stub_clock_boost' is already registered in 'esp32' context Debug: 127 53 tcl.c:1319 handle_flash_bank_command(): 'esp32' driver usage field missing Debug: 128 53 command.c:146 script_debug(): command - flash bank esp32.cpu0.drom esp32 0x0 0 0 0 esp32.cpu0 Debug: 130 54 command.c:376 register_command(): command 'esp' is already registered in '' context Debug: 131 54 command.c:376 register_command(): command 'appimage_offset' is already registered in 'esp' context Debug: 132 55 command.c:376 register_command(): command 'compression' is already registered in 'esp' context Debug: 133 55 command.c:376 register_command(): command 'verify_bank_hash' is already registered in 'esp' context Debug: 134 56 command.c:376 register_command(): command 'flash_stub_clock_boost' is already registered in 'esp' context Debug: 135 56 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 136 57 command.c:376 register_command(): command 'appimage_offset' is already registered in 'esp32' context Debug: 137 57 command.c:376 register_command(): command 'compression' is already registered in 'esp32' context Debug: 138 58 command.c:376 register_command(): command 'verify_bank_hash' is already registered in 'esp32' context Debug: 139 58 command.c:376 register_command(): command 'flash_stub_clock_boost' is already registered in 'esp32' context Debug: 140 59 tcl.c:1319 handle_flash_bank_command(): 'esp32' driver usage field missing Debug: 141 59 command.c:146 script_debug(): command - target create esp32.cpu1 esp32 -endian little -chain-position esp32.cpu1 -coreid 1 -rtos FreeRTOS Debug: 142 60 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 143 60 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 144 61 FreeRTOS.c:1242 FreeRTOS_create(): FreeRTOS_create Debug: 145 61 command.c:376 register_command(): command 'xtensa' is already registered in '' context Debug: 146 62 command.c:376 register_command(): command 'set_permissive' is already registered in 'xtensa' context Debug: 147 62 command.c:376 register_command(): command 'maskisr' is already registered in 'xtensa' context Debug: 148 63 command.c:376 register_command(): command 'smpbreak' is already registered in 'xtensa' context Debug: 149 63 command.c:376 register_command(): command 'perfmon_enable' is already registered in 'xtensa' context Debug: 150 63 command.c:376 register_command(): command 'perfmon_dump' is already registered in 'xtensa' context Debug: 151 64 command.c:376 register_command(): command 'tracestart' is already registered in 'xtensa' context Debug: 152 64 command.c:376 register_command(): command 'tracestop' is already registered in 'xtensa' context Debug: 153 64 command.c:376 register_command(): command 'tracedump' is already registered in 'xtensa' context Debug: 154 65 command.c:376 register_command(): command 'esp' is already registered in '' context Debug: 155 65 command.c:376 register_command(): command 'semihost_basedir' is already registered in 'esp' context Debug: 156 66 command.c:376 register_command(): command 'esp' is already registered in '' context Debug: 157 66 command.c:376 register_command(): command 'apptrace' is already registered in 'esp' context Debug: 158 66 command.c:376 register_command(): command 'sysview' is already registered in 'esp' context Debug: 159 67 command.c:376 register_command(): command 'sysview_mcore' is already registered in 'esp' context Debug: 160 67 command.c:376 register_command(): command 'gcov' is already registered in 'esp' context Debug: 161 68 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 162 68 command.c:376 register_command(): command 'smp' is already registered in 'esp32' context Debug: 163 68 command.c:376 register_command(): command 'smp_on' is already registered in 'esp32' context Debug: 164 69 command.c:376 register_command(): command 'smp_off' is already registered in 'esp32' context Debug: 165 69 command.c:376 register_command(): command 'smp_gdb' is already registered in 'esp32' context Debug: 166 70 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 167 70 command.c:376 register_command(): command 'flashbootstrap' is already registered in 'esp32' context Debug: 168 70 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 169 71 command.c:376 register_command(): command 'set_permissive' is already registered in 'esp32' context Debug: 170 71 command.c:376 register_command(): command 'maskisr' is already registered in 'esp32' context Debug: 171 71 command.c:376 register_command(): command 'smpbreak' is already registered in 'esp32' context Debug: 172 72 command.c:376 register_command(): command 'perfmon_enable' is already registered in 'esp32' context Debug: 173 72 command.c:376 register_command(): command 'perfmon_dump' is already registered in 'esp32' context Debug: 174 73 command.c:376 register_command(): command 'tracestart' is already registered in 'esp32' context Debug: 175 73 command.c:376 register_command(): command 'tracestop' is already registered in 'esp32' context Debug: 176 74 command.c:376 register_command(): command 'tracedump' is already registered in 'esp32' context Debug: 177 74 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 178 74 command.c:376 register_command(): command 'semihost_basedir' is already registered in 'esp32' context Debug: 179 75 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 180 75 command.c:376 register_command(): command 'apptrace' is already registered in 'esp32' context Debug: 181 76 command.c:376 register_command(): command 'sysview' is already registered in 'esp32' context Debug: 182 76 command.c:376 register_command(): command 'sysview_mcore' is already registered in 'esp32' context Debug: 183 76 command.c:376 register_command(): command 'gcov' is already registered in 'esp32' context Debug: 184 77 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 185 77 command.c:376 register_command(): command 'flashbootstrap' is already registered in 'esp32' context Debug: 186 78 command.c:376 register_command(): command 'esp' is already registered in 'esp32.cpu1' context Debug: 187 78 command.c:376 register_command(): command 'esp32' is already registered in 'esp32.cpu1' context Debug: 188 79 command.c:376 register_command(): command 'esp32' is already registered in 'esp32.cpu1' context Debug: 189 79 command.c:376 register_command(): command 'esp32' is already registered in 'esp32.cpu1' context Debug: 190 80 command.c:376 register_command(): command 'esp32' is already registered in 'esp32.cpu1' context Debug: 191 80 command.c:376 register_command(): command 'esp32' is already registered in 'esp32.cpu1' context Debug: 192 81 command.c:376 register_command(): command 'flashbootstrap' is already registered in 'esp32' context Debug: 193 81 command.c:146 script_debug(): command - flash bank esp32.cpu1.flash esp32 0x0 0 0 0 esp32.cpu1 Debug: 195 82 command.c:376 register_command(): command 'esp' is already registered in '' context Debug: 196 82 command.c:376 register_command(): command 'appimage_offset' is already registered in 'esp' context Debug: 197 83 command.c:376 register_command(): command 'compression' is already registered in 'esp' context Debug: 198 83 command.c:376 register_command(): command 'verify_bank_hash' is already registered in 'esp' context Debug: 199 84 command.c:376 register_command(): command 'flash_stub_clock_boost' is already registered in 'esp' context Debug: 200 84 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 201 85 command.c:376 register_command(): command 'appimage_offset' is already registered in 'esp32' context Debug: 202 85 command.c:376 register_command(): command 'compression' is already registered in 'esp32' context Debug: 203 86 command.c:376 register_command(): command 'verify_bank_hash' is already registered in 'esp32' context Debug: 204 86 command.c:376 register_command(): command 'flash_stub_clock_boost' is already registered in 'esp32' context Debug: 205 87 tcl.c:1319 handle_flash_bank_command(): 'esp32' driver usage field missing Debug: 206 87 command.c:146 script_debug(): command - flash bank esp32.cpu1.irom esp32 0x0 0 0 0 esp32.cpu1 Debug: 208 88 command.c:376 register_command(): command 'esp' is already registered in '' context Debug: 209 88 command.c:376 register_command(): command 'appimage_offset' is already registered in 'esp' context Debug: 210 89 command.c:376 register_command(): command 'compression' is already registered in 'esp' context Debug: 211 89 command.c:376 register_command(): command 'verify_bank_hash' is already registered in 'esp' context Debug: 212 89 command.c:376 register_command(): command 'flash_stub_clock_boost' is already registered in 'esp' context Debug: 213 90 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 214 90 command.c:376 register_command(): command 'appimage_offset' is already registered in 'esp32' context Debug: 215 90 command.c:376 register_command(): command 'compression' is already registered in 'esp32' context Debug: 216 91 command.c:376 register_command(): command 'verify_bank_hash' is already registered in 'esp32' context Debug: 217 91 command.c:376 register_command(): command 'flash_stub_clock_boost' is already registered in 'esp32' context Debug: 218 92 tcl.c:1319 handle_flash_bank_command(): 'esp32' driver usage field missing Debug: 219 92 command.c:146 script_debug(): command - flash bank esp32.cpu1.drom esp32 0x0 0 0 0 esp32.cpu1 Debug: 221 92 command.c:376 register_command(): command 'esp' is already registered in '' context Debug: 222 93 command.c:376 register_command(): command 'appimage_offset' is already registered in 'esp' context Debug: 223 93 command.c:376 register_command(): command 'compression' is already registered in 'esp' context Debug: 224 93 command.c:376 register_command(): command 'verify_bank_hash' is already registered in 'esp' context Debug: 225 94 command.c:376 register_command(): command 'flash_stub_clock_boost' is already registered in 'esp' context Debug: 226 94 command.c:376 register_command(): command 'esp32' is already registered in '' context Debug: 227 95 command.c:376 register_command(): command 'appimage_offset' is already registered in 'esp32' context Debug: 228 95 command.c:376 register_command(): command 'compression' is already registered in 'esp32' context Debug: 229 96 command.c:376 register_command(): command 'verify_bank_hash' is already registered in 'esp32' context Debug: 230 96 command.c:376 register_command(): command 'flash_stub_clock_boost' is already registered in 'esp32' context Debug: 231 97 tcl.c:1319 handle_flash_bank_command(): 'esp32' driver usage field missing Debug: 232 97 command.c:146 script_debug(): command - target smp esp32.cpu0 esp32.cpu1 Debug: 233 98 target.c:6062 jim_target_smp(): 3 Debug: 234 98 target.c:6072 jim_target_smp(): esp32.cpu0 Debug: 235 98 target.c:6072 jim_target_smp(): esp32.cpu1 Debug: 236 98 command.c:146 script_debug(): command - esp32.cpu0 esp32 flashbootstrap 3.3 Debug: 238 99 command.c:146 script_debug(): command - esp32.cpu0 xtensa maskisr on Debug: 240 99 command.c:146 script_debug(): command - esp32.cpu0 xtensa smpbreak BreakIn BreakOut Debug: 242 99 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=30000, state=1 Debug: 243 100 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu1: set smpbreak=30000, state=1 Debug: 244 100 command.c:146 script_debug(): command - esp32.cpu0 esp semihost_basedir . Debug: 246 100 command.c:146 script_debug(): command - esp32.cpu0 configure -event gdb-attach $_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut # necessary to auto-probe flash bank when GDB is connected halt Debug: 247 102 command.c:146 script_debug(): command - esp32.cpu1 configure -event gdb-attach $_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut # necessary to auto-probe flash bank when GDB is connected halt Debug: 248 103 command.c:146 script_debug(): command - add_help_text program_esp32 write an image to flash, address is only required for binary images. verify, reset, exit are optional Debug: 250 104 command.c:1115 help_add_command(): added 'program_esp32' help text Debug: 251 104 command.c:146 script_debug(): command - add_usage_text program_esp32 [address] [verify] [reset] [exit] Debug: 253 104 command.c:1141 help_add_command(): added 'program_esp32' usage text Debug: 254 105 command.c:146 script_debug(): command - echo Flashing C:/Users/Admin/eclipse-workspace/wifi_prov_mgr/build/partition_table/partition-table.bin at 0x8000 User : 256 106 command.c:769 jim_echo(): Flashing C:/Users/Admin/eclipse-workspace/wifi_prov_mgr/build/partition_table/partition-table.bin at 0x8000 Debug: 257 107 command.c:146 script_debug(): command - flash list Debug: 258 107 command.c:146 script_debug(): command - init Debug: 260 107 command.c:146 script_debug(): command - target init Debug: 262 108 command.c:146 script_debug(): command - target names Debug: 263 108 command.c:146 script_debug(): command - esp32.cpu0 cget -event gdb-flash-erase-start Debug: 264 109 command.c:146 script_debug(): command - esp32.cpu0 configure -event gdb-flash-erase-start reset init Debug: 265 109 command.c:146 script_debug(): command - esp32.cpu0 cget -event gdb-flash-write-end Debug: 266 110 command.c:146 script_debug(): command - esp32.cpu0 configure -event gdb-flash-write-end reset halt Debug: 267 110 command.c:146 script_debug(): command - esp32.cpu0 cget -event gdb-attach Debug: 268 110 command.c:146 script_debug(): command - esp32.cpu1 cget -event gdb-flash-erase-start Debug: 269 111 command.c:146 script_debug(): command - esp32.cpu1 configure -event gdb-flash-erase-start reset init Debug: 270 111 command.c:146 script_debug(): command - esp32.cpu1 cget -event gdb-flash-write-end Debug: 271 112 command.c:146 script_debug(): command - esp32.cpu1 configure -event gdb-flash-write-end reset halt Debug: 272 112 command.c:146 script_debug(): command - esp32.cpu1 cget -event gdb-attach Debug: 273 113 target.c:1661 handle_target_init_command(): Initializing targets... Debug: 274 113 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'litbase' (152) does not exist Debug: 275 113 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'ptevaddr' (153) does not exist Debug: 276 114 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'rasid' (154) does not exist Debug: 277 114 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'itlbcfg' (155) does not exist Debug: 278 115 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'dtlbcfg' (156) does not exist Debug: 279 115 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'mepc' (157) does not exist Debug: 280 115 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'meps' (158) does not exist Debug: 281 116 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'mesave' (159) does not exist Debug: 282 116 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'mesr' (160) does not exist Debug: 283 117 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'mecr' (161) does not exist Debug: 284 117 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'mevaddr' (162) does not exist Debug: 285 118 semihosting_common.c:100 semihosting_common_init(): Debug: 286 118 semihosting_common.c:100 semihosting_common_init(): Debug: 287 118 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'litbase' (152) does not exist Debug: 288 119 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'ptevaddr' (153) does not exist Debug: 289 119 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'rasid' (154) does not exist Debug: 290 120 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'itlbcfg' (155) does not exist Debug: 291 120 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'dtlbcfg' (156) does not exist Debug: 292 120 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'mepc' (157) does not exist Debug: 293 121 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'meps' (158) does not exist Debug: 294 121 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'mesave' (159) does not exist Debug: 295 122 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'mesr' (160) does not exist Debug: 296 122 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'mecr' (161) does not exist Debug: 297 122 xtensa.c:2379 xtensa_build_reg_cache(): Special reg 'mevaddr' (162) does not exist Debug: 298 123 semihosting_common.c:100 semihosting_common_init(): Debug: 299 123 semihosting_common.c:100 semihosting_common_init(): Debug: 300 123 ftdi.c:650 ftdi_initialize(): ftdi interface using shortest path jtag state transitions Debug: 301 174 mpsse.c:422 mpsse_purge(): - Debug: 302 175 mpsse.c:703 mpsse_loopback_config(): off Debug: 303 176 mpsse.c:748 mpsse_set_frequency(): target 20000000 Hz Debug: 304 176 mpsse.c:740 mpsse_rtck_config(): off Debug: 305 176 mpsse.c:729 mpsse_divide_by_5_config(): off Debug: 306 176 mpsse.c:709 mpsse_set_divisor(): 1 Debug: 307 176 mpsse.c:772 mpsse_set_frequency(): actually 15000000 Hz Debug: 308 177 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value Debug: 309 177 core.c:1789 adapter_khz_to_speed(): have interface set up Debug: 310 178 mpsse.c:748 mpsse_set_frequency(): target 20000000 Hz Debug: 311 178 mpsse.c:740 mpsse_rtck_config(): off Debug: 312 178 mpsse.c:729 mpsse_divide_by_5_config(): off Debug: 313 178 mpsse.c:709 mpsse_set_divisor(): 1 Debug: 314 178 mpsse.c:772 mpsse_set_frequency(): actually 15000000 Hz Info : 315 179 ftdi.c:291 ftdi_speed(): ftdi: if you experience problems at higher adapter clocks, try the command "ftdi_tdo_sample_edge falling" Debug: 316 179 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value Debug: 317 179 core.c:1789 adapter_khz_to_speed(): have interface set up Info : 318 180 core.c:1565 adapter_init(): clock speed 20000 kHz Debug: 319 180 openocd.c:143 handle_init_command(): Debug Adapter init complete Debug: 320 180 command.c:146 script_debug(): command - transport init Debug: 322 180 transport.c:229 handle_transport_init(): handle_transport_init Debug: 323 181 core.c:830 jtag_add_reset(): SRST line released Debug: 324 182 core.c:855 jtag_add_reset(): TRST line released Debug: 325 182 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 326 183 command.c:146 script_debug(): command - jtag arp_init Debug: 327 183 core.c:1578 jtag_init_inner(): Init JTAG chain Debug: 328 183 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 329 184 core.c:1243 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS Debug: 330 184 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset Info : 331 185 core.c:1142 jtag_examine_chain_display(): JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : 332 186 core.c:1142 jtag_examine_chain_display(): JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Debug: 333 186 core.c:1374 jtag_validate_ircapture(): IR capture validation scan Debug: 334 187 core.c:1432 jtag_validate_ircapture(): esp32.cpu0: IR capture 0x01 Debug: 335 187 core.c:1432 jtag_validate_ircapture(): esp32.cpu1: IR capture 0x01 Debug: 336 188 command.c:146 script_debug(): command - dap init Debug: 338 188 arm_dap.c:106 dap_init_all(): Initializing all DAPs ... Debug: 339 188 openocd.c:160 handle_init_command(): Examining targets... Debug: 340 189 target.c:1849 target_call_event_callbacks(): target event 19 (examine-start) for core esp32.cpu0 Debug: 341 189 esp32.c:523 esp32_handle_target_event(): 19 Debug: 342 189 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 19 Debug: 343 190 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 19 Debug: 344 190 xtensa.c:2447 xtensa_handle_target_event(): 19 Debug: 345 190 xtensa.c:685 xtensa_examine(): xtensa_examine coreid=0 Debug: 346 191 xtensa.c:698 xtensa_examine(): OCD_ID = 0733bff2 Debug: 347 191 target.c:1849 target_call_event_callbacks(): target event 21 (examine-end) for core esp32.cpu0 Debug: 348 192 esp32.c:523 esp32_handle_target_event(): 21 Debug: 349 192 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 21 Debug: 350 192 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 21 Debug: 351 192 xtensa.c:2447 xtensa_handle_target_event(): 21 Debug: 352 193 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x30000 clear=0x600000 Debug: 353 193 target.c:1849 target_call_event_callbacks(): target event 19 (examine-start) for core esp32.cpu1 Debug: 354 194 esp32.c:523 esp32_handle_target_event(): 19 Debug: 355 194 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 19 Debug: 356 194 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 19 Debug: 357 194 xtensa.c:2447 xtensa_handle_target_event(): 19 Debug: 358 195 xtensa.c:685 xtensa_examine(): xtensa_examine coreid=1 Debug: 359 196 xtensa.c:698 xtensa_examine(): OCD_ID = 0733bff2 Debug: 360 196 target.c:1849 target_call_event_callbacks(): target event 21 (examine-end) for core esp32.cpu1 Debug: 361 196 esp32.c:523 esp32_handle_target_event(): 21 Debug: 362 197 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 21 Debug: 363 197 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 21 Debug: 364 197 xtensa.c:2447 xtensa_handle_target_event(): 21 Debug: 365 197 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu1: write smpbreak set=0x30000 clear=0x600000 Debug: 366 198 command.c:146 script_debug(): command - flash init Debug: 367 201 esp_xtensa_smp.c:174 esp_xtensa_smp_poll(): esp32.cpu0: Check for unexamined cores after reset Debug: 368 203 esp_xtensa_smp.c:174 esp_xtensa_smp_poll(): esp32.cpu1: Check for unexamined cores after reset Debug: 370 203 tcl.c:1385 handle_flash_init_command(): Initializing flash devices... Debug: 371 204 command.c:146 script_debug(): command - nand init Debug: 373 208 tcl.c:498 handle_nand_init_command(): Initializing NAND devices... Debug: 374 208 command.c:146 script_debug(): command - pld init Debug: 376 214 pld.c:206 handle_pld_init_command(): Initializing PLDs... Info : 377 215 gdb_server.c:3512 gdb_target_start(): starting gdb server for esp32.cpu0 on 3333 Info : 378 217 server.c:312 add_service(): Listening on port 3333 for gdb connections Debug: 379 217 command.c:146 script_debug(): command - reset init Debug: 381 227 target.c:1867 target_call_reset_callbacks(): target reset 3 (init) Debug: 382 228 target.c:1867 target_call_reset_callbacks(): target reset 3 (init) Debug: 383 228 command.c:146 script_debug(): command - target names Debug: 384 228 command.c:146 script_debug(): command - esp32.cpu0 invoke-event reset-start Debug: 385 228 command.c:146 script_debug(): command - esp32.cpu1 invoke-event reset-start Debug: 386 229 command.c:146 script_debug(): command - transport select Debug: 387 229 command.c:146 script_debug(): command - jtag arp_init-reset Debug: 388 229 core.c:1694 jtag_init_reset(): Initializing with hard TRST+SRST reset Debug: 389 230 core.c:843 jtag_add_reset(): JTAG reset with TLR instead of TRST Debug: 390 230 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 391 231 core.c:1578 jtag_init_inner(): Init JTAG chain Debug: 392 231 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 393 232 core.c:1243 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS Debug: 394 232 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset Info : 395 233 core.c:1142 jtag_examine_chain_display(): JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : 396 233 core.c:1142 jtag_examine_chain_display(): JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Debug: 397 234 core.c:1374 jtag_validate_ircapture(): IR capture validation scan Debug: 398 234 core.c:1432 jtag_validate_ircapture(): esp32.cpu0: IR capture 0x01 Debug: 399 235 core.c:1432 jtag_validate_ircapture(): esp32.cpu1: IR capture 0x01 Debug: 400 235 command.c:146 script_debug(): command - transport select Debug: 401 235 command.c:146 script_debug(): command - esp32.cpu0 cget -chain-position Debug: 402 235 command.c:146 script_debug(): command - jtag tapisenabled esp32.cpu0 Debug: 403 236 command.c:146 script_debug(): command - esp32.cpu0 invoke-event examine-start Debug: 404 236 command.c:146 script_debug(): command - esp32.cpu0 arp_examine allow-defer Debug: 405 236 xtensa.c:685 xtensa_examine(): xtensa_examine coreid=0 Debug: 406 237 xtensa.c:698 xtensa_examine(): OCD_ID = 0733bff2 Debug: 407 238 command.c:146 script_debug(): command - esp32.cpu0 invoke-event examine-end Debug: 408 238 command.c:146 script_debug(): command - transport select Debug: 409 238 command.c:146 script_debug(): command - esp32.cpu1 cget -chain-position Debug: 410 238 command.c:146 script_debug(): command - jtag tapisenabled esp32.cpu1 Debug: 411 239 command.c:146 script_debug(): command - esp32.cpu1 invoke-event examine-start Debug: 412 239 command.c:146 script_debug(): command - esp32.cpu1 arp_examine allow-defer Debug: 413 239 xtensa.c:685 xtensa_examine(): xtensa_examine coreid=1 Debug: 414 241 xtensa.c:698 xtensa_examine(): OCD_ID = 0733bff2 Debug: 415 241 command.c:146 script_debug(): command - esp32.cpu1 invoke-event examine-end Debug: 416 241 command.c:146 script_debug(): command - esp32.cpu0 invoke-event reset-assert-pre Debug: 417 241 command.c:146 script_debug(): command - esp32.cpu1 invoke-event reset-assert-pre Debug: 418 242 command.c:146 script_debug(): command - transport select Debug: 419 242 command.c:146 script_debug(): command - esp32.cpu0 cget -chain-position Debug: 420 242 command.c:146 script_debug(): command - jtag tapisenabled esp32.cpu0 Debug: 421 243 command.c:146 script_debug(): command - esp32.cpu0 arp_reset assert 1 Debug: 422 243 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 423 243 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 424 243 esp_xtensa_smp.c:82 esp_xtensa_smp_assert_reset(): esp32.cpu0: begin Debug: 425 244 esp32.c:305 esp32_soc_reset(): start Debug: 426 244 esp32.c:308 esp32_soc_reset(): Target not halted before SoC reset, trying to halt it first Debug: 427 244 xtensa.c:1133 xtensa_halt(): xtensa_halt, target: esp32.cpu0 Debug: 428 245 xtensa.c:1145 xtensa_halt(): esp32.cpu0: Core status 0x8000cc01 Debug: 429 247 xtensa.c:890 xtensa_fetch_all_regs(): esp32.cpu0: start Debug: 430 250 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8031CC11) Debug: 431 254 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8031CC11) Debug: 432 256 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8031CC11) Debug: 433 256 xtensa.c:1858 xtensa_poll(): esp32.cpu0: Target halted, pc=0x40173A32, debug_reason=00000000, oldstate=00000001 Debug: 434 256 xtensa.c:1863 xtensa_poll(): esp32.cpu0: Halt reason=0x00000020, exc_cause=4, dsr=0x8031cc11 Info : 435 257 xtensa.c:1866 xtensa_poll(): esp32.cpu0: Target halted, PC=0x40173A32, debug_reason=00000000 Debug: 436 258 esp_xtensa_smp.c:257 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Info : 437 258 esp_xtensa_smp.c:262 esp_xtensa_smp_update_halt_gdb(): Set GDB target to 'esp32.cpu0' Debug: 438 259 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 439 259 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 440 259 esp_xtensa_smp.c:285 esp_xtensa_smp_update_halt_gdb(): Poll target 'esp32.cpu1' Debug: 441 262 xtensa.c:890 xtensa_fetch_all_regs(): esp32.cpu1: start Debug: 442 265 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (80908411) Debug: 443 269 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (80908411) Debug: 444 270 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (80908411) Debug: 445 271 xtensa.c:1858 xtensa_poll(): esp32.cpu1: Target halted, pc=0x40173A32, debug_reason=00000000, oldstate=00000001 Debug: 446 271 xtensa.c:1863 xtensa_poll(): esp32.cpu1: Halt reason=0x00000020, exc_cause=4, dsr=0x80908411 Info : 447 271 xtensa.c:1866 xtensa_poll(): esp32.cpu1: Target halted, PC=0x40173A32, debug_reason=00000000 Debug: 448 273 target.c:1849 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32.cpu1 Debug: 449 273 esp32.c:523 esp32_handle_target_event(): 0 Debug: 450 273 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 0 Debug: 451 273 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 0 Debug: 452 274 xtensa.c:2447 xtensa_handle_target_event(): 0 Debug: 453 274 target.c:1849 target_call_event_callbacks(): target event 1 (halted) for core esp32.cpu1 Debug: 454 274 esp32.c:523 esp32_handle_target_event(): 1 Debug: 455 274 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 1 Debug: 456 274 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 1 Debug: 457 275 xtensa.c:2447 xtensa_handle_target_event(): 1 Debug: 458 275 target.c:2742 target_write_u32(): address: 0x3ff5f064, value: 0x50d83aa1 Debug: 459 276 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (8080CC11) Debug: 460 276 target.c:2742 target_write_u32(): address: 0x3ff5f048, value: 0x00000000 Debug: 461 278 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (8080CC11) Debug: 462 279 target.c:2742 target_write_u32(): address: 0x3ff60064, value: 0x50d83aa1 Debug: 463 280 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (8080CC11) Debug: 464 280 target.c:2742 target_write_u32(): address: 0x3ff60048, value: 0x00000000 Debug: 465 282 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (8080CC11) Debug: 466 282 target.c:2742 target_write_u32(): address: 0x3ff480a4, value: 0x50d83aa1 Debug: 467 283 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (8080CC11) Debug: 468 283 target.c:2742 target_write_u32(): address: 0x3ff4808c, value: 0x00000000 Debug: 469 284 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (8080CC11) Debug: 470 285 esp_xtensa_smp.c:314 esp_xtensa_smp_update_halt_gdb(): exit Debug: 471 285 target.c:1849 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32.cpu0 Debug: 472 285 esp32.c:523 esp32_handle_target_event(): 0 Debug: 473 286 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 0 Debug: 474 286 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 0 Debug: 475 286 xtensa.c:2447 xtensa_handle_target_event(): 0 Debug: 476 286 target.c:1849 target_call_event_callbacks(): target event 1 (halted) for core esp32.cpu0 Debug: 477 287 esp32.c:523 esp32_handle_target_event(): 1 Debug: 478 287 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 1 Debug: 479 287 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 1 Debug: 480 287 xtensa.c:2447 xtensa_handle_target_event(): 1 Debug: 481 287 target.c:2742 target_write_u32(): address: 0x3ff5f064, value: 0x50d83aa1 Debug: 482 288 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 483 289 target.c:2742 target_write_u32(): address: 0x3ff5f048, value: 0x00000000 Debug: 484 290 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 485 290 target.c:2742 target_write_u32(): address: 0x3ff60064, value: 0x50d83aa1 Debug: 486 291 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 487 292 target.c:2742 target_write_u32(): address: 0x3ff60048, value: 0x00000000 Debug: 488 294 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 489 294 target.c:2742 target_write_u32(): address: 0x3ff480a4, value: 0x50d83aa1 Debug: 490 295 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 491 296 target.c:2742 target_write_u32(): address: 0x3ff4808c, value: 0x00000000 Debug: 492 297 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 493 297 esp32.c:390 esp32_soc_reset(): Loading stub code into RTC RAM Debug: 494 297 target.c:2507 target_read_buffer(): reading buffer of 212 byte at 0x50000000 Debug: 495 300 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 496 300 target.c:2445 target_write_buffer(): writing buffer of 212 byte at 0x50000000 Debug: 497 302 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 498 302 esp32.c:415 esp32_soc_reset(): Resuming the target Debug: 499 302 xtensa.c:1251 xtensa_resume(): esp32.cpu0 Debug: 500 302 xtensa.c:1180 xtensa_prepare_resume(): esp32.cpu0: current=0 address=0x50000004, handle_breakpoints=0, debug_execution=0) Debug: 501 303 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 502 303 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 50000004 Debug: 503 303 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 504 304 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value 00000000, num =4 Debug: 505 305 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 506 305 xtensa.c:1233 xtensa_do_resume(): esp32.cpu0: start Debug: 507 307 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (80000000) Debug: 508 307 target.c:1849 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 509 307 esp32.c:523 esp32_handle_target_event(): 2 Debug: 510 307 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 2 Debug: 511 308 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 2 Debug: 512 308 xtensa.c:2447 xtensa_handle_target_event(): 2 Debug: 513 308 esp32.c:424 esp32_soc_reset(): resume done, waiting for the target to come alive Debug: 514 469 esp32.c:440 esp32_soc_reset(): halting the target Debug: 515 469 xtensa.c:1133 xtensa_halt(): xtensa_halt, target: esp32.cpu0 Debug: 516 470 xtensa.c:1145 xtensa_halt(): esp32.cpu0: Core status 0x80000000 Info : 517 472 xtensa.c:1804 xtensa_poll(): esp32.cpu0: Debug controller was reset. Debug: 518 472 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x30000 clear=0x600000 Info : 519 473 xtensa.c:1810 xtensa_poll(): esp32.cpu0: Core was reset. Debug: 520 474 xtensa.c:890 xtensa_fetch_all_regs(): esp32.cpu0: start Debug: 521 477 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (80208411) Debug: 522 483 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (80208411) Debug: 523 485 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (80208411) Debug: 524 485 xtensa.c:1858 xtensa_poll(): esp32.cpu0: Target halted, pc=0x500000CF, debug_reason=00000000, oldstate=00000001 Debug: 525 486 xtensa.c:1863 xtensa_poll(): esp32.cpu0: Halt reason=0x00000020, exc_cause=0, dsr=0x80208411 Info : 526 486 xtensa.c:1866 xtensa_poll(): esp32.cpu0: Target halted, PC=0x500000CF, debug_reason=00000000 Debug: 527 487 esp_xtensa.c:152 esp_xtensa_poll(): esp32.cpu0: Clear debug stubs info Debug: 528 488 esp_xtensa_smp.c:257 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 529 488 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 530 488 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 531 489 esp_xtensa_smp.c:314 esp_xtensa_smp_update_halt_gdb(): exit Debug: 532 489 target.c:1849 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32.cpu0 Debug: 533 489 esp32.c:523 esp32_handle_target_event(): 0 Debug: 534 490 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 0 Debug: 535 490 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 0 Debug: 536 490 xtensa.c:2447 xtensa_handle_target_event(): 0 Debug: 537 490 target.c:1849 target_call_event_callbacks(): target event 1 (halted) for core esp32.cpu0 Debug: 538 491 esp32.c:523 esp32_handle_target_event(): 1 Debug: 539 491 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 1 Debug: 540 491 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 1 Debug: 541 491 xtensa.c:2447 xtensa_handle_target_event(): 1 Debug: 542 491 target.c:2742 target_write_u32(): address: 0x3ff5f064, value: 0x50d83aa1 Debug: 543 493 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 544 493 target.c:2742 target_write_u32(): address: 0x3ff5f048, value: 0x00000000 Debug: 545 494 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 546 494 target.c:2742 target_write_u32(): address: 0x3ff60064, value: 0x50d83aa1 Debug: 547 496 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 548 496 target.c:2742 target_write_u32(): address: 0x3ff60048, value: 0x00000000 Debug: 549 498 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 550 498 target.c:2742 target_write_u32(): address: 0x3ff480a4, value: 0x50d83aa1 Debug: 551 500 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 552 500 target.c:2742 target_write_u32(): address: 0x3ff4808c, value: 0x00000000 Debug: 554 502 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 555 502 esp32.c:449 esp32_soc_reset(): restoring RTC_SLOW_MEM Debug: 556 502 target.c:2445 target_write_buffer(): writing buffer of 212 byte at 0x50000000 Debug: 557 504 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8000CC11) Debug: 558 504 FreeRTOS.c:1157 FreeRTOS_post_reset_cleanup(): FreeRTOS_post_reset_cleanup Debug: 559 505 xtensa.c:845 xtensa_assert_reset(): esp32.cpu0: target_number=0, begin Debug: 560 505 xtensa.c:845 xtensa_assert_reset(): esp32.cpu1: target_number=1, begin Debug: 561 506 command.c:146 script_debug(): command - transport select Debug: 562 506 command.c:146 script_debug(): command - esp32.cpu1 cget -chain-position Debug: 563 507 command.c:146 script_debug(): command - jtag tapisenabled esp32.cpu1 Debug: 564 507 command.c:146 script_debug(): command - esp32.cpu1 arp_reset assert 1 Debug: 565 507 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 566 507 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 567 508 esp_xtensa_smp.c:82 esp_xtensa_smp_assert_reset(): esp32.cpu1: begin Debug: 568 508 command.c:146 script_debug(): command - esp32.cpu0 invoke-event reset-assert-post Debug: 569 508 command.c:146 script_debug(): command - esp32.cpu1 invoke-event reset-assert-post Debug: 570 509 command.c:146 script_debug(): command - esp32.cpu0 invoke-event reset-deassert-pre Debug: 571 509 command.c:146 script_debug(): command - esp32.cpu1 invoke-event reset-deassert-pre Debug: 572 509 command.c:146 script_debug(): command - transport select Debug: 573 510 command.c:146 script_debug(): command - esp32.cpu0 cget -chain-position Debug: 574 510 command.c:146 script_debug(): command - jtag tapisenabled esp32.cpu0 Debug: 575 510 command.c:146 script_debug(): command - esp32.cpu0 arp_reset deassert 1 Debug: 576 510 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 577 511 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 578 511 esp_xtensa_smp.c:106 esp_xtensa_smp_deassert_reset(): esp32.cpu0: begin Debug: 579 511 xtensa.c:864 xtensa_deassert_reset(): esp32.cpu0 halt=1 Debug: 580 512 command.c:146 script_debug(): command - transport select Debug: 581 512 command.c:146 script_debug(): command - esp32.cpu1 cget -chain-position Debug: 582 513 command.c:146 script_debug(): command - jtag tapisenabled esp32.cpu1 Debug: 583 513 command.c:146 script_debug(): command - esp32.cpu1 arp_reset deassert 1 Debug: 584 513 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 585 513 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 586 514 esp_xtensa_smp.c:106 esp_xtensa_smp_deassert_reset(): esp32.cpu1: begin Debug: 587 514 xtensa.c:864 xtensa_deassert_reset(): esp32.cpu1 halt=1 Debug: 588 515 command.c:146 script_debug(): command - esp32.cpu0 invoke-event reset-deassert-post Debug: 589 515 command.c:146 script_debug(): command - esp32.cpu1 invoke-event reset-deassert-post Debug: 590 516 command.c:146 script_debug(): command - transport select Debug: 591 516 command.c:146 script_debug(): command - esp32.cpu0 cget -chain-position Debug: 592 516 command.c:146 script_debug(): command - jtag tapisenabled esp32.cpu0 Debug: 593 517 command.c:146 script_debug(): command - esp32.cpu0 was_examined Debug: 594 517 command.c:146 script_debug(): command - esp32.cpu0 arp_waitstate halted 1000 Info : 595 518 xtensa.c:1810 xtensa_poll(): esp32.cpu0: Core was reset. Debug: 596 519 xtensa.c:890 xtensa_fetch_all_regs(): esp32.cpu0: start Debug: 597 522 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (81A0CC11) Debug: 598 527 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (81A0CC11) Debug: 599 529 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (81A0CC11) Debug: 600 530 xtensa.c:1858 xtensa_poll(): esp32.cpu0: Target halted, pc=0x40000400, debug_reason=00000000, oldstate=00000001 Debug: 601 530 xtensa.c:1863 xtensa_poll(): esp32.cpu0: Halt reason=0x00000020, exc_cause=0, dsr=0x81a0cc11 Info : 602 530 xtensa.c:1866 xtensa_poll(): esp32.cpu0: Target halted, PC=0x40000400, debug_reason=00000000 Debug: 603 531 esp_xtensa.c:152 esp_xtensa_poll(): esp32.cpu0: Clear debug stubs info Debug: 604 532 esp_xtensa_smp.c:257 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 605 532 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 606 533 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 607 533 esp_xtensa_smp.c:285 esp_xtensa_smp_update_halt_gdb(): Poll target 'esp32.cpu1' Info : 608 534 xtensa.c:1804 xtensa_poll(): esp32.cpu1: Debug controller was reset. Debug: 609 534 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu1: write smpbreak set=0x30000 clear=0x600000 Info : 610 535 xtensa.c:1810 xtensa_poll(): esp32.cpu1: Core was reset. Debug: 611 537 xtensa.c:890 xtensa_fetch_all_regs(): esp32.cpu1: start Debug: 612 540 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (80A08411) Debug: 613 545 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (80A08411) Debug: 614 547 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (80A08411) Debug: 615 547 xtensa.c:1858 xtensa_poll(): esp32.cpu1: Target halted, pc=0x40000400, debug_reason=00000000, oldstate=00000001 Debug: 616 548 xtensa.c:1863 xtensa_poll(): esp32.cpu1: Halt reason=0x00000020, exc_cause=0, dsr=0x80a08411 Info : 617 548 xtensa.c:1866 xtensa_poll(): esp32.cpu1: Target halted, PC=0x40000400, debug_reason=00000000 Debug: 618 549 esp_xtensa.c:152 esp_xtensa_poll(): esp32.cpu1: Clear debug stubs info Debug: 619 550 target.c:1849 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32.cpu1 Debug: 620 550 esp32.c:523 esp32_handle_target_event(): 0 Debug: 621 550 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 0 Debug: 622 551 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 0 Debug: 623 551 xtensa.c:2447 xtensa_handle_target_event(): 0 Debug: 624 551 target.c:1849 target_call_event_callbacks(): target event 1 (halted) for core esp32.cpu1 Debug: 625 551 esp32.c:523 esp32_handle_target_event(): 1 Debug: 626 552 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 1 Debug: 627 552 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 1 Debug: 628 552 xtensa.c:2447 xtensa_handle_target_event(): 1 Debug: 629 552 target.c:2742 target_write_u32(): address: 0x3ff5f064, value: 0x50d83aa1 Debug: 630 554 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (8080CC11) Debug: 631 554 target.c:2742 target_write_u32(): address: 0x3ff5f048, value: 0x00000000 Debug: 632 555 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (8080CC11) Debug: 633 556 target.c:2742 target_write_u32(): address: 0x3ff60064, value: 0x50d83aa1 Debug: 634 558 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (8080CC11) Debug: 635 558 target.c:2742 target_write_u32(): address: 0x3ff60048, value: 0x00000000 Debug: 636 560 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (8080CC11) Debug: 637 560 target.c:2742 target_write_u32(): address: 0x3ff480a4, value: 0x50d83aa1 Debug: 638 561 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (8080CC11) Debug: 639 562 target.c:2742 target_write_u32(): address: 0x3ff4808c, value: 0x00000000 Debug: 640 563 xtensa.c:788 xtensa_core_status_check(): esp32.cpu1: DSR (8080CC11) Debug: 641 564 esp_xtensa_smp.c:314 esp_xtensa_smp_update_halt_gdb(): exit Debug: 642 564 target.c:1849 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32.cpu0 Debug: 643 564 esp32.c:523 esp32_handle_target_event(): 0 Debug: 644 564 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 0 Debug: 645 565 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 0 Debug: 646 565 xtensa.c:2447 xtensa_handle_target_event(): 0 Debug: 647 565 target.c:1849 target_call_event_callbacks(): target event 1 (halted) for core esp32.cpu0 Debug: 648 565 esp32.c:523 esp32_handle_target_event(): 1 Debug: 649 565 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 1 Debug: 650 566 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 1 Debug: 651 566 xtensa.c:2447 xtensa_handle_target_event(): 1 Debug: 652 566 target.c:2742 target_write_u32(): address: 0x3ff5f064, value: 0x50d83aa1 Debug: 653 567 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 654 568 target.c:2742 target_write_u32(): address: 0x3ff5f048, value: 0x00000000 Debug: 655 569 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 656 570 target.c:2742 target_write_u32(): address: 0x3ff60064, value: 0x50d83aa1 Debug: 657 571 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 658 571 target.c:2742 target_write_u32(): address: 0x3ff60048, value: 0x00000000 Debug: 659 573 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 660 574 target.c:2742 target_write_u32(): address: 0x3ff480a4, value: 0x50d83aa1 Debug: 661 575 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 662 575 target.c:2742 target_write_u32(): address: 0x3ff4808c, value: 0x00000000 Debug: 663 577 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 664 577 command.c:146 script_debug(): command - esp32.cpu0 curstate Debug: 665 577 command.c:146 script_debug(): command - transport select Debug: 666 578 command.c:146 script_debug(): command - esp32.cpu1 cget -chain-position Debug: 667 578 command.c:146 script_debug(): command - jtag tapisenabled esp32.cpu1 Debug: 668 578 command.c:146 script_debug(): command - esp32.cpu1 was_examined Debug: 669 579 command.c:146 script_debug(): command - esp32.cpu1 arp_waitstate halted 1000 Debug: 670 581 command.c:146 script_debug(): command - esp32.cpu1 curstate Debug: 671 581 command.c:146 script_debug(): command - transport select Debug: 672 581 command.c:146 script_debug(): command - esp32.cpu0 cget -chain-position Debug: 673 582 command.c:146 script_debug(): command - jtag tapisenabled esp32.cpu0 Debug: 674 582 command.c:146 script_debug(): command - esp32.cpu0 was_examined Debug: 675 582 command.c:146 script_debug(): command - esp32.cpu0 arp_waitstate halted 5000 Debug: 676 586 command.c:146 script_debug(): command - esp32.cpu0 invoke-event reset-init Debug: 677 586 command.c:146 script_debug(): command - transport select Debug: 678 586 command.c:146 script_debug(): command - esp32.cpu1 cget -chain-position Debug: 679 587 command.c:146 script_debug(): command - jtag tapisenabled esp32.cpu1 Debug: 680 587 command.c:146 script_debug(): command - esp32.cpu1 was_examined Debug: 681 587 command.c:146 script_debug(): command - esp32.cpu1 arp_waitstate halted 5000 Debug: 682 591 command.c:146 script_debug(): command - esp32.cpu1 invoke-event reset-init Debug: 683 591 command.c:146 script_debug(): command - esp32.cpu0 invoke-event reset-end Debug: 684 591 command.c:146 script_debug(): command - esp32.cpu1 invoke-event reset-end Debug: 685 598 command.c:146 script_debug(): command - target names Debug: 686 598 command.c:146 script_debug(): command - esp32.cpu0 cget -work-area-backup Debug: 687 598 command.c:146 script_debug(): command - esp32.cpu0 configure -work-area-backup 0 Debug: 688 599 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 689 599 command.c:146 script_debug(): command - esp32.cpu0 cget -alt-work-area-backup Debug: 690 599 command.c:146 script_debug(): command - esp32.cpu0 configure -alt-work-area-backup 0 Debug: 691 600 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 692 600 command.c:146 script_debug(): command - esp32.cpu1 cget -work-area-backup Debug: 693 600 command.c:146 script_debug(): command - esp32.cpu1 configure -work-area-backup 0 Debug: 694 601 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 695 601 command.c:146 script_debug(): command - esp32.cpu1 cget -alt-work-area-backup Debug: 696 601 command.c:146 script_debug(): command - esp32.cpu1 configure -alt-work-area-backup 0 Debug: 697 602 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 698 602 command.c:146 script_debug(): command - esp compression off Debug: 700 608 esp_flash.c:1377 esp_flash_cmd_set_compression(): Flash compressed upload is off Debug: 701 608 esp_flash.c:929 esp_flash_probe(): Flash size = 0 KB @ 0x00000000 'esp32.cpu0' - 'halted' Debug: 702 609 esp_flash.c:242 esp_flasher_algorithm_init(): base=00000000 set=0 Debug: 703 609 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 704 610 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x0 clear=0x630000 Debug: 705 610 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=0, state=2 Debug: 706 611 algorithm.c:339 algorithm_load_func_image(): stub: base 0x0, start 0x40092584, 2 sections Debug: 707 611 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 10967, flags 1 Debug: 708 611 target.c:2043 alloc_working_area_try_do(): MMU disabled, using physical address for working memory 0x40090000 Debug: 709 612 target.c:2097 alloc_working_area_try_do(): allocated new working area of 10968 bytes at address 0x40090000 Debug: 710 612 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 711 612 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 712 613 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090000 Debug: 713 616 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 714 617 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090200 Debug: 715 621 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 716 621 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090400 Debug: 717 625 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 718 625 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090600 Debug: 719 629 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 720 629 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090800 Debug: 721 632 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 722 632 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 Debug: 723 636 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 724 636 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 Debug: 725 639 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 726 640 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 Debug: 727 643 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 728 643 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091000 Debug: 729 646 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 730 647 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091200 Debug: 731 650 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 732 650 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091400 Debug: 733 654 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 734 654 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091600 Debug: 735 657 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 736 657 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091800 Debug: 737 660 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 738 661 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 Debug: 739 664 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 740 664 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 Debug: 741 668 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 742 668 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 Debug: 743 672 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 744 672 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092000 Debug: 745 675 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 746 676 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092200 Debug: 747 679 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 748 679 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092400 Debug: 749 683 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 750 683 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092600 Debug: 751 687 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 752 688 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092800 Debug: 753 691 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 754 691 target.c:2445 target_write_buffer(): writing buffer of 215 byte at 0x40092a00 Debug: 755 693 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 756 695 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 757 696 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 928, flags 0 Debug: 758 696 algorithm.c:376 algorithm_load_func_image(): DATA sec size 928 -> 928 Debug: 759 696 algorithm.c:379 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 760 696 target.c:2043 alloc_working_area_try_do(): MMU disabled, using physical address for working memory 0x3ffc0000 Debug: 761 697 target.c:2097 alloc_working_area_try_do(): allocated new working area of 984 bytes at address 0x3ffc0000 Debug: 762 697 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 763 697 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 764 698 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 Debug: 765 701 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 766 702 target.c:2445 target_write_buffer(): writing buffer of 416 byte at 0x3ffc0200 Debug: 767 705 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 768 705 target.c:2097 alloc_working_area_try_do(): allocated new working area of 1300 bytes at address 0x3ffc03d8 Debug: 769 705 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 770 706 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc08eb (1300 bytes) Debug: 771 706 target.c:1964 print_wa_layout(): 0x3ffc08ec-0x3ffd7fff (96020 bytes) Debug: 772 706 target.c:2097 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x40092ad8 Debug: 773 707 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 774 707 target.c:1964 print_wa_layout(): * 0x40092ad8-0x40092af3 (28 bytes) Debug: 775 707 target.c:1964 print_wa_layout(): 0x40092af4-0x40093fff (5388 bytes) Debug: 776 707 target.c:2445 target_write_buffer(): writing buffer of 28 byte at 0x40092ad8 Debug: 777 710 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 778 710 algorithm.c:462 algorithm_load_func_image(): Stub loaded in 98.995 ms Debug: 779 710 xtensa_algorithm.c:112 xtensa_algo_init(): reg params count 9 (6/3). Debug: 780 711 xtensa_algorithm.c:59 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc08ec Debug: 781 711 xtensa_algorithm.c:62 xtensa_algo_regs_init_start(): Adjust stack addr to 0x3ffc08e0 Debug: 782 711 xtensa_algorithm.c:127 xtensa_algo_init(): Set arg[0] = 5 (a2) Debug: 783 712 xtensa_algorithm.c:137 xtensa_algo_init(): Set arg[1] = -1 (a3) Debug: 784 712 xtensa_algorithm.c:137 xtensa_algo_init(): Set arg[2] = 0 (a4) Debug: 785 712 target.c:2097 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x3ffc08ec Debug: 786 712 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 787 713 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc08eb (1300 bytes) Debug: 788 713 target.c:1964 print_wa_layout(): * 0x3ffc08ec-0x3ffc0907 (28 bytes) Debug: 789 713 target.c:1964 print_wa_layout(): 0x3ffc0908-0x3ffd7fff (95992 bytes) Debug: 790 714 algorithm.c:224 algorithm_run(): Algorithm start @ 0x40092ad8, stack 1300 bytes @ 0x3ffc08ec Debug: 791 714 xtensa.c:1251 xtensa_resume(): esp32.cpu0 Debug: 792 714 xtensa.c:1180 xtensa_prepare_resume(): esp32.cpu0: current=0 address=0x40092ad8, handle_breakpoints=1, debug_execution=1) Debug: 793 715 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 794 715 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40092AD8 Debug: 795 715 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowbase val 00000000 Debug: 796 716 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowstart val 00000001 Debug: 797 716 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 00060025 Debug: 798 716 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 799 717 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a0 value 00000000, num =1 Debug: 800 717 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 3FFC08D0, num =2 Debug: 801 717 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a2 value 00000005, num =3 Debug: 802 718 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value FFFFFFFF, num =4 Debug: 803 718 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a4 value 3FFC08EC, num =5 Debug: 804 719 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 40092584, num =9 Debug: 805 721 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 806 721 xtensa.c:1233 xtensa_do_resume(): esp32.cpu0: start Debug: 807 723 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC01) Debug: 808 723 target.c:1849 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 809 724 esp32.c:523 esp32_handle_target_event(): 2 Debug: 810 724 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 2 Debug: 811 724 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 2 Debug: 812 724 xtensa.c:2447 xtensa_handle_target_event(): 2 Debug: 813 724 algorithm.c:246 algorithm_run(): Wait algorithm completion Debug: 814 726 xtensa.c:890 xtensa_fetch_all_regs(): esp32.cpu0: start Debug: 815 730 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 816 735 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 817 737 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 818 737 xtensa.c:1858 xtensa_poll(): esp32.cpu0: Target halted, pc=0x40092AEE, debug_reason=00000001, oldstate=00000004 Debug: 819 737 xtensa.c:1863 xtensa_poll(): esp32.cpu0: Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11 Info : 820 738 xtensa.c:1866 xtensa_poll(): esp32.cpu0: Target halted, PC=0x40092AEE, debug_reason=00000001 Debug: 821 739 esp_xtensa_smp.c:257 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 822 739 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 823 739 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 824 740 esp_xtensa_smp.c:314 esp_xtensa_smp_update_halt_gdb(): exit Debug: 825 740 target.c:1849 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32.cpu0 Debug: 826 740 esp32.c:523 esp32_handle_target_event(): 17 Debug: 827 741 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 17 Debug: 828 741 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 17 Debug: 829 741 xtensa.c:2447 xtensa_handle_target_event(): 17 Debug: 830 741 xtensa.c:2260 xtensa_wait_algorithm(): Read mem params Debug: 831 742 xtensa.c:2262 xtensa_wait_algorithm(): Check mem param @ 0x3ffc08ec Debug: 832 742 xtensa.c:2264 xtensa_wait_algorithm(): Read mem param @ 0x3ffc08ec Debug: 833 742 target.c:2507 target_read_buffer(): reading buffer of 28 byte at 0x3ffc08ec Debug: 834 747 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 835 747 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a15: 0x000050aa -> 0x00000000 Debug: 836 747 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a13: 0x00400000 -> 0x00000000 Debug: 837 748 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a12: 0x0020a400 -> 0x00000000 Debug: 838 748 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a11: 0x00000001 -> 0x00000000 Debug: 839 748 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a9: 0x3ffc0820 -> 0x00000000 Debug: 840 749 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a8: 0x80092aec -> 0x00000000 Debug: 841 749 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a4: 0x3ffc08ec -> 0x00000000 Debug: 842 749 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a3: 0xffffffff -> 0x00000000 Debug: 843 750 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a1: 0x3ffc08d0 -> 0x00000000 Debug: 844 750 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ccount: 0x00091500 -> 0x00000004 Debug: 845 750 xtensa.c:2281 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000020 Debug: 846 751 xtensa.c:2291 xtensa_wait_algorithm(): restoring register eps6: 0x00060025 -> 0x0000001f Debug: 847 751 xtensa.c:2291 xtensa_wait_algorithm(): restoring register epc6: 0x40092aee -> 0x40000400 Debug: 848 751 xtensa.c:2291 xtensa_wait_algorithm(): restoring register scompare1: 0xb33fffff -> 0x00000000 Debug: 849 752 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ps: 0x00060025 -> 0x0000001f Debug: 850 752 xtensa.c:2291 xtensa_wait_algorithm(): restoring register configid0: 0x40092aee -> 0x40000400 Debug: 851 752 xtensa.c:2291 xtensa_wait_algorithm(): restoring register sar: 0x00000019 -> 0x00000000 Debug: 852 753 xtensa.c:2291 xtensa_wait_algorithm(): restoring register lcount: 0xffffffff -> 0x00000000 Debug: 853 753 xtensa.c:2291 xtensa_wait_algorithm(): restoring register lend: 0x4000c2f6 -> 0x00000000 Debug: 854 753 xtensa.c:2291 xtensa_wait_algorithm(): restoring register lbeg: 0x4000c2e0 -> 0x00000000 Debug: 855 754 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar61: 0x00060023 -> 0x00000000 Debug: 856 754 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar60: 0x00060025 -> 0x00000000 Debug: 857 754 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar59: 0x00060023 -> 0x00000000 Debug: 858 755 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar58: 0x00000003 -> 0x00000000 Debug: 859 755 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar57: 0x3ffc0700 -> 0x00000000 Debug: 860 755 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar56: 0x80094d61 -> 0x00000000 Debug: 861 756 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar51: 0x3ffc3378 -> 0x00000000 Debug: 862 756 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar50: 0x3ffc3378 -> 0x00000000 Debug: 863 756 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar49: 0x3ffc0710 -> 0x00000000 Debug: 864 757 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar48: 0x8008cb0a -> 0x00000000 Debug: 865 757 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar45: 0x08000000 -> 0x00000000 Debug: 866 757 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar44: 0x3ffae270 -> 0x00000000 Debug: 867 758 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar43: 0xfffffff7 -> 0x00000000 Debug: 868 758 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar42: 0x3ff00044 -> 0x00000000 Debug: 869 758 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar41: 0x000008ef -> 0x00000000 Debug: 870 759 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar40: 0xffffffc0 -> 0x00000000 Debug: 871 759 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar39: 0x00000010 -> 0x00000000 Debug: 872 759 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar38: 0x50000000 -> 0x00000000 Debug: 873 760 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar37: 0x3ffc0800 -> 0x00000000 Debug: 874 760 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar36: 0x00000008 -> 0x00000000 Debug: 875 760 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar35: 0x0000002f -> 0x00000000 Debug: 876 761 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar33: 0x3ffc0780 -> 0x00000000 Debug: 877 761 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar32: 0x80090a3d -> 0x00000000 Debug: 878 761 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar31: 0x3ff10000 -> 0x00000000 Debug: 879 762 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar29: 0x00000003 -> 0x00000000 Debug: 880 762 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar28: 0x3ff10008 -> 0x00000000 Debug: 881 763 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar27: 0x00000003 -> 0x00000000 Debug: 882 763 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar26: 0x003fffff -> 0x00000000 Debug: 883 763 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar25: 0x50000000 -> 0x00000000 Debug: 884 764 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar24: 0x00000006 -> 0x00000000 Debug: 885 764 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar23: 0x3ff10000 -> 0x00000000 Debug: 886 765 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar22: 0x00000006 -> 0x00000000 Debug: 887 765 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar20: 0x00000002 -> 0x00000000 Debug: 888 765 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar19: 0x3ffc08ec -> 0x00000000 Debug: 889 766 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar17: 0x3ffc07e0 -> 0x00000000 Debug: 890 766 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar16: 0x800928cf -> 0x00000000 Debug: 891 766 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar15: 0x000050aa -> 0x00000000 Debug: 892 767 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar13: 0x00400000 -> 0x00000000 Debug: 893 767 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar12: 0x0020a400 -> 0x00000000 Debug: 894 767 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar11: 0x00000001 -> 0x00000000 Debug: 895 768 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar9: 0x3ffc0820 -> 0x00000000 Debug: 896 768 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar8: 0x80092aec -> 0x00000000 Debug: 897 768 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar4: 0x3ffc08ec -> 0x00000000 Debug: 898 769 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar3: 0xffffffff -> 0x00000000 Debug: 899 769 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar1: 0x3ffc08d0 -> 0x00000000 Debug: 900 769 xtensa.c:2291 xtensa_wait_algorithm(): restoring register pc: 0x40092aee -> 0x40000400 Debug: 901 770 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 902 770 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40000400 Debug: 903 770 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg lbeg val 00000000 Debug: 904 771 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg lend val 00000000 Debug: 905 771 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg lcount val 00000000 Debug: 906 772 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg sar val 00000000 Debug: 907 772 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg configid0 val 40000400 Debug: 908 772 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 0000001F Debug: 909 773 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg scompare1 val 00000000 Debug: 910 773 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg epc6 val 40000400 Debug: 911 773 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg eps6 val 0000001F Debug: 912 774 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ccount val 00000004 Debug: 913 774 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 914 774 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 00000000, num =2 Debug: 915 775 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value 00000000, num =4 Debug: 916 775 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a4 value 00000000, num =5 Debug: 917 775 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 00000000, num =9 Debug: 918 776 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a9 value 00000000, num =10 Debug: 919 776 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a11 value 00000000, num =12 Debug: 920 777 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a12 value 00000000, num =13 Debug: 921 777 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a13 value 00000000, num =14 Debug: 922 777 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a15 value 00000000, num =16 Debug: 923 778 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar1 value 00000000, num =1 Debug: 924 778 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar3 value 00000000, num =3 Debug: 925 779 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar4 value 00000000, num =4 Debug: 926 779 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar8 value 00000000, num =8 Debug: 927 780 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar9 value 00000000, num =9 Debug: 928 780 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar11 value 00000000, num =11 Debug: 929 781 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar12 value 00000000, num =12 Debug: 930 781 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar13 value 00000000, num =13 Debug: 931 782 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar15 value 00000000, num =15 Debug: 932 782 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar16 value 00000000, num =16 Debug: 933 783 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar17 value 00000000, num =17 Debug: 934 784 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar19 value 00000000, num =19 Debug: 935 784 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar20 value 00000000, num =20 Debug: 936 784 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar22 value 00000000, num =22 Debug: 937 785 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar23 value 00000000, num =23 Debug: 938 785 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar24 value 00000000, num =24 Debug: 939 786 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar25 value 00000000, num =25 Debug: 940 786 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar26 value 00000000, num =26 Debug: 941 786 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar27 value 00000000, num =27 Debug: 942 787 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar28 value 00000000, num =28 Debug: 943 787 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar29 value 00000000, num =29 Debug: 944 788 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar31 value 00000000, num =31 Debug: 945 788 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar32 value 00000000, num =32 Debug: 946 788 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar33 value 00000000, num =33 Debug: 947 789 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar35 value 00000000, num =35 Debug: 948 789 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar36 value 00000000, num =36 Debug: 949 790 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar37 value 00000000, num =37 Debug: 950 790 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar38 value 00000000, num =38 Debug: 951 790 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar39 value 00000000, num =39 Debug: 952 791 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar40 value 00000000, num =40 Debug: 953 791 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar41 value 00000000, num =41 Debug: 954 791 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar42 value 00000000, num =42 Debug: 955 792 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar43 value 00000000, num =43 Debug: 956 792 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar44 value 00000000, num =44 Debug: 957 793 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar45 value 00000000, num =45 Debug: 958 793 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar48 value 00000000, num =48 Debug: 959 793 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar49 value 00000000, num =49 Debug: 960 794 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar50 value 00000000, num =50 Debug: 961 794 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar51 value 00000000, num =51 Debug: 962 795 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar56 value 00000000, num =56 Debug: 963 795 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar57 value 00000000, num =57 Debug: 964 796 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar58 value 00000000, num =58 Debug: 965 796 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar59 value 00000000, num =59 Debug: 966 796 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar60 value 00000000, num =60 Debug: 967 797 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar61 value 00000000, num =61 Debug: 968 804 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 969 804 algorithm.c:274 algorithm_run(): Got algorithm RC 0x0 Debug: 970 804 target.c:2185 target_free_working_area_restore(): freed 28 bytes of working area at address 0x3ffc08ec Debug: 971 805 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 972 805 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc08eb (1300 bytes) Debug: 973 805 target.c:1964 print_wa_layout(): 0x3ffc08ec-0x3ffd7fff (96020 bytes) Debug: 974 805 target.c:2185 target_free_working_area_restore(): freed 28 bytes of working area at address 0x40092ad8 Debug: 975 806 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 976 806 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 977 806 target.c:2185 target_free_working_area_restore(): freed 1300 bytes of working area at address 0x3ffc03d8 Debug: 978 807 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 979 807 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 980 807 target.c:2185 target_free_working_area_restore(): freed 10968 bytes of working area at address 0x40090000 Debug: 981 808 target.c:1964 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 982 808 target.c:2185 target_free_working_area_restore(): freed 984 bytes of working area at address 0x3ffc0000 Debug: 983 809 target.c:1964 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 984 809 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x30000 clear=0x600000 Debug: 985 810 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=30000, state=2 Info : 986 811 esp_flash.c:403 esp_flash_get_mappings(): Flash mapping 0: 0x10020 -> 0x3f400020, 123 KB Info : 987 811 esp_flash.c:403 esp_flash_get_mappings(): Flash mapping 1: 0x30020 -> 0x400d0020, 672 KB Debug: 988 812 esp_flash.c:242 esp_flasher_algorithm_init(): base=00000000 set=0 Debug: 989 813 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 990 813 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x0 clear=0x630000 Debug: 991 814 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=0, state=2 Debug: 992 815 algorithm.c:339 algorithm_load_func_image(): stub: base 0x0, start 0x40092584, 2 sections Debug: 993 815 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 10967, flags 1 Debug: 994 815 target.c:2097 alloc_working_area_try_do(): allocated new working area of 10968 bytes at address 0x40090000 Debug: 995 816 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 996 816 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 997 817 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090000 Debug: 998 820 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 999 820 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090200 Debug: 1000 824 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1001 824 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090400 Debug: 1002 827 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1003 828 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090600 Debug: 1004 831 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1005 831 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090800 Debug: 1006 835 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1007 835 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 Debug: 1008 838 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1009 839 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 Debug: 1010 843 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1011 843 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 Debug: 1012 848 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1013 848 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091000 Debug: 1014 851 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1015 852 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091200 Debug: 1016 856 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1017 856 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091400 Debug: 1018 860 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1019 860 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091600 Debug: 1020 864 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1021 864 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091800 Debug: 1022 868 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1023 869 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 Debug: 1024 872 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1025 872 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 Debug: 1026 876 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1027 876 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 Debug: 1028 881 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1029 881 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092000 Debug: 1030 885 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1031 885 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092200 Debug: 1032 889 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1033 889 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092400 Debug: 1034 893 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1035 893 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092600 Debug: 1036 897 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1037 897 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092800 Debug: 1038 900 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1039 901 target.c:2445 target_write_buffer(): writing buffer of 215 byte at 0x40092a00 Debug: 1040 903 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1041 905 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1042 906 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 928, flags 0 Debug: 1043 906 algorithm.c:376 algorithm_load_func_image(): DATA sec size 928 -> 928 Debug: 1044 906 algorithm.c:379 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 1045 906 target.c:2097 alloc_working_area_try_do(): allocated new working area of 984 bytes at address 0x3ffc0000 Debug: 1046 907 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1047 907 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 1048 907 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 Debug: 1049 911 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1050 912 target.c:2445 target_write_buffer(): writing buffer of 416 byte at 0x3ffc0200 Debug: 1051 915 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1052 916 target.c:2097 alloc_working_area_try_do(): allocated new working area of 1024 bytes at address 0x3ffc03d8 Debug: 1053 916 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1054 916 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc07d7 (1024 bytes) Debug: 1055 917 target.c:1964 print_wa_layout(): 0x3ffc07d8-0x3ffd7fff (96296 bytes) Debug: 1056 917 target.c:2097 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x40092ad8 Debug: 1057 917 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 1058 918 target.c:1964 print_wa_layout(): * 0x40092ad8-0x40092af3 (28 bytes) Debug: 1059 918 target.c:1964 print_wa_layout(): 0x40092af4-0x40093fff (5388 bytes) Debug: 1060 918 target.c:2445 target_write_buffer(): writing buffer of 28 byte at 0x40092ad8 Debug: 1061 920 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1062 920 algorithm.c:462 algorithm_load_func_image(): Stub loaded in 104.992 ms Debug: 1063 921 xtensa_algorithm.c:112 xtensa_algo_init(): reg params count 7 (6/1). Debug: 1064 921 xtensa_algorithm.c:59 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc07d8 Debug: 1065 921 xtensa_algorithm.c:62 xtensa_algo_regs_init_start(): Adjust stack addr to 0x3ffc07d0 Debug: 1066 922 xtensa_algorithm.c:127 xtensa_algo_init(): Set arg[0] = 4 (a2) Debug: 1067 922 algorithm.c:224 algorithm_run(): Algorithm start @ 0x40092ad8, stack 1024 bytes @ 0x3ffc07d8 Debug: 1068 922 xtensa.c:1251 xtensa_resume(): esp32.cpu0 Debug: 1069 922 xtensa.c:1180 xtensa_prepare_resume(): esp32.cpu0: current=0 address=0x40092ad8, handle_breakpoints=1, debug_execution=1) Debug: 1070 923 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 1071 923 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40092AD8 Debug: 1072 923 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowbase val 00000000 Debug: 1073 924 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowstart val 00000001 Debug: 1074 924 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 00060025 Debug: 1075 925 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 1076 925 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a0 value 00000000, num =1 Debug: 1077 925 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 3FFC07C0, num =2 Debug: 1078 926 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a2 value 00000004, num =3 Debug: 1079 926 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value 00000000, num =4 Debug: 1080 926 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 40092584, num =9 Debug: 1081 929 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1082 929 xtensa.c:1233 xtensa_do_resume(): esp32.cpu0: start Debug: 1083 931 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1084 932 target.c:1849 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 1085 932 esp32.c:523 esp32_handle_target_event(): 2 Debug: 1086 932 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 2 Debug: 1087 933 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 2 Debug: 1088 933 xtensa.c:2447 xtensa_handle_target_event(): 2 Debug: 1089 933 algorithm.c:246 algorithm_run(): Wait algorithm completion Debug: 1090 936 xtensa.c:890 xtensa_fetch_all_regs(): esp32.cpu0: start Debug: 1091 939 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1092 945 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1093 947 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1094 947 xtensa.c:1858 xtensa_poll(): esp32.cpu0: Target halted, pc=0x40092AEE, debug_reason=00000001, oldstate=00000004 Debug: 1095 947 xtensa.c:1863 xtensa_poll(): esp32.cpu0: Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11 Info : 1096 948 xtensa.c:1866 xtensa_poll(): esp32.cpu0: Target halted, PC=0x40092AEE, debug_reason=00000001 Debug: 1097 949 esp_xtensa_smp.c:257 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 1098 950 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 1099 950 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 1100 950 esp_xtensa_smp.c:314 esp_xtensa_smp_update_halt_gdb(): exit Debug: 1101 951 target.c:1849 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32.cpu0 Debug: 1102 951 esp32.c:523 esp32_handle_target_event(): 17 Debug: 1103 951 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 17 Debug: 1104 952 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 17 Debug: 1105 952 xtensa.c:2447 xtensa_handle_target_event(): 17 Debug: 1106 952 xtensa.c:2260 xtensa_wait_algorithm(): Read mem params Debug: 1107 952 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a15: 0x00000004 -> 0x00000000 Debug: 1108 952 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a14: 0x00400000 -> 0x00000000 Debug: 1109 953 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a12: 0x0020a400 -> 0x00000000 Debug: 1110 953 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a11: 0x00000001 -> 0x00000000 Debug: 1111 954 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a10: 0x00400000 -> 0x00000000 Debug: 1112 954 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a9: 0x3ffc0710 -> 0x00000000 Debug: 1113 954 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a8: 0x80092aec -> 0x00000000 Debug: 1114 954 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a2: 0x00400000 -> 0x00000000 Debug: 1115 955 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a1: 0x3ffc07c0 -> 0x00000000 Debug: 1116 955 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ccount: 0x00030019 -> 0x00000004 Debug: 1117 955 xtensa.c:2281 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000020 Debug: 1118 956 xtensa.c:2291 xtensa_wait_algorithm(): restoring register eps6: 0x00060025 -> 0x0000001f Debug: 1119 956 xtensa.c:2291 xtensa_wait_algorithm(): restoring register epc6: 0x40092aee -> 0x40000400 Debug: 1120 956 xtensa.c:2291 xtensa_wait_algorithm(): restoring register scompare1: 0xb33fffff -> 0x00000000 Debug: 1121 957 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ps: 0x00060025 -> 0x0000001f Debug: 1122 957 xtensa.c:2291 xtensa_wait_algorithm(): restoring register configid0: 0x40092aee -> 0x40000400 Debug: 1123 958 xtensa.c:2291 xtensa_wait_algorithm(): restoring register sar: 0x00000006 -> 0x00000000 Debug: 1124 958 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar61: 0x00060023 -> 0x00000000 Debug: 1125 958 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar60: 0x00060025 -> 0x00000000 Debug: 1126 959 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar59: 0x00060023 -> 0x00000000 Debug: 1127 960 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar58: 0x00000003 -> 0x00000000 Debug: 1128 960 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar57: 0x3ffc05f0 -> 0x00000000 Debug: 1129 960 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar56: 0x80094d61 -> 0x00000000 Debug: 1130 961 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar51: 0x3ffc3378 -> 0x00000000 Debug: 1131 961 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar50: 0x3ffc3378 -> 0x00000000 Debug: 1132 961 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar49: 0x3ffc0600 -> 0x00000000 Debug: 1133 962 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar48: 0x8008cb0a -> 0x00000000 Debug: 1134 962 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar42: 0x000000a3 -> 0x00000000 Debug: 1135 962 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar41: 0x3ffc0640 -> 0x00000000 Debug: 1136 963 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar40: 0x80008547 -> 0x00000000 Debug: 1137 963 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar38: 0x02000000 -> 0x00000000 Debug: 1138 963 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar36: 0x000000c6 -> 0x00000000 Debug: 1139 964 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar34: 0x0000bb83 -> 0x00000000 Debug: 1140 964 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar33: 0x3ffc0660 -> 0x00000000 Debug: 1141 964 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar32: 0x80008547 -> 0x00000000 Debug: 1142 965 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar31: 0x00040000 -> 0x00000000 Debug: 1143 965 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar30: 0x80000040 -> 0x00000000 Debug: 1144 966 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar29: 0x70000000 -> 0x00000000 Debug: 1145 966 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar28: 0x3ff42000 -> 0x00000000 Debug: 1146 967 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar27: 0x3ff42010 -> 0x00000000 Debug: 1147 967 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar26: 0x3ffae270 -> 0x00000000 Debug: 1148 968 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar24: 0x3ff42024 -> 0x00000000 Debug: 1149 968 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar23: 0x00000100 -> 0x00000000 Debug: 1150 968 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar22: 0x80000040 -> 0x00000000 Debug: 1151 969 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar21: 0x5c000007 -> 0x00000000 Debug: 1152 969 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar20: 0x70000000 -> 0x00000000 Debug: 1153 969 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar19: 0x00400000 -> 0x00000000 Debug: 1154 970 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar17: 0x3ffc06f0 -> 0x00000000 Debug: 1155 970 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar16: 0x8009273c -> 0x00000000 Debug: 1156 971 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar15: 0x00000004 -> 0x00000000 Debug: 1157 971 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar14: 0x00400000 -> 0x00000000 Debug: 1158 971 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar12: 0x0020a400 -> 0x00000000 Debug: 1159 972 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar11: 0x00000001 -> 0x00000000 Debug: 1160 972 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar10: 0x00400000 -> 0x00000000 Debug: 1161 972 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar9: 0x3ffc0710 -> 0x00000000 Debug: 1162 973 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar8: 0x80092aec -> 0x00000000 Debug: 1163 973 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar2: 0x00400000 -> 0x00000000 Debug: 1164 973 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar1: 0x3ffc07c0 -> 0x00000000 Debug: 1165 974 xtensa.c:2291 xtensa_wait_algorithm(): restoring register pc: 0x40092aee -> 0x40000400 Debug: 1166 974 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 1167 974 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40000400 Debug: 1168 975 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg sar val 00000000 Debug: 1169 975 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg configid0 val 40000400 Debug: 1170 975 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 0000001F Debug: 1171 976 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg scompare1 val 00000000 Debug: 1172 976 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg epc6 val 40000400 Debug: 1173 977 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg eps6 val 0000001F Debug: 1174 977 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ccount val 00000004 Debug: 1175 977 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 1176 977 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 00000000, num =2 Debug: 1177 978 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a2 value 00000000, num =3 Debug: 1178 978 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value 00000000, num =4 Debug: 1179 979 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 00000000, num =9 Debug: 1180 979 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a9 value 00000000, num =10 Debug: 1181 980 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a10 value 00000000, num =11 Debug: 1182 980 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a11 value 00000000, num =12 Debug: 1183 981 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a12 value 00000000, num =13 Debug: 1184 981 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a14 value 00000000, num =15 Debug: 1185 982 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a15 value 00000000, num =16 Debug: 1186 982 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar1 value 00000000, num =1 Debug: 1187 982 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar2 value 00000000, num =2 Debug: 1188 983 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar8 value 00000000, num =8 Debug: 1189 983 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar9 value 00000000, num =9 Debug: 1190 984 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar10 value 00000000, num =10 Debug: 1191 984 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar11 value 00000000, num =11 Debug: 1192 984 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar12 value 00000000, num =12 Debug: 1193 985 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar14 value 00000000, num =14 Debug: 1194 985 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar15 value 00000000, num =15 Debug: 1195 986 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar16 value 00000000, num =16 Debug: 1196 986 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar17 value 00000000, num =17 Debug: 1197 986 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar19 value 00000000, num =19 Debug: 1198 987 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar20 value 00000000, num =20 Debug: 1199 987 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar21 value 00000000, num =21 Debug: 1200 987 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar22 value 00000000, num =22 Debug: 1201 988 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar23 value 00000000, num =23 Debug: 1202 988 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar24 value 00000000, num =24 Debug: 1203 989 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar26 value 00000000, num =26 Debug: 1204 989 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar27 value 00000000, num =27 Debug: 1205 989 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar28 value 00000000, num =28 Debug: 1206 990 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar29 value 00000000, num =29 Debug: 1207 990 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar30 value 00000000, num =30 Debug: 1208 991 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar31 value 00000000, num =31 Debug: 1209 991 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar32 value 00000000, num =32 Debug: 1210 991 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar33 value 00000000, num =33 Debug: 1211 992 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar34 value 00000000, num =34 Debug: 1212 992 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar36 value 00000000, num =36 Debug: 1213 993 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar38 value 00000000, num =38 Debug: 1214 993 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar40 value 00000000, num =40 Debug: 1215 993 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar41 value 00000000, num =41 Debug: 1216 994 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar42 value 00000000, num =42 Debug: 1217 994 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar48 value 00000000, num =48 Debug: 1218 994 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar49 value 00000000, num =49 Debug: 1219 995 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar50 value 00000000, num =50 Debug: 1220 995 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar51 value 00000000, num =51 Debug: 1221 996 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar56 value 00000000, num =56 Debug: 1222 996 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar57 value 00000000, num =57 Debug: 1223 996 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar58 value 00000000, num =58 Debug: 1224 997 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar59 value 00000000, num =59 Debug: 1225 997 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar60 value 00000000, num =60 Debug: 1226 998 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar61 value 00000000, num =61 Debug: 1227 1001 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1228 1001 algorithm.c:274 algorithm_run(): Got algorithm RC 0x400000 Debug: 1229 1001 target.c:2185 target_free_working_area_restore(): freed 28 bytes of working area at address 0x40092ad8 Debug: 1230 1002 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 1231 1002 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 1232 1002 target.c:2185 target_free_working_area_restore(): freed 1024 bytes of working area at address 0x3ffc03d8 Debug: 1233 1003 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1234 1003 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 1235 1003 target.c:2185 target_free_working_area_restore(): freed 10968 bytes of working area at address 0x40090000 Debug: 1236 1003 target.c:1964 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 1237 1004 target.c:2185 target_free_working_area_restore(): freed 984 bytes of working area at address 0x3ffc0000 Debug: 1238 1004 target.c:1964 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 1239 1004 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x30000 clear=0x600000 Debug: 1241 1005 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=30000, state=2 Debug: 1242 1006 esp_flash.c:346 esp_flash_get_size(): esp_flash_get_size size 0x400000 Info : 1243 1006 esp_flash.c:984 esp_flash_probe(): Auto-detected flash bank 'esp32.cpu0.flash' size 4096 KB Info : 1244 1006 esp_flash.c:986 esp_flash_probe(): Using flash bank 'esp32.cpu0.flash' size 4096 KB Debug: 1245 1007 esp_flash.c:1003 esp_flash_probe(): allocated 1024 sectors Debug: 1246 1007 esp_flash.c:1377 esp_flash_cmd_set_compression(): Flash compressed upload is off Debug: 1247 1007 esp_flash.c:929 esp_flash_probe(): Flash size = 0 KB @ 0x00000000 'esp32.cpu1' - 'halted' Debug: 1248 1008 esp_flash.c:242 esp_flasher_algorithm_init(): base=00000000 set=0 Debug: 1249 1010 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1250 1010 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x0 clear=0x630000 Debug: 1251 1011 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=0, state=2 Debug: 1252 1011 algorithm.c:339 algorithm_load_func_image(): stub: base 0x0, start 0x40092584, 2 sections Debug: 1253 1012 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 10967, flags 1 Debug: 1254 1012 target.c:2097 alloc_working_area_try_do(): allocated new working area of 10968 bytes at address 0x40090000 Debug: 1255 1012 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 1256 1013 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 1257 1013 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090000 Debug: 1258 1016 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1259 1017 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090200 Debug: 1260 1020 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1261 1021 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090400 Debug: 1262 1025 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1263 1025 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090600 Debug: 1264 1030 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1265 1031 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090800 Debug: 1266 1035 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1267 1035 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 Debug: 1268 1038 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1269 1039 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 Debug: 1270 1042 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1271 1042 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 Debug: 1272 1047 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1273 1048 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091000 Debug: 1274 1051 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1275 1051 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091200 Debug: 1276 1055 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1277 1056 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091400 Debug: 1278 1060 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1279 1061 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091600 Debug: 1280 1064 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1281 1064 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091800 Debug: 1282 1068 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1283 1068 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 Debug: 1284 1072 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1285 1072 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 Debug: 1286 1075 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1287 1076 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 Debug: 1288 1079 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1289 1080 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092000 Debug: 1290 1083 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1291 1083 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092200 Debug: 1292 1086 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1293 1087 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092400 Debug: 1294 1091 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1295 1091 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092600 Debug: 1296 1094 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1297 1095 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092800 Debug: 1298 1098 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1299 1099 target.c:2445 target_write_buffer(): writing buffer of 215 byte at 0x40092a00 Debug: 1300 1101 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1301 1103 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1302 1104 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 928, flags 0 Debug: 1303 1104 algorithm.c:376 algorithm_load_func_image(): DATA sec size 928 -> 928 Debug: 1304 1104 algorithm.c:379 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 1305 1105 target.c:2097 alloc_working_area_try_do(): allocated new working area of 984 bytes at address 0x3ffc0000 Debug: 1306 1105 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1307 1105 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 1308 1105 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 Debug: 1309 1109 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1310 1109 target.c:2445 target_write_buffer(): writing buffer of 416 byte at 0x3ffc0200 Debug: 1311 1112 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1312 1112 target.c:2097 alloc_working_area_try_do(): allocated new working area of 1300 bytes at address 0x3ffc03d8 Debug: 1313 1112 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1314 1113 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc08eb (1300 bytes) Debug: 1315 1113 target.c:1964 print_wa_layout(): 0x3ffc08ec-0x3ffd7fff (96020 bytes) Debug: 1316 1113 target.c:2097 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x40092ad8 Debug: 1317 1114 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 1318 1114 target.c:1964 print_wa_layout(): * 0x40092ad8-0x40092af3 (28 bytes) Debug: 1319 1114 target.c:1964 print_wa_layout(): 0x40092af4-0x40093fff (5388 bytes) Debug: 1320 1115 target.c:2445 target_write_buffer(): writing buffer of 28 byte at 0x40092ad8 Debug: 1321 1116 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1322 1116 algorithm.c:462 algorithm_load_func_image(): Stub loaded in 104.997 ms Debug: 1323 1116 xtensa_algorithm.c:112 xtensa_algo_init(): reg params count 9 (6/3). Debug: 1324 1117 xtensa_algorithm.c:59 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc08ec Debug: 1325 1117 xtensa_algorithm.c:62 xtensa_algo_regs_init_start(): Adjust stack addr to 0x3ffc08e0 Debug: 1326 1117 xtensa_algorithm.c:127 xtensa_algo_init(): Set arg[0] = 5 (a2) Debug: 1327 1118 xtensa_algorithm.c:137 xtensa_algo_init(): Set arg[1] = -1 (a3) Debug: 1328 1118 xtensa_algorithm.c:137 xtensa_algo_init(): Set arg[2] = 0 (a4) Debug: 1329 1118 target.c:2097 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x3ffc08ec Debug: 1330 1119 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1331 1119 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc08eb (1300 bytes) Debug: 1332 1119 target.c:1964 print_wa_layout(): * 0x3ffc08ec-0x3ffc0907 (28 bytes) Debug: 1333 1120 target.c:1964 print_wa_layout(): 0x3ffc0908-0x3ffd7fff (95992 bytes) Debug: 1334 1120 algorithm.c:224 algorithm_run(): Algorithm start @ 0x40092ad8, stack 1300 bytes @ 0x3ffc08ec Debug: 1335 1120 xtensa.c:1251 xtensa_resume(): esp32.cpu0 Debug: 1336 1120 xtensa.c:1180 xtensa_prepare_resume(): esp32.cpu0: current=0 address=0x40092ad8, handle_breakpoints=1, debug_execution=1) Debug: 1337 1121 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 1338 1121 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40092AD8 Debug: 1339 1122 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowbase val 00000000 Debug: 1340 1122 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowstart val 00000001 Debug: 1341 1122 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 00060025 Debug: 1342 1123 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 1343 1123 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a0 value 00000000, num =1 Debug: 1344 1124 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 3FFC08D0, num =2 Debug: 1345 1124 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a2 value 00000005, num =3 Debug: 1346 1125 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value FFFFFFFF, num =4 Debug: 1347 1125 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a4 value 3FFC08EC, num =5 Debug: 1348 1126 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 40092584, num =9 Debug: 1349 1127 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1350 1128 xtensa.c:1233 xtensa_do_resume(): esp32.cpu0: start Debug: 1351 1130 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC01) Debug: 1352 1130 target.c:1849 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 1353 1130 esp32.c:523 esp32_handle_target_event(): 2 Debug: 1354 1131 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 2 Debug: 1355 1131 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 2 Debug: 1356 1131 xtensa.c:2447 xtensa_handle_target_event(): 2 Debug: 1357 1131 algorithm.c:246 algorithm_run(): Wait algorithm completion Debug: 1358 1134 xtensa.c:890 xtensa_fetch_all_regs(): esp32.cpu0: start Debug: 1359 1138 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1360 1143 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1361 1145 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1362 1146 xtensa.c:1858 xtensa_poll(): esp32.cpu0: Target halted, pc=0x40092AEE, debug_reason=00000001, oldstate=00000004 Debug: 1363 1146 xtensa.c:1863 xtensa_poll(): esp32.cpu0: Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11 Info : 1364 1147 xtensa.c:1866 xtensa_poll(): esp32.cpu0: Target halted, PC=0x40092AEE, debug_reason=00000001 Debug: 1365 1148 esp_xtensa_smp.c:257 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 1366 1148 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 1367 1149 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 1368 1149 esp_xtensa_smp.c:314 esp_xtensa_smp_update_halt_gdb(): exit Debug: 1369 1149 target.c:1849 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32.cpu0 Debug: 1370 1150 esp32.c:523 esp32_handle_target_event(): 17 Debug: 1371 1150 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 17 Debug: 1372 1150 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 17 Debug: 1373 1150 xtensa.c:2447 xtensa_handle_target_event(): 17 Debug: 1374 1150 xtensa.c:2260 xtensa_wait_algorithm(): Read mem params Debug: 1375 1151 xtensa.c:2262 xtensa_wait_algorithm(): Check mem param @ 0x3ffc08ec Debug: 1376 1151 xtensa.c:2264 xtensa_wait_algorithm(): Read mem param @ 0x3ffc08ec Debug: 1377 1151 target.c:2507 target_read_buffer(): reading buffer of 28 byte at 0x3ffc08ec Debug: 1378 1153 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1379 1153 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a15: 0x000050aa -> 0x00000000 Debug: 1380 1154 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a13: 0x00400000 -> 0x00000000 Debug: 1381 1154 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a12: 0x0020a400 -> 0x00000000 Debug: 1382 1154 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a11: 0x00000001 -> 0x00000000 Debug: 1383 1155 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a9: 0x3ffc0820 -> 0x00000000 Debug: 1384 1155 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a8: 0x80092aec -> 0x00000000 Debug: 1385 1155 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a4: 0x3ffc08ec -> 0x00000000 Debug: 1386 1156 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a3: 0xffffffff -> 0x00000000 Debug: 1387 1156 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a1: 0x3ffc08d0 -> 0x00000000 Debug: 1388 1156 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ccount: 0x00049d4d -> 0x00000004 Debug: 1389 1157 xtensa.c:2281 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000020 Debug: 1390 1157 xtensa.c:2291 xtensa_wait_algorithm(): restoring register eps6: 0x00060025 -> 0x0000001f Debug: 1391 1157 xtensa.c:2291 xtensa_wait_algorithm(): restoring register epc6: 0x40092aee -> 0x40000400 Debug: 1392 1158 xtensa.c:2291 xtensa_wait_algorithm(): restoring register scompare1: 0xb33fffff -> 0x00000000 Debug: 1393 1158 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ps: 0x00060025 -> 0x0000001f Debug: 1394 1158 xtensa.c:2291 xtensa_wait_algorithm(): restoring register configid0: 0x40092aee -> 0x40000400 Debug: 1395 1159 xtensa.c:2291 xtensa_wait_algorithm(): restoring register sar: 0x00000006 -> 0x00000000 Debug: 1396 1159 xtensa.c:2291 xtensa_wait_algorithm(): restoring register lcount: 0xffffffff -> 0x00000000 Debug: 1397 1160 xtensa.c:2291 xtensa_wait_algorithm(): restoring register lend: 0x4000c2f6 -> 0x00000000 Debug: 1398 1160 xtensa.c:2291 xtensa_wait_algorithm(): restoring register lbeg: 0x4000c2e0 -> 0x00000000 Debug: 1399 1160 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar61: 0x00060023 -> 0x00000000 Debug: 1400 1161 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar60: 0x00060025 -> 0x00000000 Debug: 1401 1161 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar59: 0x00060023 -> 0x00000000 Debug: 1402 1161 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar58: 0x00000003 -> 0x00000000 Debug: 1403 1162 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar57: 0x3ffc0700 -> 0x00000000 Debug: 1404 1162 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar56: 0x80094d61 -> 0x00000000 Debug: 1405 1162 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar51: 0x3ffc3378 -> 0x00000000 Debug: 1406 1163 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar50: 0x3ffc3378 -> 0x00000000 Debug: 1407 1163 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar49: 0x3ffc0710 -> 0x00000000 Debug: 1408 1163 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar48: 0x8008cb0a -> 0x00000000 Debug: 1409 1164 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar45: 0x08000000 -> 0x00000000 Debug: 1410 1164 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar44: 0x3ffae270 -> 0x00000000 Debug: 1411 1164 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar43: 0xfffffff7 -> 0x00000000 Debug: 1412 1165 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar42: 0x3ff00044 -> 0x00000000 Debug: 1413 1165 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar41: 0x000008ef -> 0x00000000 Debug: 1414 1165 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar40: 0xffffffc0 -> 0x00000000 Debug: 1415 1166 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar39: 0x00000010 -> 0x00000000 Debug: 1416 1166 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar38: 0x50000000 -> 0x00000000 Debug: 1417 1166 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar37: 0x3ffc0800 -> 0x00000000 Debug: 1418 1167 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar36: 0x00000008 -> 0x00000000 Debug: 1419 1167 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar35: 0x0000002f -> 0x00000000 Debug: 1420 1167 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar33: 0x3ffc0780 -> 0x00000000 Debug: 1421 1168 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar32: 0x80090a3d -> 0x00000000 Debug: 1422 1168 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar31: 0x3ff10000 -> 0x00000000 Debug: 1423 1168 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar29: 0x00000003 -> 0x00000000 Debug: 1424 1169 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar28: 0x3ff10008 -> 0x00000000 Debug: 1425 1169 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar27: 0x00000003 -> 0x00000000 Debug: 1426 1170 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar26: 0x003fffff -> 0x00000000 Debug: 1427 1170 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar25: 0x50000000 -> 0x00000000 Debug: 1428 1170 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar24: 0x00000006 -> 0x00000000 Debug: 1429 1171 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar23: 0x3ff10000 -> 0x00000000 Debug: 1430 1171 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar22: 0x00000006 -> 0x00000000 Debug: 1431 1171 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar20: 0x00000002 -> 0x00000000 Debug: 1432 1172 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar19: 0x3ffc08ec -> 0x00000000 Debug: 1433 1172 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar17: 0x3ffc07e0 -> 0x00000000 Debug: 1434 1172 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar16: 0x800928cf -> 0x00000000 Debug: 1435 1173 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar15: 0x000050aa -> 0x00000000 Debug: 1436 1173 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar13: 0x00400000 -> 0x00000000 Debug: 1437 1173 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar12: 0x0020a400 -> 0x00000000 Debug: 1438 1174 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar11: 0x00000001 -> 0x00000000 Debug: 1439 1174 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar9: 0x3ffc0820 -> 0x00000000 Debug: 1440 1174 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar8: 0x80092aec -> 0x00000000 Debug: 1441 1175 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar4: 0x3ffc08ec -> 0x00000000 Debug: 1442 1175 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar3: 0xffffffff -> 0x00000000 Debug: 1443 1175 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar1: 0x3ffc08d0 -> 0x00000000 Debug: 1444 1176 xtensa.c:2291 xtensa_wait_algorithm(): restoring register pc: 0x40092aee -> 0x40000400 Debug: 1445 1176 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 1446 1176 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40000400 Debug: 1447 1177 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg lbeg val 00000000 Debug: 1448 1177 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg lend val 00000000 Debug: 1449 1177 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg lcount val 00000000 Debug: 1450 1178 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg sar val 00000000 Debug: 1451 1178 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg configid0 val 40000400 Debug: 1452 1178 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 0000001F Debug: 1453 1179 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg scompare1 val 00000000 Debug: 1454 1179 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg epc6 val 40000400 Debug: 1455 1180 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg eps6 val 0000001F Debug: 1456 1180 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ccount val 00000004 Debug: 1457 1181 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 1458 1181 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 00000000, num =2 Debug: 1459 1182 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value 00000000, num =4 Debug: 1460 1182 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a4 value 00000000, num =5 Debug: 1461 1183 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 00000000, num =9 Debug: 1462 1183 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a9 value 00000000, num =10 Debug: 1463 1184 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a11 value 00000000, num =12 Debug: 1464 1184 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a12 value 00000000, num =13 Debug: 1465 1185 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a13 value 00000000, num =14 Debug: 1466 1185 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a15 value 00000000, num =16 Debug: 1467 1185 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar1 value 00000000, num =1 Debug: 1468 1186 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar3 value 00000000, num =3 Debug: 1469 1186 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar4 value 00000000, num =4 Debug: 1470 1186 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar8 value 00000000, num =8 Debug: 1471 1187 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar9 value 00000000, num =9 Debug: 1472 1187 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar11 value 00000000, num =11 Debug: 1473 1188 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar12 value 00000000, num =12 Debug: 1474 1188 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar13 value 00000000, num =13 Debug: 1475 1188 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar15 value 00000000, num =15 Debug: 1476 1189 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar16 value 00000000, num =16 Debug: 1477 1189 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar17 value 00000000, num =17 Debug: 1478 1189 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar19 value 00000000, num =19 Debug: 1479 1190 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar20 value 00000000, num =20 Debug: 1480 1190 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar22 value 00000000, num =22 Debug: 1481 1191 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar23 value 00000000, num =23 Debug: 1482 1191 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar24 value 00000000, num =24 Debug: 1483 1191 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar25 value 00000000, num =25 Debug: 1484 1192 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar26 value 00000000, num =26 Debug: 1485 1192 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar27 value 00000000, num =27 Debug: 1486 1192 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar28 value 00000000, num =28 Debug: 1487 1193 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar29 value 00000000, num =29 Debug: 1488 1193 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar31 value 00000000, num =31 Debug: 1489 1194 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar32 value 00000000, num =32 Debug: 1490 1194 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar33 value 00000000, num =33 Debug: 1491 1194 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar35 value 00000000, num =35 Debug: 1492 1195 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar36 value 00000000, num =36 Debug: 1493 1195 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar37 value 00000000, num =37 Debug: 1494 1196 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar38 value 00000000, num =38 Debug: 1495 1196 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar39 value 00000000, num =39 Debug: 1496 1196 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar40 value 00000000, num =40 Debug: 1497 1197 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar41 value 00000000, num =41 Debug: 1498 1197 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar42 value 00000000, num =42 Debug: 1499 1197 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar43 value 00000000, num =43 Debug: 1500 1198 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar44 value 00000000, num =44 Debug: 1501 1198 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar45 value 00000000, num =45 Debug: 1502 1199 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar48 value 00000000, num =48 Debug: 1503 1199 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar49 value 00000000, num =49 Debug: 1504 1200 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar50 value 00000000, num =50 Debug: 1505 1200 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar51 value 00000000, num =51 Debug: 1506 1200 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar56 value 00000000, num =56 Debug: 1507 1201 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar57 value 00000000, num =57 Debug: 1508 1201 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar58 value 00000000, num =58 Debug: 1509 1202 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar59 value 00000000, num =59 Debug: 1510 1202 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar60 value 00000000, num =60 Debug: 1511 1202 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar61 value 00000000, num =61 Debug: 1512 1204 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1513 1205 algorithm.c:274 algorithm_run(): Got algorithm RC 0x0 Debug: 1514 1205 target.c:2185 target_free_working_area_restore(): freed 28 bytes of working area at address 0x3ffc08ec Debug: 1515 1205 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1516 1206 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc08eb (1300 bytes) Debug: 1517 1206 target.c:1964 print_wa_layout(): 0x3ffc08ec-0x3ffd7fff (96020 bytes) Debug: 1518 1206 target.c:2185 target_free_working_area_restore(): freed 28 bytes of working area at address 0x40092ad8 Debug: 1519 1207 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 1520 1207 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 1521 1207 target.c:2185 target_free_working_area_restore(): freed 1300 bytes of working area at address 0x3ffc03d8 Debug: 1522 1208 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1523 1208 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 1524 1208 target.c:2185 target_free_working_area_restore(): freed 10968 bytes of working area at address 0x40090000 Debug: 1525 1209 target.c:1964 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 1526 1209 target.c:2185 target_free_working_area_restore(): freed 984 bytes of working area at address 0x3ffc0000 Debug: 1527 1209 target.c:1964 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 1528 1210 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x30000 clear=0x600000 Debug: 1529 1210 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=30000, state=2 Info : 1530 1210 esp_flash.c:403 esp_flash_get_mappings(): Flash mapping 0: 0x10020 -> 0x3f400020, 123 KB Info : 1531 1211 esp_flash.c:403 esp_flash_get_mappings(): Flash mapping 1: 0x30020 -> 0x400d0020, 672 KB Debug: 1532 1211 esp_flash.c:242 esp_flasher_algorithm_init(): base=00000000 set=0 Debug: 1533 1212 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1534 1212 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x0 clear=0x630000 Debug: 1535 1213 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=0, state=2 Debug: 1536 1213 algorithm.c:339 algorithm_load_func_image(): stub: base 0x0, start 0x40092584, 2 sections Debug: 1537 1214 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 10967, flags 1 Debug: 1538 1214 target.c:2097 alloc_working_area_try_do(): allocated new working area of 10968 bytes at address 0x40090000 Debug: 1539 1215 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 1540 1215 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 1541 1215 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090000 Debug: 1542 1218 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1543 1219 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090200 Debug: 1544 1222 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1545 1222 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090400 Debug: 1546 1226 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1547 1226 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090600 Debug: 1548 1230 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1549 1230 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090800 Debug: 1550 1234 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1551 1234 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 Debug: 1552 1238 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1553 1238 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 Debug: 1554 1241 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1555 1241 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 Debug: 1556 1245 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1557 1246 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091000 Debug: 1558 1249 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1559 1249 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091200 Debug: 1560 1253 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1561 1253 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091400 Debug: 1562 1256 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1563 1257 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091600 Debug: 1564 1260 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1565 1260 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091800 Debug: 1566 1263 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1567 1264 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 Debug: 1568 1267 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1569 1267 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 Debug: 1570 1270 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1571 1271 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 Debug: 1572 1274 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1573 1274 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092000 Debug: 1574 1278 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1575 1278 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092200 Debug: 1576 1281 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1577 1282 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092400 Debug: 1578 1285 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1579 1285 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092600 Debug: 1580 1289 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1581 1289 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092800 Debug: 1582 1293 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1583 1294 target.c:2445 target_write_buffer(): writing buffer of 215 byte at 0x40092a00 Debug: 1584 1298 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1585 1300 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1586 1300 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 928, flags 0 Debug: 1587 1300 algorithm.c:376 algorithm_load_func_image(): DATA sec size 928 -> 928 Debug: 1588 1301 algorithm.c:379 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 1589 1301 target.c:2097 alloc_working_area_try_do(): allocated new working area of 984 bytes at address 0x3ffc0000 Debug: 1590 1301 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1591 1301 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 1592 1302 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 Debug: 1593 1305 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1594 1305 target.c:2445 target_write_buffer(): writing buffer of 416 byte at 0x3ffc0200 Debug: 1595 1309 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1596 1309 target.c:2097 alloc_working_area_try_do(): allocated new working area of 1024 bytes at address 0x3ffc03d8 Debug: 1597 1309 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1598 1310 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc07d7 (1024 bytes) Debug: 1599 1310 target.c:1964 print_wa_layout(): 0x3ffc07d8-0x3ffd7fff (96296 bytes) Debug: 1600 1310 target.c:2097 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x40092ad8 Debug: 1601 1311 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 1602 1311 target.c:1964 print_wa_layout(): * 0x40092ad8-0x40092af3 (28 bytes) Debug: 1603 1311 target.c:1964 print_wa_layout(): 0x40092af4-0x40093fff (5388 bytes) Debug: 1604 1311 target.c:2445 target_write_buffer(): writing buffer of 28 byte at 0x40092ad8 Debug: 1605 1313 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1606 1313 algorithm.c:462 algorithm_load_func_image(): Stub loaded in 99.998 ms Debug: 1607 1314 xtensa_algorithm.c:112 xtensa_algo_init(): reg params count 7 (6/1). Debug: 1608 1314 xtensa_algorithm.c:59 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc07d8 Debug: 1609 1314 xtensa_algorithm.c:62 xtensa_algo_regs_init_start(): Adjust stack addr to 0x3ffc07d0 Debug: 1610 1315 xtensa_algorithm.c:127 xtensa_algo_init(): Set arg[0] = 4 (a2) Debug: 1611 1315 algorithm.c:224 algorithm_run(): Algorithm start @ 0x40092ad8, stack 1024 bytes @ 0x3ffc07d8 Debug: 1612 1315 xtensa.c:1251 xtensa_resume(): esp32.cpu0 Debug: 1613 1316 xtensa.c:1180 xtensa_prepare_resume(): esp32.cpu0: current=0 address=0x40092ad8, handle_breakpoints=1, debug_execution=1) Debug: 1614 1316 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 1615 1316 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40092AD8 Debug: 1616 1317 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowbase val 00000000 Debug: 1617 1317 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowstart val 00000001 Debug: 1618 1318 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 00060025 Debug: 1619 1318 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 1620 1318 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a0 value 00000000, num =1 Debug: 1621 1319 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 3FFC07C0, num =2 Debug: 1622 1319 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a2 value 00000004, num =3 Debug: 1623 1320 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value 00000000, num =4 Debug: 1624 1320 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 40092584, num =9 Debug: 1625 1322 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1626 1322 xtensa.c:1233 xtensa_do_resume(): esp32.cpu0: start Debug: 1627 1324 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1628 1324 target.c:1849 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 1629 1324 esp32.c:523 esp32_handle_target_event(): 2 Debug: 1630 1325 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 2 Debug: 1631 1325 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 2 Debug: 1632 1325 xtensa.c:2447 xtensa_handle_target_event(): 2 Debug: 1633 1325 algorithm.c:246 algorithm_run(): Wait algorithm completion Debug: 1634 1328 xtensa.c:890 xtensa_fetch_all_regs(): esp32.cpu0: start Debug: 1635 1332 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1636 1337 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1637 1340 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1638 1340 xtensa.c:1858 xtensa_poll(): esp32.cpu0: Target halted, pc=0x40092AEE, debug_reason=00000001, oldstate=00000004 Debug: 1639 1340 xtensa.c:1863 xtensa_poll(): esp32.cpu0: Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11 Info : 1640 1341 xtensa.c:1866 xtensa_poll(): esp32.cpu0: Target halted, PC=0x40092AEE, debug_reason=00000001 Debug: 1641 1342 esp_xtensa_smp.c:257 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 1642 1342 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 1643 1343 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 1644 1343 esp_xtensa_smp.c:314 esp_xtensa_smp_update_halt_gdb(): exit Debug: 1645 1343 target.c:1849 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32.cpu0 Debug: 1646 1344 esp32.c:523 esp32_handle_target_event(): 17 Debug: 1647 1344 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 17 Debug: 1648 1344 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 17 Debug: 1649 1344 xtensa.c:2447 xtensa_handle_target_event(): 17 Debug: 1650 1345 xtensa.c:2260 xtensa_wait_algorithm(): Read mem params Debug: 1651 1345 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a15: 0x00000004 -> 0x00000000 Debug: 1652 1345 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a14: 0x00400000 -> 0x00000000 Debug: 1653 1346 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a12: 0x0020a400 -> 0x00000000 Debug: 1654 1346 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a11: 0x00000001 -> 0x00000000 Debug: 1655 1347 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a10: 0x00400000 -> 0x00000000 Debug: 1656 1347 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a9: 0x3ffc0710 -> 0x00000000 Debug: 1657 1348 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a8: 0x80092aec -> 0x00000000 Debug: 1658 1348 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a2: 0x00400000 -> 0x00000000 Debug: 1659 1349 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a1: 0x3ffc07c0 -> 0x00000000 Debug: 1660 1349 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ccount: 0x0002fa01 -> 0x00000004 Debug: 1661 1349 xtensa.c:2281 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000020 Debug: 1662 1350 xtensa.c:2291 xtensa_wait_algorithm(): restoring register eps6: 0x00060025 -> 0x0000001f Debug: 1663 1350 xtensa.c:2291 xtensa_wait_algorithm(): restoring register epc6: 0x40092aee -> 0x40000400 Debug: 1664 1350 xtensa.c:2291 xtensa_wait_algorithm(): restoring register scompare1: 0xb33fffff -> 0x00000000 Debug: 1665 1351 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ps: 0x00060025 -> 0x0000001f Debug: 1666 1351 xtensa.c:2291 xtensa_wait_algorithm(): restoring register configid0: 0x40092aee -> 0x40000400 Debug: 1667 1352 xtensa.c:2291 xtensa_wait_algorithm(): restoring register sar: 0x00000006 -> 0x00000000 Debug: 1668 1352 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar61: 0x00060023 -> 0x00000000 Debug: 1669 1352 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar60: 0x00060025 -> 0x00000000 Debug: 1670 1353 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar59: 0x00060023 -> 0x00000000 Debug: 1671 1353 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar58: 0x00000003 -> 0x00000000 Debug: 1672 1353 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar57: 0x3ffc05f0 -> 0x00000000 Debug: 1673 1354 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar56: 0x80094d61 -> 0x00000000 Debug: 1674 1354 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar51: 0x3ffc3378 -> 0x00000000 Debug: 1675 1354 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar50: 0x3ffc3378 -> 0x00000000 Debug: 1676 1355 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar49: 0x3ffc0600 -> 0x00000000 Debug: 1677 1355 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar48: 0x8008cb0a -> 0x00000000 Debug: 1678 1355 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar42: 0x000000a3 -> 0x00000000 Debug: 1679 1356 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar41: 0x3ffc0640 -> 0x00000000 Debug: 1680 1356 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar40: 0x80008547 -> 0x00000000 Debug: 1681 1356 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar38: 0x02000000 -> 0x00000000 Debug: 1682 1357 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar36: 0x000000c6 -> 0x00000000 Debug: 1683 1357 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar34: 0x0000bb83 -> 0x00000000 Debug: 1684 1357 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar33: 0x3ffc0660 -> 0x00000000 Debug: 1685 1358 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar32: 0x80008547 -> 0x00000000 Debug: 1686 1358 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar31: 0x00040000 -> 0x00000000 Debug: 1687 1358 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar30: 0x80000040 -> 0x00000000 Debug: 1688 1359 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar29: 0x70000000 -> 0x00000000 Debug: 1689 1359 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar28: 0x3ff42000 -> 0x00000000 Debug: 1690 1359 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar27: 0x3ff42010 -> 0x00000000 Debug: 1691 1360 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar26: 0x3ffae270 -> 0x00000000 Debug: 1692 1360 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar24: 0x3ff42024 -> 0x00000000 Debug: 1693 1360 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar23: 0x00000100 -> 0x00000000 Debug: 1694 1361 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar22: 0x80000040 -> 0x00000000 Debug: 1695 1361 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar21: 0x5c000007 -> 0x00000000 Debug: 1696 1361 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar20: 0x70000000 -> 0x00000000 Debug: 1697 1362 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar19: 0x00400000 -> 0x00000000 Debug: 1698 1362 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar17: 0x3ffc06f0 -> 0x00000000 Debug: 1699 1362 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar16: 0x8009273c -> 0x00000000 Debug: 1700 1363 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar15: 0x00000004 -> 0x00000000 Debug: 1701 1363 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar14: 0x00400000 -> 0x00000000 Debug: 1702 1363 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar12: 0x0020a400 -> 0x00000000 Debug: 1703 1364 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar11: 0x00000001 -> 0x00000000 Debug: 1704 1364 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar10: 0x00400000 -> 0x00000000 Debug: 1705 1364 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar9: 0x3ffc0710 -> 0x00000000 Debug: 1706 1365 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar8: 0x80092aec -> 0x00000000 Debug: 1707 1365 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar2: 0x00400000 -> 0x00000000 Debug: 1708 1365 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar1: 0x3ffc07c0 -> 0x00000000 Debug: 1709 1366 xtensa.c:2291 xtensa_wait_algorithm(): restoring register pc: 0x40092aee -> 0x40000400 Debug: 1710 1366 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 1711 1366 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40000400 Debug: 1712 1367 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg sar val 00000000 Debug: 1713 1367 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg configid0 val 40000400 Debug: 1714 1368 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 0000001F Debug: 1715 1368 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg scompare1 val 00000000 Debug: 1716 1368 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg epc6 val 40000400 Debug: 1717 1369 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg eps6 val 0000001F Debug: 1718 1369 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ccount val 00000004 Debug: 1719 1369 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 1720 1370 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 00000000, num =2 Debug: 1721 1370 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a2 value 00000000, num =3 Debug: 1722 1370 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value 00000000, num =4 Debug: 1723 1371 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 00000000, num =9 Debug: 1724 1371 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a9 value 00000000, num =10 Debug: 1725 1372 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a10 value 00000000, num =11 Debug: 1726 1372 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a11 value 00000000, num =12 Debug: 1727 1372 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a12 value 00000000, num =13 Debug: 1728 1373 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a14 value 00000000, num =15 Debug: 1729 1373 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a15 value 00000000, num =16 Debug: 1730 1374 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar1 value 00000000, num =1 Debug: 1731 1374 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar2 value 00000000, num =2 Debug: 1732 1374 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar8 value 00000000, num =8 Debug: 1733 1375 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar9 value 00000000, num =9 Debug: 1734 1375 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar10 value 00000000, num =10 Debug: 1735 1376 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar11 value 00000000, num =11 Debug: 1736 1376 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar12 value 00000000, num =12 Debug: 1737 1376 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar14 value 00000000, num =14 Debug: 1738 1377 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar15 value 00000000, num =15 Debug: 1739 1377 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar16 value 00000000, num =16 Debug: 1740 1377 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar17 value 00000000, num =17 Debug: 1741 1378 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar19 value 00000000, num =19 Debug: 1742 1378 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar20 value 00000000, num =20 Debug: 1743 1379 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar21 value 00000000, num =21 Debug: 1744 1379 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar22 value 00000000, num =22 Debug: 1745 1379 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar23 value 00000000, num =23 Debug: 1746 1380 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar24 value 00000000, num =24 Debug: 1747 1380 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar26 value 00000000, num =26 Debug: 1748 1381 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar27 value 00000000, num =27 Debug: 1749 1381 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar28 value 00000000, num =28 Debug: 1750 1381 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar29 value 00000000, num =29 Debug: 1751 1382 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar30 value 00000000, num =30 Debug: 1752 1382 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar31 value 00000000, num =31 Debug: 1753 1382 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar32 value 00000000, num =32 Debug: 1754 1383 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar33 value 00000000, num =33 Debug: 1755 1383 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar34 value 00000000, num =34 Debug: 1756 1384 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar36 value 00000000, num =36 Debug: 1757 1384 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar38 value 00000000, num =38 Debug: 1758 1384 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar40 value 00000000, num =40 Debug: 1759 1385 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar41 value 00000000, num =41 Debug: 1760 1385 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar42 value 00000000, num =42 Debug: 1761 1386 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar48 value 00000000, num =48 Debug: 1762 1386 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar49 value 00000000, num =49 Debug: 1763 1386 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar50 value 00000000, num =50 Debug: 1764 1387 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar51 value 00000000, num =51 Debug: 1765 1387 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar56 value 00000000, num =56 Debug: 1766 1387 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar57 value 00000000, num =57 Debug: 1767 1388 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar58 value 00000000, num =58 Debug: 1768 1388 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar59 value 00000000, num =59 Debug: 1769 1389 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar60 value 00000000, num =60 Debug: 1770 1389 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar61 value 00000000, num =61 Debug: 1771 1391 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1772 1391 algorithm.c:274 algorithm_run(): Got algorithm RC 0x400000 Debug: 1773 1392 target.c:2185 target_free_working_area_restore(): freed 28 bytes of working area at address 0x40092ad8 Debug: 1774 1392 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 1775 1392 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 1776 1393 target.c:2185 target_free_working_area_restore(): freed 1024 bytes of working area at address 0x3ffc03d8 Debug: 1777 1393 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1778 1393 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 1779 1394 target.c:2185 target_free_working_area_restore(): freed 10968 bytes of working area at address 0x40090000 Debug: 1780 1394 target.c:1964 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 1781 1394 target.c:2185 target_free_working_area_restore(): freed 984 bytes of working area at address 0x3ffc0000 Debug: 1782 1395 target.c:1964 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 1783 1395 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x30000 clear=0x600000 Debug: 1784 1396 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=30000, state=2 Debug: 1785 1396 esp_flash.c:346 esp_flash_get_size(): esp_flash_get_size size 0x400000 Info : 1786 1396 esp_flash.c:984 esp_flash_probe(): Auto-detected flash bank 'esp32.cpu1.flash' size 4096 KB Info : 1787 1397 esp_flash.c:986 esp_flash_probe(): Using flash bank 'esp32.cpu1.flash' size 4096 KB Debug: 1788 1397 esp_flash.c:1003 esp_flash_probe(): allocated 1024 sectors Debug: 1789 1397 command.c:146 script_debug(): command - echo ** Programming Started ** User : 1791 1402 command.c:769 jim_echo(): ** Programming Started ** Debug: 1792 1402 command.c:146 script_debug(): command - esp flash_stub_clock_boost on Debug: 1794 1406 esp_flash.c:1513 esp_flash_parse_cmd_clock_boost(): Clock boost is on Debug: 1795 1406 esp_flash.c:242 esp_flasher_algorithm_init(): base=00000000 set=0 Debug: 1796 1407 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1797 1407 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x0 clear=0x630000 Debug: 1798 1408 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=0, state=2 Debug: 1799 1408 algorithm.c:339 algorithm_load_func_image(): stub: base 0x0, start 0x40092584, 2 sections Debug: 1800 1409 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 10967, flags 1 Debug: 1801 1409 target.c:2097 alloc_working_area_try_do(): allocated new working area of 10968 bytes at address 0x40090000 Debug: 1802 1410 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 1803 1410 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 1804 1410 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090000 Debug: 1805 1414 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1806 1414 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090200 Debug: 1807 1418 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1808 1418 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090400 Debug: 1809 1421 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1810 1421 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090600 Debug: 1811 1425 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1812 1425 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090800 Debug: 1813 1428 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1814 1428 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 Debug: 1815 1432 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1816 1432 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 Debug: 1817 1435 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1818 1436 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 Debug: 1819 1439 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1820 1439 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091000 Debug: 1821 1442 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1822 1443 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091200 Debug: 1823 1446 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1824 1446 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091400 Debug: 1825 1449 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1826 1450 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091600 Debug: 1827 1453 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1828 1453 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091800 Debug: 1829 1457 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1830 1457 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 Debug: 1831 1460 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1832 1460 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 Debug: 1833 1464 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1834 1465 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 Debug: 1835 1468 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1836 1468 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092000 Debug: 1837 1471 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1838 1472 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092200 Debug: 1839 1475 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1840 1475 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092400 Debug: 1841 1479 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1842 1479 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092600 Debug: 1843 1483 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1844 1483 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092800 Debug: 1845 1486 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1846 1486 target.c:2445 target_write_buffer(): writing buffer of 215 byte at 0x40092a00 Debug: 1847 1488 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1848 1489 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1849 1490 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 928, flags 0 Debug: 1850 1490 algorithm.c:376 algorithm_load_func_image(): DATA sec size 928 -> 928 Debug: 1851 1490 algorithm.c:379 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 1852 1491 target.c:2097 alloc_working_area_try_do(): allocated new working area of 984 bytes at address 0x3ffc0000 Debug: 1853 1491 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1854 1491 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 1855 1492 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 Debug: 1856 1496 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1857 1496 target.c:2445 target_write_buffer(): writing buffer of 416 byte at 0x3ffc0200 Debug: 1858 1499 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1859 1499 target.c:2097 alloc_working_area_try_do(): allocated new working area of 1024 bytes at address 0x3ffc03d8 Debug: 1860 1499 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 1861 1500 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc07d7 (1024 bytes) Debug: 1862 1500 target.c:1964 print_wa_layout(): 0x3ffc07d8-0x3ffd7fff (96296 bytes) Debug: 1863 1500 target.c:2097 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x40092ad8 Debug: 1864 1501 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 1865 1501 target.c:1964 print_wa_layout(): * 0x40092ad8-0x40092af3 (28 bytes) Debug: 1866 1501 target.c:1964 print_wa_layout(): 0x40092af4-0x40093fff (5388 bytes) Debug: 1867 1501 target.c:2445 target_write_buffer(): writing buffer of 28 byte at 0x40092ad8 Debug: 1868 1503 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1869 1503 algorithm.c:462 algorithm_load_func_image(): Stub loaded in 94.999 ms Debug: 1870 1504 xtensa_algorithm.c:112 xtensa_algo_init(): reg params count 8 (6/2). Debug: 1871 1504 xtensa_algorithm.c:59 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc07d8 Debug: 1872 1504 xtensa_algorithm.c:62 xtensa_algo_regs_init_start(): Adjust stack addr to 0x3ffc07d0 Debug: 1873 1505 xtensa_algorithm.c:127 xtensa_algo_init(): Set arg[0] = 11 (a2) Debug: 1874 1505 xtensa_algorithm.c:137 xtensa_algo_init(): Set arg[1] = -1 (a3) Debug: 1875 1505 algorithm.c:224 algorithm_run(): Algorithm start @ 0x40092ad8, stack 1024 bytes @ 0x3ffc07d8 Debug: 1876 1506 xtensa.c:1251 xtensa_resume(): esp32.cpu0 Debug: 1877 1506 xtensa.c:1180 xtensa_prepare_resume(): esp32.cpu0: current=0 address=0x40092ad8, handle_breakpoints=1, debug_execution=1) Debug: 1878 1506 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 1879 1507 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40092AD8 Debug: 1880 1507 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowbase val 00000000 Debug: 1881 1507 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowstart val 00000001 Debug: 1882 1508 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 00060025 Debug: 1883 1508 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 1884 1508 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a0 value 00000000, num =1 Debug: 1885 1509 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 3FFC07C0, num =2 Debug: 1886 1509 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a2 value 0000000B, num =3 Debug: 1887 1510 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value FFFFFFFF, num =4 Debug: 1888 1510 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 40092584, num =9 Debug: 1890 1512 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1891 1512 xtensa.c:1233 xtensa_do_resume(): esp32.cpu0: start Debug: 1892 1513 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC01) Debug: 1893 1514 target.c:1849 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 1894 1514 esp32.c:523 esp32_handle_target_event(): 2 Debug: 1895 1514 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 2 Debug: 1896 1514 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 2 Debug: 1897 1515 xtensa.c:2447 xtensa_handle_target_event(): 2 Debug: 1898 1515 algorithm.c:246 algorithm_run(): Wait algorithm completion Debug: 1899 1517 xtensa.c:890 xtensa_fetch_all_regs(): esp32.cpu0: start Debug: 1900 1520 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1901 1525 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1902 1527 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 1903 1527 xtensa.c:1858 xtensa_poll(): esp32.cpu0: Target halted, pc=0x40092AEE, debug_reason=00000001, oldstate=00000004 Debug: 1904 1527 xtensa.c:1863 xtensa_poll(): esp32.cpu0: Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11 Info : 1905 1528 xtensa.c:1866 xtensa_poll(): esp32.cpu0: Target halted, PC=0x40092AEE, debug_reason=00000001 Debug: 1906 1530 esp_xtensa_smp.c:257 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 1907 1531 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 1908 1531 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 1909 1531 esp_xtensa_smp.c:314 esp_xtensa_smp_update_halt_gdb(): exit Debug: 1910 1531 target.c:1849 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32.cpu0 Debug: 1911 1532 esp32.c:523 esp32_handle_target_event(): 17 Debug: 1912 1532 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 17 Debug: 1913 1532 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 17 Debug: 1914 1533 xtensa.c:2447 xtensa_handle_target_event(): 17 Debug: 1915 1533 xtensa.c:2260 xtensa_wait_algorithm(): Read mem params Debug: 1916 1533 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a15: 0x400929c0 -> 0x00000000 Debug: 1917 1534 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a14: 0x000000f0 -> 0x00000000 Debug: 1918 1534 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a12: 0x0020a400 -> 0x00000000 Debug: 1919 1535 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a11: 0x00000001 -> 0x00000000 Debug: 1920 1535 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a10: 0x000000f0 -> 0x00000000 Debug: 1921 1536 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a9: 0x3ffc0710 -> 0x00000000 Debug: 1922 1536 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a8: 0x80092aec -> 0x00000000 Debug: 1923 1536 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a3: 0xffffffff -> 0x00000000 Debug: 1924 1537 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a2: 0x000000f0 -> 0x00000000 Debug: 1925 1537 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a1: 0x3ffc07c0 -> 0x00000000 Debug: 1926 1538 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ccount: 0x001a9541 -> 0x00000004 Debug: 1927 1538 xtensa.c:2281 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000020 Debug: 1928 1539 xtensa.c:2291 xtensa_wait_algorithm(): restoring register eps6: 0x00060025 -> 0x0000001f Debug: 1929 1539 xtensa.c:2291 xtensa_wait_algorithm(): restoring register epc6: 0x40092aee -> 0x40000400 Debug: 1930 1539 xtensa.c:2291 xtensa_wait_algorithm(): restoring register scompare1: 0xb33fffff -> 0x00000000 Debug: 1931 1540 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ps: 0x00060025 -> 0x0000001f Debug: 1932 1540 xtensa.c:2291 xtensa_wait_algorithm(): restoring register configid0: 0x40092aee -> 0x40000400 Debug: 1933 1540 xtensa.c:2291 xtensa_wait_algorithm(): restoring register sar: 0x00000006 -> 0x00000000 Debug: 1934 1541 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar61: 0x00060023 -> 0x00000000 Debug: 1935 1541 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar60: 0x00060025 -> 0x00000000 Debug: 1936 1541 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar59: 0x00060023 -> 0x00000000 Debug: 1937 1542 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar58: 0x00000003 -> 0x00000000 Debug: 1938 1542 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar57: 0x3ffc05f0 -> 0x00000000 Debug: 1939 1542 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar56: 0x80094d61 -> 0x00000000 Debug: 1940 1543 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar51: 0x3ffc3378 -> 0x00000000 Debug: 1941 1543 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar50: 0x3ffc3378 -> 0x00000000 Debug: 1942 1543 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar49: 0x3ffc0600 -> 0x00000000 Debug: 1943 1544 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar48: 0x8008cb0a -> 0x00000000 Debug: 1944 1544 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar45: 0x08000000 -> 0x00000000 Debug: 1945 1545 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar44: 0x3ffae270 -> 0x00000000 Debug: 1946 1545 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar43: 0x3ff42000 -> 0x00000000 Debug: 1947 1545 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar42: 0x000000a3 -> 0x00000000 Debug: 1948 1546 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar41: 0x3ffc0640 -> 0x00000000 Debug: 1949 1546 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar40: 0x80008547 -> 0x00000000 Debug: 1950 1546 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar38: 0x02000000 -> 0x00000000 Debug: 1951 1547 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar36: 0x000000c6 -> 0x00000000 Debug: 1952 1547 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar34: 0x0000bb83 -> 0x00000000 Debug: 1953 1547 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar33: 0x3ffc0660 -> 0x00000000 Debug: 1954 1548 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar32: 0x80008547 -> 0x00000000 Debug: 1955 1548 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar28: 0x0000d502 -> 0x00000000 Debug: 1956 1548 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar27: 0x0019d947 -> 0x00000000 Debug: 1957 1549 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar26: 0x0000bb80 -> 0x00000000 Debug: 1958 1549 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar25: 0x3ffc0670 -> 0x00000000 Debug: 1959 1549 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar24: 0x800915bd -> 0x00000000 Debug: 1960 1550 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar23: 0x00000100 -> 0x00000000 Debug: 1961 1550 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar21: 0x09580010 -> 0x00000000 Debug: 1962 1550 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar20: 0x09580010 -> 0x00000000 Debug: 1963 1551 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar19: 0x3ffc0074 -> 0x00000000 Debug: 1964 1551 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar17: 0x3ffc0690 -> 0x00000000 Debug: 1965 1551 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar16: 0x800929c5 -> 0x00000000 Debug: 1966 1552 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar15: 0x400929c0 -> 0x00000000 Debug: 1967 1552 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar14: 0x000000f0 -> 0x00000000 Debug: 1968 1552 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar12: 0x0020a400 -> 0x00000000 Debug: 1969 1553 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar11: 0x00000001 -> 0x00000000 Debug: 1970 1553 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar10: 0x000000f0 -> 0x00000000 Debug: 1971 1553 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar9: 0x3ffc0710 -> 0x00000000 Debug: 1972 1554 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar8: 0x80092aec -> 0x00000000 Debug: 1973 1554 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar3: 0xffffffff -> 0x00000000 Debug: 1974 1554 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar2: 0x000000f0 -> 0x00000000 Debug: 1975 1555 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar1: 0x3ffc07c0 -> 0x00000000 Debug: 1976 1555 xtensa.c:2291 xtensa_wait_algorithm(): restoring register pc: 0x40092aee -> 0x40000400 Debug: 1977 1555 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 1978 1556 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40000400 Debug: 1979 1556 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg sar val 00000000 Debug: 1980 1556 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg configid0 val 40000400 Debug: 1981 1557 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 0000001F Debug: 1982 1557 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg scompare1 val 00000000 Debug: 1983 1557 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg epc6 val 40000400 Debug: 1984 1558 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg eps6 val 0000001F Debug: 1985 1558 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ccount val 00000004 Debug: 1986 1558 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 1987 1559 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 00000000, num =2 Debug: 1988 1559 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a2 value 00000000, num =3 Debug: 1989 1559 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value 00000000, num =4 Debug: 1990 1560 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 00000000, num =9 Debug: 1991 1560 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a9 value 00000000, num =10 Debug: 1992 1561 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a10 value 00000000, num =11 Debug: 1993 1561 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a11 value 00000000, num =12 Debug: 1994 1561 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a12 value 00000000, num =13 Debug: 1995 1562 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a14 value 00000000, num =15 Debug: 1996 1562 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a15 value 00000000, num =16 Debug: 1997 1563 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar1 value 00000000, num =1 Debug: 1998 1563 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar2 value 00000000, num =2 Debug: 1999 1563 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar3 value 00000000, num =3 Debug: 2000 1564 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar8 value 00000000, num =8 Debug: 2001 1565 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar9 value 00000000, num =9 Debug: 2002 1565 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar10 value 00000000, num =10 Debug: 2003 1566 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar11 value 00000000, num =11 Debug: 2004 1566 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar12 value 00000000, num =12 Debug: 2005 1566 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar14 value 00000000, num =14 Debug: 2006 1567 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar15 value 00000000, num =15 Debug: 2007 1567 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar16 value 00000000, num =16 Debug: 2008 1568 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar17 value 00000000, num =17 Debug: 2009 1568 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar19 value 00000000, num =19 Debug: 2010 1568 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar20 value 00000000, num =20 Debug: 2011 1569 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar21 value 00000000, num =21 Debug: 2012 1569 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar23 value 00000000, num =23 Debug: 2013 1569 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar24 value 00000000, num =24 Debug: 2014 1570 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar25 value 00000000, num =25 Debug: 2015 1570 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar26 value 00000000, num =26 Debug: 2016 1571 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar27 value 00000000, num =27 Debug: 2017 1571 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar28 value 00000000, num =28 Debug: 2018 1571 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar32 value 00000000, num =32 Debug: 2019 1572 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar33 value 00000000, num =33 Debug: 2020 1572 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar34 value 00000000, num =34 Debug: 2021 1573 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar36 value 00000000, num =36 Debug: 2022 1573 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar38 value 00000000, num =38 Debug: 2023 1573 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar40 value 00000000, num =40 Debug: 2024 1574 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar41 value 00000000, num =41 Debug: 2025 1574 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar42 value 00000000, num =42 Debug: 2026 1574 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar43 value 00000000, num =43 Debug: 2027 1575 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar44 value 00000000, num =44 Debug: 2028 1575 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar45 value 00000000, num =45 Debug: 2029 1576 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar48 value 00000000, num =48 Debug: 2030 1577 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar49 value 00000000, num =49 Debug: 2031 1577 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar50 value 00000000, num =50 Debug: 2032 1578 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar51 value 00000000, num =51 Debug: 2033 1578 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar56 value 00000000, num =56 Debug: 2034 1579 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar57 value 00000000, num =57 Debug: 2035 1579 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar58 value 00000000, num =58 Debug: 2036 1580 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar59 value 00000000, num =59 Debug: 2037 1580 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar60 value 00000000, num =60 Debug: 2038 1581 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar61 value 00000000, num =61 Debug: 2039 1583 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2040 1583 algorithm.c:274 algorithm_run(): Got algorithm RC 0xf0 Debug: 2041 1583 target.c:2185 target_free_working_area_restore(): freed 28 bytes of working area at address 0x40092ad8 Debug: 2042 1584 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 2043 1584 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 2044 1584 target.c:2185 target_free_working_area_restore(): freed 1024 bytes of working area at address 0x3ffc03d8 Debug: 2045 1585 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 2046 1585 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 2047 1585 target.c:2185 target_free_working_area_restore(): freed 10968 bytes of working area at address 0x40090000 Debug: 2048 1586 target.c:1964 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 2049 1586 target.c:2185 target_free_working_area_restore(): freed 984 bytes of working area at address 0x3ffc0000 Debug: 2050 1586 target.c:1964 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 2051 1587 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x30000 clear=0x600000 Debug: 2052 1587 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=30000, state=2 Debug: 2053 1588 esp_flash.c:1267 esp_flash_boost_clock_freq(): esp_flash_boost_clock_freq old_freq (240) new_freq (-1) Debug: 2054 1588 command.c:146 script_debug(): command - flash write_image erase C:/Users/Admin/eclipse-workspace/wifi_prov_mgr/build/partition_table/partition-table.bin 0x8000 Debug: 2056 1594 configuration.c:97 find_file(): found C:/Users/Admin/eclipse-workspace/wifi_prov_mgr/build/partition_table/partition-table.bin Debug: 2057 1595 configuration.c:97 find_file(): found C:/Users/Admin/eclipse-workspace/wifi_prov_mgr/build/partition_table/partition-table.bin Debug: 2058 1595 core.c:936 flash_write_unlock_verify(): image_read_section: section = 0, t_section_num = 0, section_offset = 0, buffer_idx = 0, size_read = 3072 Debug: 2059 1596 esp_flash.c:242 esp_flasher_algorithm_init(): base=00000000 set=0 Debug: 2060 1597 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2061 1597 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x0 clear=0x630000 Debug: 2062 1598 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=0, state=2 Debug: 2063 1598 algorithm.c:339 algorithm_load_func_image(): stub: base 0x0, start 0x40092584, 2 sections Debug: 2064 1599 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 10967, flags 1 Debug: 2065 1599 target.c:2097 alloc_working_area_try_do(): allocated new working area of 10968 bytes at address 0x40090000 Debug: 2066 1599 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 2067 1600 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 2068 1600 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090000 Debug: 2069 1603 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2070 1604 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090200 Debug: 2071 1607 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2072 1608 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090400 Debug: 2073 1611 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2074 1611 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090600 Debug: 2075 1615 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2076 1615 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090800 Debug: 2077 1619 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2078 1619 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 Debug: 2079 1622 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2080 1623 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 Debug: 2081 1626 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2082 1626 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 Debug: 2083 1630 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2084 1630 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091000 Debug: 2085 1633 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2086 1633 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091200 Debug: 2087 1637 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2088 1637 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091400 Debug: 2089 1640 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2090 1641 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091600 Debug: 2091 1644 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2092 1644 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091800 Debug: 2093 1648 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2094 1648 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 Debug: 2095 1651 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2096 1652 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 Debug: 2097 1655 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2098 1656 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 Debug: 2099 1659 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2100 1659 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092000 Debug: 2101 1662 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2102 1663 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092200 Debug: 2103 1666 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2104 1666 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092400 Debug: 2105 1671 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2106 1671 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092600 Debug: 2107 1674 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2108 1675 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092800 Debug: 2109 1688 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2110 1688 target.c:2445 target_write_buffer(): writing buffer of 215 byte at 0x40092a00 Debug: 2111 1690 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2112 1692 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2113 1692 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 928, flags 0 Debug: 2114 1693 algorithm.c:376 algorithm_load_func_image(): DATA sec size 928 -> 928 Debug: 2115 1693 algorithm.c:379 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 2116 1693 target.c:2097 alloc_working_area_try_do(): allocated new working area of 984 bytes at address 0x3ffc0000 Debug: 2117 1694 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 2118 1694 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 2119 1695 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 Debug: 2120 1698 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2121 1698 target.c:2445 target_write_buffer(): writing buffer of 416 byte at 0x3ffc0200 Debug: 2122 1701 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2123 1701 target.c:2097 alloc_working_area_try_do(): allocated new working area of 1024 bytes at address 0x3ffc03d8 Debug: 2124 1702 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 2125 1702 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc07d7 (1024 bytes) Debug: 2126 1702 target.c:1964 print_wa_layout(): 0x3ffc07d8-0x3ffd7fff (96296 bytes) Debug: 2127 1703 target.c:2097 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x40092ad8 Debug: 2128 1703 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 2129 1703 target.c:1964 print_wa_layout(): * 0x40092ad8-0x40092af3 (28 bytes) Debug: 2130 1704 target.c:1964 print_wa_layout(): 0x40092af4-0x40093fff (5388 bytes) Debug: 2131 1704 target.c:2445 target_write_buffer(): writing buffer of 28 byte at 0x40092ad8 Debug: 2132 1705 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2133 1706 algorithm.c:462 algorithm_load_func_image(): Stub loaded in 108 ms Debug: 2134 1706 xtensa_algorithm.c:112 xtensa_algo_init(): reg params count 9 (6/3). Debug: 2135 1706 xtensa_algorithm.c:59 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc07d8 Debug: 2136 1707 xtensa_algorithm.c:62 xtensa_algo_regs_init_start(): Adjust stack addr to 0x3ffc07d0 Debug: 2137 1707 xtensa_algorithm.c:127 xtensa_algo_init(): Set arg[0] = 2 (a2) Debug: 2138 1707 xtensa_algorithm.c:137 xtensa_algo_init(): Set arg[1] = 32768 (a3) Debug: 2139 1707 xtensa_algorithm.c:137 xtensa_algo_init(): Set arg[2] = 4096 (a4) Debug: 2140 1708 algorithm.c:224 algorithm_run(): Algorithm start @ 0x40092ad8, stack 1024 bytes @ 0x3ffc07d8 Debug: 2141 1708 xtensa.c:1251 xtensa_resume(): esp32.cpu0 Debug: 2142 1708 xtensa.c:1180 xtensa_prepare_resume(): esp32.cpu0: current=0 address=0x40092ad8, handle_breakpoints=1, debug_execution=1) Debug: 2143 1709 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 2144 1709 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40092AD8 Debug: 2145 1709 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowbase val 00000000 Debug: 2146 1710 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowstart val 00000001 Debug: 2147 1710 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 00060025 Debug: 2148 1711 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 2149 1711 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a0 value 00000000, num =1 Debug: 2150 1711 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 3FFC07C0, num =2 Debug: 2151 1712 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a2 value 00000002, num =3 Debug: 2152 1712 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value 00008000, num =4 Debug: 2153 1712 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a4 value 00001000, num =5 Debug: 2154 1713 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 40092584, num =9 Debug: 2155 1714 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2156 1715 xtensa.c:1233 xtensa_do_resume(): esp32.cpu0: start Debug: 2157 1717 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC01) Debug: 2158 1717 target.c:1849 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 2159 1718 esp32.c:523 esp32_handle_target_event(): 2 Debug: 2160 1718 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 2 Debug: 2161 1718 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 2 Debug: 2162 1718 xtensa.c:2447 xtensa_handle_target_event(): 2 Debug: 2163 1718 algorithm.c:246 algorithm_run(): Wait algorithm completion Debug: 2164 1721 target.c:3312 target_wait_state(): waiting for target halted... Debug: 2165 1776 xtensa.c:890 xtensa_fetch_all_regs(): esp32.cpu0: start Debug: 2166 1779 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2167 1784 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2168 1786 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2169 1786 xtensa.c:1858 xtensa_poll(): esp32.cpu0: Target halted, pc=0x40092AEE, debug_reason=00000001, oldstate=00000004 Debug: 2170 1787 xtensa.c:1863 xtensa_poll(): esp32.cpu0: Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11 Info : 2171 1787 xtensa.c:1866 xtensa_poll(): esp32.cpu0: Target halted, PC=0x40092AEE, debug_reason=00000001 Debug: 2172 1788 esp_xtensa_smp.c:257 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 2173 1789 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 2174 1789 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 2175 1789 esp_xtensa_smp.c:314 esp_xtensa_smp_update_halt_gdb(): exit Debug: 2176 1790 target.c:1849 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32.cpu0 Debug: 2177 1790 esp32.c:523 esp32_handle_target_event(): 17 Debug: 2178 1790 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 17 Debug: 2179 1791 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 17 Debug: 2180 1791 xtensa.c:2447 xtensa_handle_target_event(): 17 Debug: 2181 1791 xtensa.c:2260 xtensa_wait_algorithm(): Read mem params Debug: 2182 1791 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a15: 0x40092839 -> 0x00000000 Debug: 2183 1792 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a12: 0x0020a400 -> 0x00000000 Debug: 2184 1792 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a11: 0x00000001 -> 0x00000000 Debug: 2185 1792 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a9: 0x3ffc0710 -> 0x00000000 Debug: 2186 1793 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a8: 0x80092aec -> 0x00000000 Debug: 2187 1793 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a4: 0x00001000 -> 0x00000000 Debug: 2188 1793 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a3: 0x00008000 -> 0x00000000 Debug: 2189 1794 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a1: 0x3ffc07c0 -> 0x00000000 Debug: 2190 1794 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ccount: 0x00d99a56 -> 0x00000004 Debug: 2191 1794 xtensa.c:2281 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000020 Debug: 2192 1795 xtensa.c:2291 xtensa_wait_algorithm(): restoring register eps6: 0x00060025 -> 0x0000001f Debug: 2193 1795 xtensa.c:2291 xtensa_wait_algorithm(): restoring register epc6: 0x40092aee -> 0x40000400 Debug: 2194 1795 xtensa.c:2291 xtensa_wait_algorithm(): restoring register scompare1: 0xb33fffff -> 0x00000000 Debug: 2195 1796 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ps: 0x00060025 -> 0x0000001f Debug: 2196 1796 xtensa.c:2291 xtensa_wait_algorithm(): restoring register configid0: 0x40092aee -> 0x40000400 Debug: 2197 1796 xtensa.c:2291 xtensa_wait_algorithm(): restoring register sar: 0x00000006 -> 0x00000000 Debug: 2198 1797 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar61: 0x08000000 -> 0x00000000 Debug: 2199 1797 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar60: 0x3ffae270 -> 0x00000000 Debug: 2200 1797 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar59: 0x3ff42000 -> 0x00000000 Debug: 2201 1798 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar58: 0x3ff42010 -> 0x00000000 Debug: 2202 1798 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar53: 0x08000000 -> 0x00000000 Debug: 2203 1799 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar52: 0x3ffae270 -> 0x00000000 Debug: 2204 1799 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar51: 0x3ff42000 -> 0x00000000 Debug: 2205 1799 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar50: 0x3ff42010 -> 0x00000000 Debug: 2206 1800 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar47: 0x00000007 -> 0x00000000 Debug: 2207 1800 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar46: 0x00608000 -> 0x00000000 Debug: 2208 1800 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar45: 0x80000040 -> 0x00000000 Debug: 2209 1801 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar44: 0x5c000007 -> 0x00000000 Debug: 2210 1801 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar41: 0x3ffc0670 -> 0x00000000 Debug: 2211 1801 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar40: 0x00000001 -> 0x00000000 Debug: 2212 1802 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar39: 0x00000007 -> 0x00000000 Debug: 2213 1802 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar38: 0x00208000 -> 0x00000000 Debug: 2214 1802 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar37: 0x80000040 -> 0x00000000 Debug: 2215 1803 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar36: 0x5c000007 -> 0x00000000 Debug: 2216 1803 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar35: 0x00000035 -> 0x00000000 Debug: 2217 1803 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar34: 0x00d999da -> 0x00000000 Debug: 2218 1804 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar33: 0x3ffc06c0 -> 0x00000000 Debug: 2219 1804 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar32: 0x431bde83 -> 0x00000000 Debug: 2220 1804 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar31: 0x00040000 -> 0x00000000 Debug: 2221 1805 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar30: 0x80000040 -> 0x00000000 Debug: 2222 1805 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar29: 0x70000000 -> 0x00000000 Debug: 2223 1805 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar28: 0x3ff42000 -> 0x00000000 Debug: 2224 1806 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar26: 0x0000e81b -> 0x00000000 Debug: 2225 1806 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar25: 0x3ffc06d0 -> 0x00000000 Debug: 2226 1806 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar24: 0x80091fad -> 0x00000000 Debug: 2227 1807 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar23: 0x3ff4201c -> 0x00000000 Debug: 2228 1807 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar22: 0x00000001 -> 0x00000000 Debug: 2229 1807 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar21: 0x3ffae270 -> 0x00000000 Debug: 2230 1808 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar20: 0x00000010 -> 0x00000000 Debug: 2231 1808 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar17: 0x3ffc06f0 -> 0x00000000 Debug: 2232 1808 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar16: 0x80092840 -> 0x00000000 Debug: 2233 1809 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar15: 0x40092839 -> 0x00000000 Debug: 2234 1809 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar12: 0x0020a400 -> 0x00000000 Debug: 2235 1809 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar11: 0x00000001 -> 0x00000000 Debug: 2236 1810 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar9: 0x3ffc0710 -> 0x00000000 Debug: 2237 1810 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar8: 0x80092aec -> 0x00000000 Debug: 2238 1810 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar4: 0x00001000 -> 0x00000000 Debug: 2239 1811 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar3: 0x00008000 -> 0x00000000 Debug: 2240 1811 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar1: 0x3ffc07c0 -> 0x00000000 Debug: 2241 1811 xtensa.c:2291 xtensa_wait_algorithm(): restoring register pc: 0x40092aee -> 0x40000400 Debug: 2242 1812 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 2243 1812 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40000400 Debug: 2244 1812 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg sar val 00000000 Debug: 2245 1813 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg configid0 val 40000400 Debug: 2246 1813 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 0000001F Debug: 2247 1814 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg scompare1 val 00000000 Debug: 2248 1814 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg epc6 val 40000400 Debug: 2249 1814 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg eps6 val 0000001F Debug: 2250 1815 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ccount val 00000004 Debug: 2251 1815 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 2252 1816 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 00000000, num =2 Debug: 2253 1816 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value 00000000, num =4 Debug: 2254 1816 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a4 value 00000000, num =5 Debug: 2255 1817 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 00000000, num =9 Debug: 2256 1817 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a9 value 00000000, num =10 Debug: 2257 1817 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a11 value 00000000, num =12 Debug: 2258 1818 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a12 value 00000000, num =13 Debug: 2259 1818 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a15 value 00000000, num =16 Debug: 2260 1819 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar1 value 00000000, num =1 Debug: 2261 1819 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar3 value 00000000, num =3 Debug: 2262 1819 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar4 value 00000000, num =4 Debug: 2263 1820 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar8 value 00000000, num =8 Debug: 2264 1820 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar9 value 00000000, num =9 Debug: 2265 1820 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar11 value 00000000, num =11 Debug: 2266 1821 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar12 value 00000000, num =12 Debug: 2267 1821 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar15 value 00000000, num =15 Debug: 2268 1822 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar16 value 00000000, num =16 Debug: 2269 1822 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar17 value 00000000, num =17 Debug: 2270 1822 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar20 value 00000000, num =20 Debug: 2271 1823 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar21 value 00000000, num =21 Debug: 2272 1823 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar22 value 00000000, num =22 Debug: 2273 1823 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar23 value 00000000, num =23 Debug: 2274 1824 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar24 value 00000000, num =24 Debug: 2275 1824 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar25 value 00000000, num =25 Debug: 2276 1825 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar26 value 00000000, num =26 Debug: 2277 1825 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar28 value 00000000, num =28 Debug: 2278 1825 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar29 value 00000000, num =29 Debug: 2279 1826 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar30 value 00000000, num =30 Debug: 2280 1826 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar31 value 00000000, num =31 Debug: 2281 1827 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar32 value 00000000, num =32 Debug: 2282 1827 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar33 value 00000000, num =33 Debug: 2283 1827 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar34 value 00000000, num =34 Debug: 2284 1828 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar35 value 00000000, num =35 Debug: 2285 1828 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar36 value 00000000, num =36 Debug: 2286 1829 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar37 value 00000000, num =37 Debug: 2287 1829 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar38 value 00000000, num =38 Debug: 2288 1830 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar39 value 00000000, num =39 Debug: 2289 1830 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar40 value 00000000, num =40 Debug: 2290 1831 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar41 value 00000000, num =41 Debug: 2291 1831 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar44 value 00000000, num =44 Debug: 2292 1832 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar45 value 00000000, num =45 Debug: 2293 1832 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar46 value 00000000, num =46 Debug: 2294 1833 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar47 value 00000000, num =47 Debug: 2295 1834 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar50 value 00000000, num =50 Debug: 2296 1834 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar51 value 00000000, num =51 Debug: 2297 1835 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar52 value 00000000, num =52 Debug: 2298 1835 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar53 value 00000000, num =53 Debug: 2299 1836 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar58 value 00000000, num =58 Debug: 2300 1836 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar59 value 00000000, num =59 Debug: 2301 1837 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar60 value 00000000, num =60 Debug: 2302 1837 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar61 value 00000000, num =61 Debug: 2303 1840 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2304 1840 algorithm.c:274 algorithm_run(): Got algorithm RC 0x0 Debug: 2305 1840 target.c:2185 target_free_working_area_restore(): freed 28 bytes of working area at address 0x40092ad8 Debug: 2306 1841 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 2307 1841 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 2308 1841 target.c:2185 target_free_working_area_restore(): freed 1024 bytes of working area at address 0x3ffc03d8 Debug: 2309 1842 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 2310 1842 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 2311 1842 target.c:2185 target_free_working_area_restore(): freed 10968 bytes of working area at address 0x40090000 Debug: 2312 1843 target.c:1964 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 2313 1843 target.c:2185 target_free_working_area_restore(): freed 984 bytes of working area at address 0x3ffc0000 Debug: 2314 1843 target.c:1964 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 2315 1844 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x30000 clear=0x600000 Debug: 2316 1845 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=30000, state=2 Debug: 2317 1845 esp_flash.c:242 esp_flasher_algorithm_init(): base=00000000 set=0 Debug: 2318 1847 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2319 1847 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x0 clear=0x630000 Debug: 2320 1849 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=0, state=2 Debug: 2321 1849 algorithm.c:339 algorithm_load_func_image(): stub: base 0x0, start 0x40092584, 2 sections Debug: 2322 1850 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 10967, flags 1 Debug: 2323 1850 target.c:2097 alloc_working_area_try_do(): allocated new working area of 10968 bytes at address 0x40090000 Debug: 2324 1851 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 2325 1851 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 2326 1851 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090000 Debug: 2327 1855 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2328 1855 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090200 Debug: 2329 1858 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2330 1859 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090400 Debug: 2331 1862 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2332 1862 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090600 Debug: 2333 1865 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2334 1866 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090800 Debug: 2335 1869 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2336 1869 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 Debug: 2337 1872 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2338 1873 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 Debug: 2339 1876 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2340 1876 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 Debug: 2341 1880 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2342 1880 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091000 Debug: 2343 1883 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2344 1884 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091200 Debug: 2345 1887 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2346 1887 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091400 Debug: 2347 1891 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2348 1891 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091600 Debug: 2349 1894 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2350 1894 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091800 Debug: 2351 1974 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2352 1974 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 Debug: 2353 1978 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2354 1978 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 Debug: 2355 1981 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2356 1982 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 Debug: 2357 1985 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2358 1985 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092000 Debug: 2359 1989 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2360 1989 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092200 Debug: 2361 1992 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2362 1993 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092400 Debug: 2363 1996 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2364 1996 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092600 Debug: 2365 2000 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2366 2000 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x40092800 Debug: 2367 2003 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2368 2003 target.c:2445 target_write_buffer(): writing buffer of 215 byte at 0x40092a00 Debug: 2369 2005 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2370 2007 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2371 2007 algorithm.c:346 algorithm_load_func_image(): addr 0x00000000, sz 928, flags 0 Debug: 2372 2008 algorithm.c:376 algorithm_load_func_image(): DATA sec size 928 -> 928 Debug: 2373 2008 algorithm.c:379 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 2374 2008 target.c:2097 alloc_working_area_try_do(): allocated new working area of 984 bytes at address 0x3ffc0000 Debug: 2375 2009 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 2376 2009 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 2377 2009 target.c:2445 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 Debug: 2379 2013 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2380 2013 target.c:2445 target_write_buffer(): writing buffer of 416 byte at 0x3ffc0200 Debug: 2381 2016 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2382 2016 target.c:2097 alloc_working_area_try_do(): allocated new working area of 33792 bytes at address 0x3ffc03d8 Debug: 2383 2017 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 2384 2017 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc87d7 (33792 bytes) Debug: 2385 2017 target.c:1964 print_wa_layout(): 0x3ffc87d8-0x3ffd7fff (63528 bytes) Debug: 2386 2017 target.c:2097 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x40092ad8 Debug: 2387 2018 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 2388 2018 target.c:1964 print_wa_layout(): * 0x40092ad8-0x40092af3 (28 bytes) Debug: 2389 2018 target.c:1964 print_wa_layout(): 0x40092af4-0x40093fff (5388 bytes) Debug: 2390 2019 target.c:2445 target_write_buffer(): writing buffer of 28 byte at 0x40092ad8 Debug: 2391 2020 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2392 2020 algorithm.c:462 algorithm_load_func_image(): Stub loaded in 171.034 ms Debug: 2393 2021 xtensa_algorithm.c:112 xtensa_algo_init(): reg params count 8 (6/2). Debug: 2394 2021 xtensa_algorithm.c:59 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc87d8 Debug: 2395 2021 xtensa_algorithm.c:62 xtensa_algo_regs_init_start(): Adjust stack addr to 0x3ffc87d0 Debug: 2396 2022 xtensa_algorithm.c:127 xtensa_algo_init(): Set arg[0] = 1 (a2) Debug: 2397 2022 xtensa_algorithm.c:137 xtensa_algo_init(): Set arg[1] = 0 (a3) Debug: 2398 2023 target.c:2097 alloc_working_area_try_do(): allocated new working area of 24 bytes at address 0x3ffc87d8 Debug: 2399 2023 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 2400 2023 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc87d7 (33792 bytes) Debug: 2401 2024 target.c:1964 print_wa_layout(): * 0x3ffc87d8-0x3ffc87ef (24 bytes) Debug: 2402 2024 target.c:1964 print_wa_layout(): 0x3ffc87f0-0x3ffd7fff (63504 bytes) Debug: 2403 2024 target.c:2097 alloc_working_area_try_do(): allocated new working area of 32768 bytes at address 0x3ffc87f0 Debug: 2404 2025 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 2405 2025 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc87d7 (33792 bytes) Debug: 2406 2025 target.c:1964 print_wa_layout(): * 0x3ffc87d8-0x3ffc87ef (24 bytes) Debug: 2407 2026 target.c:1964 print_wa_layout(): * 0x3ffc87f0-0x3ffd07ef (32768 bytes) Debug: 2408 2026 target.c:1964 print_wa_layout(): 0x3ffd07f0-0x3ffd7fff (30736 bytes) Debug: 2409 2026 esp_flash.c:610 esp_flash_write_state_init(): PROF: Allocated target buffer 32768 bytes in 1.995 ms Debug: 2410 2027 target.c:2445 target_write_buffer(): writing buffer of 24 byte at 0x3ffc87d8 Debug: 2411 2029 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2412 2029 algorithm.c:224 algorithm_run(): Algorithm start @ 0x40092ad8, stack 33792 bytes @ 0x3ffc87d8 Debug: 2413 2029 xtensa.c:1251 xtensa_resume(): esp32.cpu0 Debug: 2414 2030 xtensa.c:1180 xtensa_prepare_resume(): esp32.cpu0: current=0 address=0x40092ad8, handle_breakpoints=1, debug_execution=1) Debug: 2415 2030 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 2416 2030 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40092AD8 Debug: 2417 2031 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowbase val 00000000 Debug: 2418 2031 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowstart val 00000001 Debug: 2419 2032 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 00060025 Debug: 2420 2032 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 2421 2032 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a0 value 00000000, num =1 Debug: 2422 2033 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 3FFC87C0, num =2 Debug: 2423 2033 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a2 value 00000001, num =3 Debug: 2424 2033 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value 3FFC87D8, num =4 Debug: 2425 2034 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 40092584, num =9 Debug: 2426 2035 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2427 2036 xtensa.c:1233 xtensa_do_resume(): esp32.cpu0: start Debug: 2428 2037 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC01) Debug: 2429 2037 target.c:1849 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 2430 2037 esp32.c:523 esp32_handle_target_event(): 2 Debug: 2431 2038 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 2 Debug: 2432 2038 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 2 Debug: 2433 2038 xtensa.c:2447 xtensa_handle_target_event(): 2 Debug: 2434 2198 esp_flash.c:463 esp_flash_rw_do(): Transfer block on esp32.cpu0 Debug: 2435 2199 esp_flash.c:470 esp_flash_rw_do(): Transfer block 0, 0 bytes Debug: 2436 2200 esp_flash.c:473 esp_flash_rw_do(): Block not ready Debug: 2437 2217 xtensa.c:890 xtensa_fetch_all_regs(): esp32.cpu0: start Debug: 2438 2220 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2439 2225 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2440 2226 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2441 2227 xtensa.c:1858 xtensa_poll(): esp32.cpu0: Target halted, pc=0x400003C0, debug_reason=00000001, oldstate=00000004 Debug: 2442 2227 xtensa.c:1863 xtensa_poll(): esp32.cpu0: Halt reason=0x00000008, exc_cause=2, dsr=0x8080cc11 Info : 2443 2227 xtensa.c:1866 xtensa_poll(): esp32.cpu0: Target halted, PC=0x400003C0, debug_reason=00000001 Debug: 2444 2229 esp_xtensa_smp.c:257 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 2445 2229 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 2446 2229 esp_xtensa_smp.c:271 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 2447 2230 esp_xtensa_smp.c:314 esp_xtensa_smp_update_halt_gdb(): exit Debug: 2448 2230 target.c:1849 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32.cpu0 Debug: 2449 2230 esp32.c:523 esp32_handle_target_event(): 17 Debug: 2450 2231 esp_xtensa_smp.c:610 esp_xtensa_smp_handle_target_event(): 17 Debug: 2451 2231 esp_xtensa.c:79 esp_xtensa_handle_target_event(): 17 Debug: 2452 2231 xtensa.c:2447 xtensa_handle_target_event(): 17 Debug: 2453 2231 esp_flash.c:463 esp_flash_rw_do(): Transfer block on esp32.cpu0 Debug: 2454 2232 esp_flash.c:470 esp_flash_rw_do(): Transfer block 0, 0 bytes Debug: 2455 2233 esp_flash.c:473 esp_flash_rw_do(): Block not ready Error: 2456 2233 esp_flash.c:501 esp_flash_rw_do(): Algorithm accidentally stopped (2)! Transferred 0 of 4096 Error: 2457 2234 algorithm.c:241 algorithm_run(): Failed to exec algorithm user func (-4)! Debug: 2458 2234 algorithm.c:246 algorithm_run(): Wait algorithm completion Debug: 2459 2236 xtensa.c:2260 xtensa_wait_algorithm(): Read mem params Debug: 2460 2237 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a15: 0xff000000 -> 0x00000000 Debug: 2461 2237 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a14: 0x00000029 -> 0x00000000 Debug: 2462 2237 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a13: 0x3ffc852e -> 0x00000000 Debug: 2463 2238 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a12: 0x00000001 -> 0x00000000 Debug: 2464 2238 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a11: 0x3ffc1e9d -> 0x00000000 Debug: 2465 2238 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a10: 0x00000084 -> 0x00000000 Debug: 2466 2239 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a9: 0x3ffc84d0 -> 0x00000000 Debug: 2467 2239 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a8: 0x80091906 -> 0x00000000 Debug: 2468 2239 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a6: 0x15122500 -> 0x00000000 Debug: 2469 2240 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a5: 0x3ffc852e -> 0x00000000 Debug: 2470 2240 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a4: 0x7f3f7dfa -> 0x00000000 Debug: 2471 2240 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a3: 0x3ffe0454 -> 0x00000000 Debug: 2472 2241 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a2: 0x00000002 -> 0x00000000 Debug: 2473 2241 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a1: 0x3ffc83e0 -> 0x00000000 Debug: 2474 2241 xtensa.c:2291 xtensa_wait_algorithm(): restoring register a0: 0x80094c72 -> 0x00000000 Debug: 2475 2242 xtensa.c:2291 xtensa_wait_algorithm(): restoring register excvaddr: 0x3ffe0454 -> 0x00000000 Debug: 2476 2242 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ccount: 0x00019137 -> 0x00000004 Debug: 2477 2242 xtensa.c:2281 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000020 Debug: 2478 2243 xtensa.c:2291 xtensa_wait_algorithm(): restoring register exccause: 0x00000002 -> 0x00000000 Debug: 2479 2243 xtensa.c:2291 xtensa_wait_algorithm(): restoring register eps6: 0x00050633 -> 0x0000001f Debug: 2480 2243 xtensa.c:2291 xtensa_wait_algorithm(): restoring register depc: 0x3ffe0454 -> 0x00000000 Debug: 2481 2244 xtensa.c:2291 xtensa_wait_algorithm(): restoring register epc6: 0x400003c0 -> 0x40000400 Debug: 2482 2244 xtensa.c:2291 xtensa_wait_algorithm(): restoring register epc1: 0x3f41cdf8 -> 0x00000000 Debug: 2483 2244 xtensa.c:2291 xtensa_wait_algorithm(): restoring register scompare1: 0xb33fffff -> 0x00000000 Debug: 2484 2245 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ps: 0x00050633 -> 0x0000001f Debug: 2485 2245 xtensa.c:2291 xtensa_wait_algorithm(): restoring register configid0: 0x400003c0 -> 0x40000400 Debug: 2486 2246 xtensa.c:2291 xtensa_wait_algorithm(): restoring register windowstart: 0x00005400 -> 0x00000001 Debug: 2487 2246 xtensa.c:2291 xtensa_wait_algorithm(): restoring register windowbase: 0x0000000e -> 0x00000000 Debug: 2488 2246 xtensa.c:2291 xtensa_wait_algorithm(): restoring register sar: 0x00000018 -> 0x00000000 Debug: 2489 2247 xtensa.c:2291 xtensa_wait_algorithm(): restoring register lend: 0x4000c296 -> 0x00000000 Debug: 2490 2247 xtensa.c:2291 xtensa_wait_algorithm(): restoring register lbeg: 0x4000c28c -> 0x00000000 Debug: 2491 2247 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar62: 0x15122500 -> 0x00000000 Debug: 2492 2248 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar61: 0x3ffc852e -> 0x00000000 Debug: 2493 2248 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar60: 0x7f3f7dfa -> 0x00000000 Debug: 2494 2248 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar59: 0x3ffe0454 -> 0x00000000 Debug: 2495 2249 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar58: 0x00000002 -> 0x00000000 Debug: 2496 2249 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar57: 0x3ffc83e0 -> 0x00000000 Debug: 2497 2250 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar56: 0x80094c72 -> 0x00000000 Debug: 2498 2250 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar51: 0x00000001 -> 0x00000000 Debug: 2499 2250 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar50: 0x3ffc0670 -> 0x00000000 Debug: 2500 2251 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar49: 0x3ffc8600 -> 0x00000000 Debug: 2501 2251 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar48: 0x8008caea -> 0x00000000 Debug: 2502 2251 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar42: 0xfffffffd -> 0x00000000 Debug: 2503 2252 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar41: 0x3ffc8620 -> 0x00000000 Debug: 2504 2252 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar40: 0x8008e231 -> 0x00000000 Debug: 2505 2252 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar37: 0x00000018 -> 0x00000000 Debug: 2506 2253 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar35: 0x00000002 -> 0x00000000 Debug: 2507 2253 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar34: 0x00000066 -> 0x00000000 Debug: 2508 2253 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar33: 0x76757473 -> 0x00000000 Debug: 2509 2254 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar32: 0x7271706f -> 0x00000000 Debug: 2510 2254 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar31: 0x43007a79 -> 0x00000000 Debug: 2511 2254 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar29: 0x3ffc8474 -> 0x00000000 Debug: 2512 2255 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar28: 0x00000034 -> 0x00000000 Debug: 2513 2255 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar27: 0x3ffc84e9 -> 0x00000000 Debug: 2514 2255 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar26: 0x00000008 -> 0x00000000 Debug: 2515 2256 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar25: 0x00000004 -> 0x00000000 Debug: 2516 2256 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar24: 0x3ffc84e6 -> 0x00000000 Debug: 2517 2256 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar23: 0x1c492000 -> 0x00000000 Debug: 2518 2257 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar22: 0x000001e0 -> 0x00000000 Debug: 2519 2257 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar21: 0x000000f0 -> 0x00000000 Debug: 2520 2257 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar20: 0x00000003 -> 0x00000000 Debug: 2521 2258 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar19: 0x3ffc84e2 -> 0x00000000 Debug: 2522 2258 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar18: 0x3ffc84e2 -> 0x00000000 Debug: 2523 2258 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar17: 0x3ffc8450 -> 0x00000000 Debug: 2524 2259 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar16: 0x800566b0 -> 0x00000000 Debug: 2525 2259 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar15: 0x00000001 -> 0x00000000 Debug: 2526 2260 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar12: 0x00000010 -> 0x00000000 Debug: 2527 2260 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar11: 0x00000003 -> 0x00000000 Debug: 2528 2260 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar10: 0x3ffc84e2 -> 0x00000000 Debug: 2529 2261 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar9: 0x3ffc84a0 -> 0x00000000 Debug: 2530 2261 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar8: 0x00000029 -> 0x00000000 Debug: 2531 2261 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar7: 0xff000000 -> 0x00000000 Debug: 2532 2262 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar6: 0x00000029 -> 0x00000000 Debug: 2533 2262 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar5: 0x3ffc852e -> 0x00000000 Debug: 2534 2263 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar4: 0x00000001 -> 0x00000000 Debug: 2535 2263 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar3: 0x3ffc1e9d -> 0x00000000 Debug: 2536 2264 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar2: 0x00000084 -> 0x00000000 Debug: 2537 2264 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar1: 0x3ffc84d0 -> 0x00000000 Debug: 2538 2264 xtensa.c:2291 xtensa_wait_algorithm(): restoring register ar0: 0x80091906 -> 0x00000000 Debug: 2539 2265 xtensa.c:2291 xtensa_wait_algorithm(): restoring register pc: 0x400003c0 -> 0x40000400 Debug: 2540 2265 xtensa.c:512 xtensa_write_dirty_registers(): esp32.cpu0: start Debug: 2541 2265 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg pc val 40000400 Debug: 2542 2266 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg lbeg val 00000000 Debug: 2543 2266 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg lend val 00000000 Debug: 2544 2266 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg sar val 00000000 Debug: 2545 2267 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowbase val 00000000 Debug: 2546 2267 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg windowstart val 00000001 Debug: 2547 2268 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg configid0 val 40000400 Debug: 2548 2268 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ps val 0000001F Debug: 2549 2268 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg scompare1 val 00000000 Debug: 2550 2269 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg epc1 val 00000000 Debug: 2551 2269 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg epc6 val 40000400 Debug: 2552 2269 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg depc val 00000000 Debug: 2553 2270 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg eps6 val 0000001F Debug: 2554 2270 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg exccause val 00000000 Debug: 2555 2270 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ccount val 00000004 Debug: 2556 2271 xtensa.c:526 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg excvaddr val 00000000 Debug: 2557 2271 xtensa.c:648 xtensa_queue_write_dirty_user_regs_u32(): esp32.cpu0: start Debug: 2558 2271 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a0 value 00000000, num =1 Debug: 2559 2272 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a1 value 00000000, num =2 Debug: 2560 2272 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a2 value 00000000, num =3 Debug: 2561 2273 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a3 value 00000000, num =4 Debug: 2562 2273 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a4 value 00000000, num =5 Debug: 2563 2273 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a5 value 00000000, num =6 Debug: 2564 2274 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a6 value 00000000, num =7 Debug: 2565 2274 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a8 value 00000000, num =9 Debug: 2566 2274 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a9 value 00000000, num =10 Debug: 2567 2275 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a10 value 00000000, num =11 Debug: 2568 2275 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a11 value 00000000, num =12 Debug: 2569 2276 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a12 value 00000000, num =13 Debug: 2570 2276 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a13 value 00000000, num =14 Debug: 2571 2276 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a14 value 00000000, num =15 Debug: 2572 2277 xtensa.c:591 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg a15 value 00000000, num =16 Debug: 2573 2277 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar0 value 00000000, num =0 Debug: 2574 2277 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar1 value 00000000, num =1 Debug: 2575 2278 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar2 value 00000000, num =2 Debug: 2576 2278 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar3 value 00000000, num =3 Debug: 2577 2279 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar4 value 00000000, num =4 Debug: 2578 2279 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar5 value 00000000, num =5 Debug: 2579 2279 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar6 value 00000000, num =6 Debug: 2580 2280 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar7 value 00000000, num =7 Debug: 2581 2280 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar8 value 00000000, num =8 Debug: 2582 2281 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar9 value 00000000, num =9 Debug: 2583 2281 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar10 value 00000000, num =10 Debug: 2584 2281 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar11 value 00000000, num =11 Debug: 2585 2282 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar12 value 00000000, num =12 Debug: 2586 2282 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar15 value 00000000, num =15 Debug: 2587 2283 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar16 value 00000000, num =16 Debug: 2588 2283 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar17 value 00000000, num =17 Debug: 2589 2283 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar18 value 00000000, num =18 Debug: 2590 2284 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar19 value 00000000, num =19 Debug: 2591 2284 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar20 value 00000000, num =20 Debug: 2592 2285 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar21 value 00000000, num =21 Debug: 2593 2285 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar22 value 00000000, num =22 Debug: 2594 2285 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar23 value 00000000, num =23 Debug: 2595 2286 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar24 value 00000000, num =24 Debug: 2596 2286 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar25 value 00000000, num =25 Debug: 2597 2286 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar26 value 00000000, num =26 Debug: 2598 2287 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar27 value 00000000, num =27 Debug: 2599 2287 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar28 value 00000000, num =28 Debug: 2600 2288 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar29 value 00000000, num =29 Debug: 2601 2288 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar31 value 00000000, num =31 Debug: 2602 2288 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar32 value 00000000, num =32 Debug: 2603 2289 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar33 value 00000000, num =33 Debug: 2604 2289 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar34 value 00000000, num =34 Debug: 2605 2290 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar35 value 00000000, num =35 Debug: 2606 2290 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar37 value 00000000, num =37 Debug: 2607 2290 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar40 value 00000000, num =40 Debug: 2608 2291 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar41 value 00000000, num =41 Debug: 2609 2291 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar42 value 00000000, num =42 Debug: 2610 2292 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar48 value 00000000, num =48 Debug: 2611 2292 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar49 value 00000000, num =49 Debug: 2612 2292 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar50 value 00000000, num =50 Debug: 2613 2293 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar51 value 00000000, num =51 Debug: 2614 2293 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar56 value 00000000, num =56 Debug: 2615 2294 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar57 value 00000000, num =57 Debug: 2616 2294 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar58 value 00000000, num =58 Debug: 2617 2295 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar59 value 00000000, num =59 Debug: 2618 2295 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar60 value 00000000, num =60 Debug: 2619 2295 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar61 value 00000000, num =61 Debug: 2620 2296 xtensa.c:616 xtensa_write_dirty_registers(): esp32.cpu0: Writing back reg ar62 value 00000000, num =62 Debug: 2621 2298 xtensa.c:788 xtensa_core_status_check(): esp32.cpu0: DSR (8080CC11) Debug: 2622 2299 target.c:2185 target_free_working_area_restore(): freed 32768 bytes of working area at address 0x3ffc87f0 Debug: 2623 2299 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 2624 2299 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc87d7 (33792 bytes) Debug: 2625 2300 target.c:1964 print_wa_layout(): * 0x3ffc87d8-0x3ffc87ef (24 bytes) Debug: 2626 2300 target.c:1964 print_wa_layout(): 0x3ffc87f0-0x3ffd7fff (63504 bytes) Debug: 2627 2300 target.c:2185 target_free_working_area_restore(): freed 24 bytes of working area at address 0x3ffc87d8 Debug: 2628 2301 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 2629 2301 target.c:1964 print_wa_layout(): * 0x3ffc03d8-0x3ffc87d7 (33792 bytes) Debug: 2630 2301 target.c:1964 print_wa_layout(): 0x3ffc87d8-0x3ffd7fff (63528 bytes) Debug: 2631 2301 esp_flash.c:642 esp_flash_write_state_cleanup(): PROF: Workarea freed in 1.996 ms Debug: 2632 2302 algorithm.c:274 algorithm_run(): Got algorithm RC 0x2 Debug: 2633 2302 target.c:2185 target_free_working_area_restore(): freed 28 bytes of working area at address 0x40092ad8 Debug: 2634 2303 target.c:1964 print_wa_layout(): * 0x40090000-0x40092ad7 (10968 bytes) Debug: 2635 2303 target.c:1964 print_wa_layout(): 0x40092ad8-0x40093fff (5416 bytes) Debug: 2636 2303 target.c:2185 target_free_working_area_restore(): freed 33792 bytes of working area at address 0x3ffc03d8 Debug: 2637 2304 target.c:1964 print_wa_layout(): * 0x3ffc0000-0x3ffc03d7 (984 bytes) Debug: 2638 2304 target.c:1964 print_wa_layout(): 0x3ffc03d8-0x3ffd7fff (97320 bytes) Debug: 2639 2304 target.c:2185 target_free_working_area_restore(): freed 10968 bytes of working area at address 0x40090000 Debug: 2640 2305 target.c:1964 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 2641 2305 target.c:2185 target_free_working_area_restore(): freed 984 bytes of working area at address 0x3ffc0000 Debug: 2642 2305 target.c:1964 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 2643 2305 xtensa.c:726 xtensa_smpbreak_write(): esp32.cpu0: write smpbreak set=0x30000 clear=0x600000 Debug: 2644 2306 xtensa.c:744 xtensa_smpbreak_set(): esp32.cpu0: set smpbreak=30000, state=2 Error: 2645 2307 esp_flash.c:759 esp_flash_write(): Failed to write flash (2)! Error: 2646 2307 core.c:107 flash_driver_write(): error writing to flash at address 0x00000000 at offset 0x00008000 Debug: 2647 2307 command.c:629 run_command(): Command 'flash write_image' failed with error code -4 Debug: 2648 2308 command.c:146 script_debug(): command - target names Debug: 2649 2308 command.c:146 script_debug(): command - esp32.cpu0 configure -work-area-backup 1 Debug: 2650 2308 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 2651 2309 target.c:1964 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 2652 2309 command.c:146 script_debug(): command - esp32.cpu0 configure -alt-work-area-backup 1 Debug: 2653 2309 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 2654 2310 target.c:1964 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 2655 2310 command.c:146 script_debug(): command - esp32.cpu1 configure -work-area-backup 1 Debug: 2656 2310 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 2657 2311 command.c:146 script_debug(): command - esp32.cpu1 configure -alt-work-area-backup 1 Debug: 2658 2311 target.c:2218 target_free_all_working_areas_restore(): freeing all working areas Debug: 2659 2312 command.c:146 script_debug(): command - echo ** Flashing Failed ** User : 2661 2319 command.c:769 jim_echo(): ** Flashing Failed ** User : 2662 2320 options.c:63 configuration_output_handler(): -1User : 2663 2320 options.c:63 configuration_output_handler(): Info : 2664 2321 server.c:312 add_service(): Listening on port 6666 for tcl connections Info : 2665 2322 server.c:312 add_service(): Listening on port 4444 for telnet connections Debug: 2666 2323 command.c:146 script_debug(): command - init