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@igrr igrr released this Apr 8, 2021

2020/04/01 Release, based on OpenOCD v0.10.0

Bug fixes:

  • Add missing zlib DLL into Windows release package (#151)
Assets 6

@igrr igrr released this Mar 29, 2021

2021/03/29 Release, based on OpenOCD v0.10.0


  • flash/esp_xtensa: Added compression support for write operations. Compression can be enabled by adding compress argument to program_esp command. Compression is not enabled by default, yet.
  • rtos/FreeRTOS: Changed task list update algorithm basing on uxTaskNumber. This reduces the amount of data transferred over JTAG in some cases, and makes stepping through the code faster.
  • target/esp32c3: Added SoC reset support. reset halt command now resets the digital peripherals, in addition to the CPU, same as it does on esp32 and esp32s2.
  • target/esp32c3: Reduced timeouts to reasonable values
  • board/esp32c3-ftdi: set lower JTAG clock used by default. Since there is no development board with FT2232H and ESP32-C3 yet, they are most likely connected by jumper cables, so a lower frequency should be used.
  • xtensa: Made 'xtensa_smpbreak_get' returning configured value

Bug fixes:

  • esp32s3: Disabled flash support by default, since it's not implemented yet. It will be re-enabled once the feature is implemented.
  • esp/semihost: Added callback to disable WDTs upon syscall.
  • riscv: Maintain target halted state across reset
  • riscv: Fixed RTOS checks in reset procedure
  • riscv: Fixed semihosting code to adjust the PC to the next instruction also for GDB fileio
  • esp/gcov: Ensured that esp gcov dump is run on examined target
  • esp/gcov: Fixed acknowledgement of the block with command w/o response data
  • esp/gcov: Halt target before on-the-fly gcov dump
  • semihosting: Fixed file name length parameter for GDB File IO to match GDB docs.
  • xtensa: Marked target as unexamined when 'powered' bit is reset during several polling periods.
  • In this release we have stared running the test suite with sanitizers (AddressSanitizer, UndefinedBehaviorSanitizer) enabled, and fixed the following issues:
    • target/esp_xtensa_apptrace: Fixed 'unaligned buffer' issue
    • esp32s2: Fixed left shift runtime errors found by sanitizers
    • gdb_server: Fixed AdressSanitizer issue caused by missing null character
    • xtensa: Fixed sanitizer warnings when shifting integer constants
    • xtensa: Fixed buffer overflow due to incorrect size allocated for wide user registers
    • xtensa: Fixed buffer overflow when reading trace data
Assets 6

@igrr igrr released this Dec 4, 2020

2020/12/02 Release, based on OpenOCD v0.10.0


  • rtos: NuttX RTOS support on ESP32

Bug fixes:

  • libftdi: support libftdi 1.5 (upstream fix)
  • ci: fix "-dirty" suffix in the version reported by v0.10.0-esp32-20201125 release.
Assets 6

@igrr igrr released this Nov 25, 2020

2020/11/25 Release, based on OpenOCD v0.10.0


  • esp32s3: Added base support for ESP32-S3.
  • esp32c3: Added base support for ESP32-C3.
  • esp/jtag: Added esp_remote JTAG interface over USB and TCP.
  • esp/jtag: Added esp_usb_jtag JTAG interace for embedded USB-to-JTAG functionality.
  • esp/xtensa: Refactored to make use of native SMP support in OpenOCD.
  • esp: Added program_esp_bins command to flash binaries specified in flasher_args.json file produced by ESP-IDF build system.
  • esp: Added esp_get_mac [format] command to obtain the factory MAC address.
  • helper: Added Espressif JEDEC code
  • esp/smp: Added generic ESP Xtensa SMP functionality.
  • jimtcl: Upgraded to 0.79 and enabled JSON extension.
  • esp32s2: Renamed esp32_s2 target to esp32s2 (backwards compatible)
  • xtensa: Implemented memory access range check.

Bug fixes:

  • esp32s2: Fixed issue with software reset when memory protection is enabled in the app.
  • esp32: Fixed program_esp32 TCL function to correctly pass arguments to program_esp (#122, thanks @pridgeway-rsc).
  • apptrace: Fixed running command on an unexamined core.
  • libftdi: Updated deprecated function calls.
  • semihosting: Fixed a bug with an incorrect return value for the custom lseek implementation.
  • semihosting: Fixed handling of invalid syscall arguments.
  • esp32: Fixed usage of unintialized GDB service.
  • freertos: Fixed non-general registers access from GDB.
  • freertos: Fixed GDB reg list usage in get_thread_reg_list.
  • esp32xx: Fixed ESP32 and ESP32-S2 Xtensa config.
  • apptrace: Fixed connection to already running target.
Assets 6

@igrr igrr released this Jul 9, 2020

2020/07/09 Release, based on OpenOCD v0.10.0

Bug fixes

  • esp: Fix chips memory layout
  • esp/apptrace: Fix apptrace auto-stop

Note: this is a bug fix update for the previous release, v0.10.0-esp32-20200526. It does not include latest changes present in the master branch, related to the native SMP support.

Assets 6

@igrr igrr released this May 26, 2020

2020/05/26 Release, based on OpenOCD v0.10.0


  • boards: add ESP32-S2 Kaluga board config files

Bug fixes

  • esp32: Sync ESP32 aggregating target state with active sub-target
  • esp32: Fix gcov collection from APP CPU
  • xtensa: Check that target was inited before deinit
  • esp32: Fix polling and resuming stalled core
  • esp/apptrace: Fix 'sysview_mcore stop' waiting for timeout expiration
  • esp/apptrace: Make use of timer callback API for fast polling
Assets 6

@igrr igrr released this Apr 20, 2020

2020/04/20 Release, based on OpenOCD v0.10.0

Bug fixes

  • semihosting: Restore ability to pass whence parameter to lseek semihosting call. Fix line endings handling on Windows.
Assets 6

@igrr igrr released this Apr 6, 2020

2020/04/06 Release, based on OpenOCD v0.10.0


  • semihosting: Integration with the existing OpenOCD semihosting implementation
  • esp32/apptrace: Adds command to save SystemView multi-core traces to single file
  • esp32/apptrace: Support console (con:) and TCP (tcp://host:port) data destinations

Bug fixes

  • xtensa: Reduce polling delay during stepping
  • xtensa: Fix stepping in high level interrupt handlers
Assets 6

@igrr igrr released this Mar 9, 2020

2020/03/09 Release, based on OpenOCD v0.10.0


  • Merge upstream OpenOCD version (commit 9de7d9c).
  • Support for breakpoints in Flash for applications built with PSRAM support.
  • Add USB vendor/product ID so default ESP32 debug interface works with both FT2232H and FT232H (#80).
  • esp: Re-group commands using target independent prefixes (esp and xtensa). Rename esp32_s2 target to esp32s2.

Bug fixes

  • xtensa: Clear OCDDCR_ENABLEOCD on exit from OpenOCD. Remove ESP-specific workaround with exit callbacks and re-use native target deinit API. Fixes IDF panic handler behavior when OpenOCD terminates.
  • xtensa: Fixes restoring of DEBUGCAUSE in reg cache after algorithm run.
  • esp/apptrace: Fixes handling of SystemView packets with invalid core id.
  • esp32xx: Adds virt2phys target API implementation, removes an error log related to virt2phys missing.
Assets 6

@igrr igrr released this Nov 14, 2019

2019/11/14 Release, based on OpenOCD v0.10.0


  • Support multiple ESP32-S2 silicon revisions
  • Add ESP32-S2 SW reset functionality
  • Add activity LED support to esp32_devkitj_v1 (WROVER-KIT) debug adapter

Bug fixes

  • Fixes calls to non-existent ESP32 subcore target functions
  • Fixes PS corruption when stepping over breakpoint instruction
  • Fixes SW reset when the CPU is stalled
  • Fixes task name offset for ESP32-S2
Assets 6