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Releases: espressif/openocd-esp32

v0.12.0-esp32-20240318

20 Mar 09:00
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Features:

  • target/esp32p4: Added flasher support.
  • target/esp32p4: Added custom registers support.
  • tcl/board: Added ESP32-P4 config files.
  • rtos/FreeRTOS: Added ESP32-P4 support.

Bug fixes:

  • flash/esp: Fixed storing of a vaddr as a paddr for DROM flash bank. Close #318.
  • Some typo fixes regarding ESP / RiscV files. Close #314.
  • rtos/nuttx: Added sanity checks during thread updates. Added checks for the values read from target.
  • target/esp32p4: Fixed max hw bp/wp nums.
  • target/esp32p4: Fixed soc reset function.
  • target/esp32p4: Writeback cache before memory read/write. While halted memory access works fine with the help of fence instruction, runtime memory reads returned garbage values. The issue is resolved by performing cache synchronization before memory read/write operations.
  • target/esp_riscv: Ensure reading/writing aligned memory address. SBA access requires 4 byte alignment.
  • target/esp: Avoided reading invalid apptrace config addresses. We may read mem_cfg_addr as zero, when target algorithm code is not running yet. For some targets (e.g. esp32p4), reading invalid address will be an error.
  • contrib/loaders/flash/esp: Fixed last data chunk padding when writing to flash. This could cause to attempt to write beyond flash boundaries.
  • flash/nor/esp: Fixed target endianess handling for flash mappings structs.
  • flash/esp_xtensa: Removed limitation for accessing lower flash addresses. Removes SW limitation for writing flash 0x1000 for ESP32 and ESP32-S2.
  • flash/nor: Fixed handling of zero-size flash chips in get_flash_bank_by_addr. Led to assertion failure when ESP virtual flash banks have zero size, e.g. there is no app image in flash, so flah mappings are not available.

Other:

  • rtos/nuttx: Updated TCB structure for the recent Nuttx changes.
  • target/esp32p4: Reordered mem access to better cache handling.
  • loaders/espressif: Added license info to the flasher stub headers.
  • tcl/target: Renamed ESP32_ONLYCPU with ESP_ONLYCPU TCL config variable.
  • tcl/target: Added esp_gcov wrapper TCL functions for esp gcov command.
  • flash/esp: Avoided probing flash bank for simple flash/flasher config commands.
  • Synchronized with upstream

v0.12.0-esp32-20230921

22 Sep 08:10
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Features:

  • target/esp32p4: Added ESP32-P4 target support. Basic debugging functionality without flash support is now available.
  • target/esp32{c2,c3,h2,c6}: Exposed custom CSRs for RISC-V targets.
  • target/esp32{h2,c6}: Added memory protection support.
  • target/espressif: Added support to print details for abort(), assert() and pseudo exception reasons.
  • target/espressif: Added GDB File I/O support (https://sourceware.org/gdb/onlinedocs/gdb/File_002dI_002fO-Overview.html).
  • target/espressif: Added support for stack hardware protection in RISC-V chips.
  • helper/log: Added log_non_error_levels_to_stdout command to send non-error logs to stdout. This can be useful for IDEs to detect errors messages.
  • jtag/drivers: Added SWD bitbang support for esp_gpio driver.
  • loaders/esp32{c2,h2,c6}: Added cpu_clock_configure functionality. This allows to improve flash access speed by temporary boosting CPU clock by flasher stub.
  • loaders/esp32{h2,c6}: Added flash encryption support.

Bug fixes:

  • target/xtensa: Fixed GDB watchpoint hit location handling to show previous and new value. Previously watchpoint hit just before memory access and no stepping over store/load instruction was performed, so GDB did not showed old and new variable value.
  • target/esp32s3: Keep APP_CPU clock gating enabled after SW reset. It avoids extra core 1 reset by IDF code which can lead to loosing breakpoints set on that core.
  • target/espressif: Suppressed empty Gcov file read error. During Gcov data dump, target code tries to read existing but empty Gcov data file. So for the first dump it generates error message what actually does not indicate an error.
  • target/esp_common: Fixed handling of spaces in file paths ensuring that command arguments are handled properly.

Other:

v0.12.0-esp32-20230419

19 Apr 16:38
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Features:

  • target/xtensa: Added NX processors support

Bug fixes:

  • esp: libjaylink and hidapi support added into the release binaries. This will allow users to debug with Segger Jlink and CMSIS-DAP compatible adapters.
  • target/xtensa: Implemented hit_watchpoint callback. It made watchpoint behavior on Xtensa similar to other architectures (e.g. RISCV and ARM). Previously target was stopped just before the data are changed. Now it is stopped just after the data are changed in memory.

v0.12.0-esp32-20230313

19 Apr 16:43
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Pre-release

Features:

  • target/esp: Adds check for openocd binary and .cfg file versions match. Error message is printed when user try to run openocd with configured TCL scripts directory from another OpenOCD release. See #276 (comment).
  • jtag/esp_usb_jtag: Try to reset usb device on read errors. Try to reset USB JTAG device on read errors as it is done for write errors.

Bug fixes:

  • esp/apptrace: Fixes 'esp sysview stop' return code. After recent changes that command always returned error.
  • target/esp32h2: Fixes reset reason value.
  • target/esp_riscv: Clears apptrace ctrl block address on target reset. That prevents using old apptrace ctrl block address when application image is updated w/o OpenOCD restart.

v0.12.0-esp32-20230221

22 Feb 18:14
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Features:

  • target: Added base support for ESP32-C6.
  • target: Added base support for ESP32-H2.
  • flash/esp: Added support for the detection of 32-256MB flash chips. See #245.
  • flash/esp: Added possibility to control if binary needs to be written encrypted or not. Added encrypt option to program_esp command. program_esp_bins decides if the partition is encrypted or not based on flash_args.json. Previously the decision was based on the fuses' configuration only. Solves the problem described here.
  • flash/esp: Added esp stub_log <on|off> command. This command controls if flasher stub log messages should be read and printed along with OpenOCD ones. It should be very useful for user issues diagnostics.
  • driver/usb: Updated libusb to 1.0.26 in MacOS and Windows builts. It eliminates LIBUSB_ERROR_NOT_SUPPORTED error reported on Windows which actually did not break anything. See #255.
  • flash/esp: Added extra warning messages for some flasher stub return codes. They are intended to avoid users' confusion described in #260 (comment)

Bug Fixes:

  • flash/esp: Fixes PSRAM corruption by flasher stub on ESP32-S2/S3. Solves #264.
  • rtos/FreeRTOS: decrease log level of uxTopUsedPriority read issue. This error is also reported when the chip is just reset and the app data segment is not mapped yet by the bootloader. To avoid user's confusion its log level was changed.
  • target/xtensa: change the log level of Unexpected OCD_ID error. This error is also reported when single-core app is running on a multi-core chip (only one core is enabled). To avoid user confusion its log level was changed.
  • target/esp_riscv: Corrects maximum breakpoints and watchpoints numbers per target for different chips

Other:

v0.11.0-esp32-20221026

27 Oct 17:51
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Features:

  • esp: Adds reset cause printing. Now message with reset cause for every core of the chip is printed in a numerical and human-readable format.
  • esp/xtensa: Adds exception cause printing. Now message with the exception cause for Xtensa chips is printed in a numerical and human-readable format.
  • esp32c2: Adds flash encryption support.
  • rtos/nuttx: Adds ESP32-C3 support.
  • rtos/nuttx: Adds ESP32-S2 support.
  • rtos/nuttx: Adds ESP32-S3 support.
  • Releases binaries with remote bitbang support enabled.

Bug fixes:

  • Workarounds problem reported again in espressif/esp-idf#8065 (comment) by retrying memory read on failure. That problem led to "Step into" instead of "Step over" and other weird stuff like seemingly corrupting the stack during debugging.
  • esp/xtensa: Allows reading internal ROM by default. This bug led to memory read errors when GDB tried to unwind backtraces containing ROM functions.
  • esp/xtensa: Fixes data corruption on the first variable read. In some cases, this bug led to the reading of garbage data from memory.
  • esp_usb_jtag: Sanity check to prevent possible buffer overflow at the output buffer
  • esp/riscv: Filters out target halts caused normal debugging activities. This bug led to the message with exception reason printed on any target halt including those caused by normal debugging activities: breakpoints, stepping, manual program interruption by the user, etc.
  • esp/riscv: Fixes watchpoints reconfiguration from target. This bug led to "HW watchpoints slots leaks" when the target program set/re-configured the watchpoint with the same ID several times.

Other:

  • esp/xtensa: Rebased code base onto upstream Cadence generic Xtensa target implementation.
  • Synchronized with upstream changes.
  • Refactored for upstreaming patches.

v0.11.0-esp32-20220706

07 Jul 16:48
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2022/07/06 Release, based on OpenOCD v0.11.0

Features:

  • esp32c2: Adds generic support for ESP32-C2.
  • esp32c3: Implements logging the reason of the reset. The reason is printed in numerical and human readable format.
  • espxx: Implements soft_reset_halt command.
  • esp/semihosting: Adds full support for ESP IDF VFS driver directory API.
  • esp/flash: Adds no_clock_boost argument to program_esp and program_esp_bins commands. This can be helpful when users experience problems with flash programming. It forbids OpenOCD to modify (boost) CPU clock in order to speed up flashing.
  • freertos: Adds support for qGetTLSAddr GDB packet. This fixes problem appeared on Xtensa targets when user tried to print TLS variable value in GDB.
  • freertos: Enables reading some Xtensa registers for waiting tasks (e.g. threadptr). Zero values were returned before this change.
  • freertos: Support Amazon FreeRTOS SMP port (available in IDF starting from IDF 5.0)
  • doc: Updates description of Espressif-specific commands.

Bug fixes:

  • esp32s3: call smp_target_init instead of single core init.
  • rtos/esp32: Fixed AddressSanitizer heap-buffer-overflow issue when reading registers from ESP32 stack.
  • xtensa: Invalidates register cache on reset. This could lead to writing to target old registers values after chip reset and could lead to unpredictable behavior.
  • esp/flash: Fixed memory leaks in ESP flash driver reported by valgrind.

Other:

  • Synchronized with upstream changes
  • Refactored for upstreaming patches

v0.11.0-esp32-20220411

12 Apr 18:42
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2022/04/11 Release, based on OpenOCD v0.11.0

Features:

  • Synchronized with upstream.
  • esp/ci: Added build for MacOS ARM64.
  • esp-config: Added Espressif USB bridge board configs.
  • esp/flash: Added octal flash support.
  • esp/flash: Added MXIC 32MB flash chip support. Solves problem mention in #218.
  • esp/freertos: Print FreeRTOS kernel version.
  • esp/freertos: Read TCB_t offsets from ESP-IDF symbol table. This adds support for different TCB block layouts which can be caused by different FreeRTOS configurations.
  • esp/semihosting: Refactored code and minimized arch-specific changes in common semihosting implementation.
  • semihosting: Added 'arm semihosting_basedir' command. See description here

Bug fixes:

  • xtensa: Call 'keep_alive during' register/memory restore to avoid gdb warning.
  • esp32s3: Added automatic target reset upon GDB connection if memory protection is enabled (#190, #183, #176 (comment))
  • esp/xtensa: Added support for proper Xtensa semihosting break instruction. According to Xtensa spec 'break 1,14' should be used for semihosting calls. This will be fixed in IDF soon too.
  • target/esp: Fixed ESP32-S2 & S3 IROM region boundaries. It could lead to ROM debugging problems.
  • esp_riscv: Fix SBA access alignment for size < sba_access_size.

v0.11.0-esp32-20211220

20 Dec 20:21
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2021/12/20 Release, based on OpenOCD v0.11.0

Features:

  • Merge with upstream. Bump version to v0.11.0. This also closes a couple of issues: #198, #199, and #196
  • esp/riscv: Add flash breakpoints support for Espresif RISCV chips. Currently, only ESP32-C3 is supported.
  • jtag/esp_usb: Add Espressif USB bridge support

Bug fixes:

  • esp/flash: Add check for a maximum number of flash mappings. Prevent flash driver crash when flasher stub returns garbage upon flash mappings request.
  • esp32s3/esp_usb_jtag: Dummy jtag call before running an algorithm. It works around the problem on ESP32-S3 when USB JTAG device gets stuck after running flasher stub algorithm. That problem leads to a flash probing problem upon GDB connection or any other flash access command.
  • jtag/esp_usb: Check if USB device handle is valid before close
  • esp32s3: Add missed irom_mask_low mem region to the config.
  • rtos: Fix heap usage after free during rtos_destroy
  • esp_apptrace: Restart idle timeout after target reconnection. That could lead to data timeout error after target reset during tracing.

v0.10.0-esp32-20211111

11 Nov 10:30
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2021/11/11 Release, based on OpenOCD v0.10.0

Features:

  • flash/esp32s3: Added ESP32-S3 flash support (#178 (comment)). Access to chip's flash is supported including setting breakpoints there.
  • esp/riscv: Added coverage data collection support for Espressif RISCV chips. Currently this functionality is verified for ESP32-C3 only.
  • esp_usb_jtag: Added ability to filter out USB device by product serial. Now it is possible to specify which USB device should be used by command espusbjtag serial <serial_num>.

Bug fixes:

  • esp32s2-c3: Added automatic target reset upon GDB connection if memory protection is enabled (#190, #183, #176 (comment)).
  • esp32c3: Avoided missing chip reset due to problems with dmi_scan. This led to the problem when SW breakpoints and syscalls do not work.
  • esp32c3: Enables ebreaks in 'FLASH_BOOT' mode only. This led to the problem with flashing esp32c3 over UART with connected OpenOCD.
  • flash/esp: Added detection of unexpected target algorithm exit during a flash read/write. Now the error message is printed if flash stub invocation ended up accidentally.
  • flash/esp: Fixed cache flush in flasher stub for esp32s2/esp32c3. This problem led to partial data writes to flash.
  • esp_usb_jtag: Added USB device re-enumeration in case of data transfer problem (#176, #178). This problem led to built-in USB-JTAG getting stuck after HW reset.
  • esp_usb_jtag: Made tx/rx routines a bit more responsive and reliable. Added several attempts to tx/rx data in of failure.
  • esp32s2-s3: Added power config register reset to prevent getting stuck in soft reset. This problem led to application getting stuck after resetting the target with reset run.
  • esp32c3: Fixed WDT reset issue while waiting for resume after soft reset. This problem led to application getting stuck after resetting the target with reset run.
  • esp_remote: Fixed runtest function. This problem was causing error during ESP32-C3 examination.
  • gdb_server: Fixed registers access error reporting. Now it is controlled by gdb_report_register_access_error command. This problem led to RISCV GDB register access reporting and when GDB register packet is received when target is running.
  • algorithm: Fixed cleaning up algorithm data upon failure.
  • algorithm: Fixed '.data' and '.bss' section size alignment to avoid possible data corruption when running algorithms.