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AHMES.CDF
AHMES.asm.rpt
AHMES.done
AHMES.dpf
AHMES.eda.rpt
AHMES.fit.rpt
AHMES.fit.summary
AHMES.flow.rpt
AHMES.jdi
AHMES.map.rpt
AHMES.map.summary
AHMES.mif
AHMES.mif_update.rpt
AHMES.pin
AHMES.pof
AHMES.qpf
AHMES.qsf
AHMES.restore.rpt
AHMES.sof
AHMES.sta.rpt
AHMES.sta.summary
AHMES.tan.rpt
AHMES.tan.summary
AHMES.vhd
AHMES.vhd.bak
AHMES1.vwf
AHMES_assignment_defaults.qdf
CPU.bdf
MEMORIA.vhd
MEMORIA.vhd.bak
Readme.md
ahmes.bsf
loop2.mif
mem_256.bsf
mem_256.cmp
mem_256.qip
mem_256.vhd
mem_256_wave0.jpg
mem_256_waveforms.html
mem_test.bsf
mem_test.cmp
mem_test.qip
mem_test.vhd
mem_test_wave0.jpg
mem_test_waveforms.html
memoria.bsf
output_file.jic
output_file.map
output_file.pof
pio.bsf
pio.vhd
pio.vhd.bak
port_out.bsf
ula.bsf
ula.vhd
undo_redo.txt

Readme.md

#Ahmes - An hypothetical 8-bit CPU #Implementation on an Altera Cyclone IV FPGA

This is the VHDL implementation oh Ahmes, a simple hypothetical 8-bit CPU created by UFRGS Professor Dr. Raul Fernando Weber

This piece of software was entirely designed by Fábio Pereira and Roberto Amaral

This work is licensed under the Creative Commons Attribution 4.0 International License. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/.

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