diff --git a/Sources/Core/HardwareBreakpointManager.cpp b/Sources/Core/HardwareBreakpointManager.cpp
index 20bc8a245..321db8c6c 100644
--- a/Sources/Core/HardwareBreakpointManager.cpp
+++ b/Sources/Core/HardwareBreakpointManager.cpp
@@ -30,11 +30,10 @@ ErrorCode HardwareBreakpointManager::add(Address const &address,
     return kErrorInvalidArgument;
   }
 
-  if (mode == kModeRead) {
-    DS2LOG(Warning,
-           "read-only watchpoints are unsupported, setting as read-write");
+  // Readonly hardware watchpoints aren't natively implemented, so they
+  // are implemened in software instead. See #510
+  if (mode == kModeRead)
     mode = static_cast<Mode>(mode | kModeWrite);
-  }
 
   return super::add(address, lifetime, size, mode);
 }
diff --git a/Sources/Core/X86/HardwareBreakpointManager.cpp b/Sources/Core/X86/HardwareBreakpointManager.cpp
index bbde327cf..4947bbd3c 100644
--- a/Sources/Core/X86/HardwareBreakpointManager.cpp
+++ b/Sources/Core/X86/HardwareBreakpointManager.cpp
@@ -137,6 +137,9 @@ ErrorCode HardwareBreakpointManager::enableDebugCtrlReg(uint64_t &ctrlReg,
     EnableBit(ctrlReg, infoIdx);
     DisableBit(ctrlReg, infoIdx + 1);
     break;
+  // Readonly watchpoints aren't implemented in hardware, so a
+  // read|write watchpoint is placed, and write halts are filtered
+  // out in software. See #510
   case kModeRead:
   case kModeRead | kModeWrite:
     EnableBit(ctrlReg, infoIdx);