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My implementation of the 65k processor core, a 6502 blown up to 64bit
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.gitignore Initial commit of generator code


The af65k core is my implementation of the 65k processor specification,
a 6502 processor blown up to 64bit wide registers and address width.

Homepage is:

I am setting up the repository in preparation for publication

The subdirectories are as follows:

- generator: eclipse(tm) Java(tm) projects with code to generate parts of the
  docs, the main opmap VHDL code and, in the future, decoding tables for the

- vhdl: the af65k VHDL. Currently contains a first alpha VHDL implementation for the 
  af65002 variant, with maximum memory width of 8, 16, or 32, and maximum register width
  of 16, 32, or 64.

- doc: will contain programming information and implementation docs

- a65k: will contain the 65k cross-assembler

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