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base fork: fallen/NetBSD
base: a5153fa93a0c
...
head fork: fallen/NetBSD
compare: 9863d3821b9c
  • 8 commits
  • 114 files changed
  • 0 commit comments
  • 1 contributor
Showing with 8,391 additions and 26 deletions.
  1. +9 −0 TODO
  2. +1 −1  build.sh
  3. +3 −1 external/gpl3/binutils/dist/cpu/lm32.cpu
  4. +94 −0 external/gpl3/binutils/dist/gas/config/tc-lm32.c
  5. +7 −2 external/gpl3/binutils/dist/opcodes/lm32-desc.c
  6. +114 −0 external/gpl3/gcc/dist/gcc/config/lm32/_ashlsi3.asm
  7. +110 −0 external/gpl3/gcc/dist/gcc/config/lm32/_ashrsi3.asm
  8. +99 −0 external/gpl3/gcc/dist/gcc/config/lm32/_divsi3.c
  9. +109 −0 external/gpl3/gcc/dist/gcc/config/lm32/_lshrsi3.asm
  10. +71 −0 external/gpl3/gcc/dist/gcc/config/lm32/_modsi3.c
  11. +48 −0 external/gpl3/gcc/dist/gcc/config/lm32/_mulsi3.c
  12. +53 −0 external/gpl3/gcc/dist/gcc/config/lm32/_udivmodsi4.c
  13. +49 −0 external/gpl3/gcc/dist/gcc/config/lm32/_udivsi3.c
  14. +49 −0 external/gpl3/gcc/dist/gcc/config/lm32/_umodsi3.c
  15. +0 −13 external/gpl3/gcc/dist/gcc/config/lm32/lm32-netbsd.h
  16. +7 −0 external/gpl3/gcc/dist/gcc/config/lm32/t-lm32
  17. +4 −0 external/gpl3/gcc/dist/libgcc/config.host
  18. +4 −0 share/mk/bsd.sys.mk
  19. +6 −0 sys/arch/lm32/compile/Makefile
  20. +14 −0 sys/arch/lm32/conf/GENERIC
  21. +86 −0 sys/arch/lm32/conf/Makefile.lm32
  22. +9 −0 sys/arch/lm32/conf/files.lm32
  23. +1 −0  sys/arch/lm32/conf/majors.lm32
  24. +2 −0  sys/arch/lm32/include/Makefile.inc
  25. +62 −0 sys/arch/lm32/include/ansi.h
  26. +245 −0 sys/arch/lm32/include/asm.h
  27. +8 −0 sys/arch/lm32/include/bswap.h
  28. +12 −0 sys/arch/lm32/include/cdefs.h
  29. +244 −0 sys/arch/lm32/include/cpu.h
  30. +45 −0 sys/arch/lm32/include/cpu_counter.h
  31. +3 −0  sys/arch/lm32/include/endian_machdep.h
  32. +93 −0 sys/arch/lm32/include/frame.h
  33. +56 −0 sys/arch/lm32/include/int_const.h
  34. +212 −0 sys/arch/lm32/include/int_fmtio.h
  35. +127 −0 sys/arch/lm32/include/int_limits.h
  36. +95 −0 sys/arch/lm32/include/int_mwgwtypes.h
  37. +68 −0 sys/arch/lm32/include/int_types.h
  38. +23 −0 sys/arch/lm32/include/intr.h
  39. +128 −0 sys/arch/lm32/include/limits.h
  40. +121 −0 sys/arch/lm32/include/lock.h
  41. +90 −0 sys/arch/lm32/include/mcontext.h
  42. +80 −0 sys/arch/lm32/include/mutex.h
  43. +97 −0 sys/arch/lm32/include/param.h
  44. +49 −0 sys/arch/lm32/include/pcb.h
  45. +20 −0 sys/arch/lm32/include/pmap.h
  46. +60 −0 sys/arch/lm32/include/proc.h
  47. +6 −0 sys/arch/lm32/include/psl.h
  48. +117 −0 sys/arch/lm32/include/pte.h
  49. +47 −0 sys/arch/lm32/include/ptrace.h
  50. +99 −0 sys/arch/lm32/include/reg.h
  51. +39 −0 sys/arch/lm32/include/registers.h
  52. +50 −0 sys/arch/lm32/include/rwlock.h
  53. +64 −0 sys/arch/lm32/include/signal.h
  54. +53 −0 sys/arch/lm32/include/trap.h
  55. +101 −0 sys/arch/lm32/include/types.h
  56. +107 −0 sys/arch/lm32/include/vmparam.h
  57. +47 −0 sys/arch/lm32/include/wchar_limits.h
  58. +14 −0 sys/arch/milkymist/Makefile
  59. +3 −0  sys/arch/milkymist/compile/Makefile
  60. +14 −0 sys/arch/milkymist/conf/GENERIC
  61. +100 −0 sys/arch/milkymist/conf/Makefile.milkymist
  62. +2 −0  sys/arch/milkymist/include/Makefile.inc
  63. +8 −0 sys/arch/milkymist/include/ansi.h
  64. +3 −0  sys/arch/milkymist/include/bswap.h
  65. +386 −0 sys/arch/milkymist/include/bus_defs.h
  66. +385 −0 sys/arch/milkymist/include/bus_funcs.h
  67. +8 −0 sys/arch/milkymist/include/cdefs.h
  68. +3 −0  sys/arch/milkymist/include/cpu.h
  69. +29 −0 sys/arch/milkymist/include/cpu_counter.h
  70. +7 −7 sys/arch/{lm32 → milkymist}/include/disklabel.h
  71. +8 −0 sys/arch/milkymist/include/elf_machdep.h
  72. +3 −0  sys/arch/milkymist/include/endian.h
  73. +3 −0  sys/arch/milkymist/include/endian_machdep.h
  74. +8 −0 sys/arch/milkymist/include/frame.h
  75. +3 −0  sys/arch/milkymist/include/int_const.h
  76. +3 −0  sys/arch/milkymist/include/int_fmtio.h
  77. +3 −0  sys/arch/milkymist/include/int_limits.h
  78. +3 −0  sys/arch/milkymist/include/int_mwgwtypes.h
  79. +3 −0  sys/arch/milkymist/include/int_types.h
  80. +138 −0 sys/arch/milkymist/include/intr.h
  81. +104 −0 sys/arch/milkymist/include/irqhandler.h
  82. +3 −0  sys/arch/milkymist/include/limits.h
  83. +4 −0 sys/arch/milkymist/include/lock.h
  84. +3 −0  sys/arch/milkymist/include/mcontext.h
  85. +3 −0  sys/arch/milkymist/include/mutex.h
  86. +51 −0 sys/arch/milkymist/include/param.h
  87. +3 −0  sys/arch/milkymist/include/pcb.h
  88. +3 −0  sys/arch/milkymist/include/pmap.h
  89. +3 −0  sys/arch/milkymist/include/proc.h
  90. +29 −0 sys/arch/milkymist/include/psl.h
  91. +3 −0  sys/arch/milkymist/include/pte.h
  92. +8 −0 sys/arch/milkymist/include/ptrace.h
  93. +8 −0 sys/arch/milkymist/include/reg.h
  94. +3 −0  sys/arch/milkymist/include/rwlock.h
  95. +3 −0  sys/arch/milkymist/include/signal.h
  96. +9 −0 sys/arch/milkymist/include/trap.h
  97. +11 −0 sys/arch/milkymist/include/types.h
  98. +6 −0 sys/arch/milkymist/include/vmparam.h
  99. +3 −0  sys/arch/milkymist/include/wchar_limits.h
  100. +49 −0 sys/arch/milkymist/milkymist/genassym.cf
  101. +158 −0 sys/arch/milkymist/milkymist/locore.s
  102. +296 −0 sys/arch/milkymist/milkymist/machdep.c
  103. +2 −1  sys/lib/libkern/Makefile.libkern
  104. +3 −0  sys/lib/libkern/arch/lm32/Makefile.inc
  105. +114 −0 sys/lib/libkern/arch/lm32/_ashlsi3.S
  106. +110 −0 sys/lib/libkern/arch/lm32/_ashrsi3.S
  107. +99 −0 sys/lib/libkern/arch/lm32/_divsi3.c
  108. +109 −0 sys/lib/libkern/arch/lm32/_lshrsi3.S
  109. +71 −0 sys/lib/libkern/arch/lm32/_modsi3.c
  110. +53 −0 sys/lib/libkern/arch/lm32/_udivmodsi4.c
  111. +49 −0 sys/lib/libkern/arch/lm32/_udivsi3.c
  112. +2,163 −0 sys/lib/libkern/arch/lm32/libgcc2.c
  113. +99 −0 sys/lib/libkern/arch/lm32/libgcc_lm32.h
  114. +2 −1  tools/headerlist
9 TODO
View
@@ -0,0 +1,9 @@
+LM32 port TODO:
+
+- add some libkern features
+- add crtstuff in libcsu
+- verify frame.h
+- make _spl() functions less nazi (don't mask all IRQs when it's not necessary)
+- make sure it's fine to hardwire CLKF_USERMOD to 0 or 1 (this and the following one seem to be used for statistics purposes only)
+- make sure it's fine to hardwire CLKF_INTR to 0 or 1
+- Do I need to implement cpu_did_resched() ?
2  build.sh
View
@@ -650,7 +650,7 @@ MACHINE=vax MACHINE_ARCH=vax
MACHINE=x68k MACHINE_ARCH=m68k
MACHINE=zaurus MACHINE_ARCH=arm DEFAULT
MACHINE=zaurus MACHINE_ARCH=earm
-MACHINE=lm32 MACHINE_ARCH=lm32
+MACHINE=milkymist MACHINE_ARCH=lm32
'
# getarch -- find the default MACHINE_ARCH for a MACHINE,
4 external/gpl3/binutils/dist/cpu/lm32.cpu
View
@@ -101,9 +101,11 @@
(EBA 7)
(DC 8)
(DEBA 9)
+ (CFG2 10)
(JTX 14) (JRX 15)
(BP0 16) (BP1 17) (BP2 18) (BP3 19)
- (WP0 24) (WP1 25) (WP2 26) (WP3 27)
+ (WP0 24) (WP1 25) (WP2 26) (WP3 27)
+ (PSW 29) (TLBVADDR 30) (TLBPADDR 31) (TLBBADVADDR 31)
)
)
() ()
94 external/gpl3/binutils/dist/gas/config/tc-lm32.c
View
@@ -72,6 +72,99 @@ const char line_separator_chars[] = ";";
const char EXP_CHARS[] = "eE";
const char FLT_CHARS[] = "dD";
+/* Helper function for lm32_stringer. Used to find the end of
+ a string. */
+
+static unsigned int
+lm32_stringer_aux (char *s)
+{
+ unsigned int c = *s & CHAR_MASK;
+
+ switch (c)
+ {
+ case '\"':
+ c = NOT_A_CHAR;
+ break;
+ default:
+ break;
+ }
+ return c;
+}
+
+/* Handle a .STRING type pseudo-op. */
+
+static void
+lm32_stringer (int append_zero)
+{
+ char *s, num_buf[4];
+ unsigned int c;
+ int i;
+
+ /* Preprocess the string to handle lm32-specific escape sequences.
+ For example, \xDD where DD is a hexadecimal number should be
+ changed to \OOO where OOO is an octal number. */
+
+ /* Skip the opening quote. */
+ s = input_line_pointer + 1;
+
+ while (is_a_char (c = lm32_stringer_aux (s++)))
+ {
+ if (c == '\\')
+ {
+ c = *s;
+ switch (c)
+ {
+ /* Handle \x<num>. */
+ case 'x':
+ {
+ unsigned int number;
+ int num_digit;
+ char dg;
+ char *s_start = s;
+
+ /* Get past the 'x'. */
+ s++;
+ for (num_digit = 0, number = 0, dg = *s;
+ num_digit < 2
+ && (ISDIGIT (dg) || (dg >= 'a' && dg <= 'f')
+ || (dg >= 'A' && dg <= 'F'));
+ num_digit++)
+ {
+ if (ISDIGIT (dg))
+ number = number * 16 + dg - '0';
+ else if (dg >= 'a' && dg <= 'f')
+ number = number * 16 + dg - 'a' + 10;
+ else
+ number = number * 16 + dg - 'A' + 10;
+
+ s++;
+ dg = *s;
+ }
+ if (num_digit > 0)
+ {
+ switch (num_digit)
+ {
+ case 1:
+ sprintf (num_buf, "%02o", number);
+ break;
+ case 2:
+ sprintf (num_buf, "%03o", number);
+ break;
+ }
+ for (i = 0; i <= num_digit; i++)
+ s_start[i] = num_buf[i];
+ }
+ break;
+ }
+ /* This might be a "\"", skip over the escaped char. */
+ default:
+ s++;
+ break;
+ }
+ }
+ }
+ stringer (8 + append_zero);
+}
/* Target specific assembly directives. */
const pseudo_typeS md_pseudo_table[] =
@@ -81,6 +174,7 @@ const pseudo_typeS md_pseudo_table[] =
{ "hword", cons, 2 },
{ "word", cons, 4 },
{ "dword", cons, 8 },
+ { "stringz", lm32_stringer, 1},
{(char *)0 , (void(*)(int))0, 0}
};
9 external/gpl3/binutils/dist/opcodes/lm32-desc.c
View
@@ -185,6 +185,7 @@ static CGEN_KEYWORD_ENTRY lm32_cgen_opval_h_csr_entries[] =
{ "EBA", 7, {0, {{{0, 0}}}}, 0, 0 },
{ "DC", 8, {0, {{{0, 0}}}}, 0, 0 },
{ "DEBA", 9, {0, {{{0, 0}}}}, 0, 0 },
+ { "CFG2", 10, {0, {{{0, 0}}}}, 0, 0 },
{ "JTX", 14, {0, {{{0, 0}}}}, 0, 0 },
{ "JRX", 15, {0, {{{0, 0}}}}, 0, 0 },
{ "BP0", 16, {0, {{{0, 0}}}}, 0, 0 },
@@ -194,13 +195,17 @@ static CGEN_KEYWORD_ENTRY lm32_cgen_opval_h_csr_entries[] =
{ "WP0", 24, {0, {{{0, 0}}}}, 0, 0 },
{ "WP1", 25, {0, {{{0, 0}}}}, 0, 0 },
{ "WP2", 26, {0, {{{0, 0}}}}, 0, 0 },
- { "WP3", 27, {0, {{{0, 0}}}}, 0, 0 }
+ { "WP3", 27, {0, {{{0, 0}}}}, 0, 0 },
+ { "PSW", 29, {0, {{{0, 0}}}}, 0, 0 },
+ { "TLBVADDR", 30, {0, {{{0, 0}}}}, 0, 0 },
+ { "TLBPADDR", 31, {0, {{{0, 0}}}}, 0, 0 },
+ { "TLBBADVADDR", 31, {0, {{{0, 0}}}}, 0, 0 }
};
CGEN_KEYWORD lm32_cgen_opval_h_csr =
{
& lm32_cgen_opval_h_csr_entries[0],
- 20,
+ 25,
0, 0, 0, 0, ""
};
114 external/gpl3/gcc/dist/gcc/config/lm32/_ashlsi3.asm
View
@@ -0,0 +1,114 @@
+# _ashlsi3.S for Lattice Mico32
+# Contributed by Jon Beniston <jon@beniston.com> and Richard Henderson.
+#
+# Copyright (C) 2009 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+# <http://www.gnu.org/licenses/>.
+#
+
+/* Arithmetic left shift. */
+
+ .text
+
+ .global __ashlsi3
+ .type __ashlsi3,@function
+
+ .align 4
+__ashlsi3:
+ /* Only use 5 LSBs, as that's all the h/w shifter uses. */
+ andi r2, r2, 0x1f
+ /* Get address of offset into unrolled shift loop to jump to. */
+#ifdef __PIC__
+ lw r3, (gp+got(__ashlsi3_0))
+#else
+ mvhi r3, hi(__ashlsi3_0)
+ ori r3, r3, lo(__ashlsi3_0)
+#endif
+ add r2, r2, r2
+ add r2, r2, r2
+ sub r3, r3, r2
+ b r3
+
+__ashlsi3_31:
+ add r1, r1, r1
+__ashlsi3_30:
+ add r1, r1, r1
+__ashlsi3_29:
+ add r1, r1, r1
+__ashlsi3_28:
+ add r1, r1, r1
+__ashlsi3_27:
+ add r1, r1, r1
+__ashlsi3_26:
+ add r1, r1, r1
+__ashlsi3_25:
+ add r1, r1, r1
+__ashlsi3_24:
+ add r1, r1, r1
+__ashlsi3_23:
+ add r1, r1, r1
+__ashlsi3_22:
+ add r1, r1, r1
+__ashlsi3_21:
+ add r1, r1, r1
+__ashlsi3_20:
+ add r1, r1, r1
+__ashlsi3_19:
+ add r1, r1, r1
+__ashlsi3_18:
+ add r1, r1, r1
+__ashlsi3_17:
+ add r1, r1, r1
+__ashlsi3_16:
+ add r1, r1, r1
+__ashlsi3_15:
+ add r1, r1, r1
+__ashlsi3_14:
+ add r1, r1, r1
+__ashlsi3_13:
+ add r1, r1, r1
+__ashlsi3_12:
+ add r1, r1, r1
+__ashlsi3_11:
+ add r1, r1, r1
+__ashlsi3_10:
+ add r1, r1, r1
+__ashlsi3_9:
+ add r1, r1, r1
+__ashlsi3_8:
+ add r1, r1, r1
+__ashlsi3_7:
+ add r1, r1, r1
+__ashlsi3_6:
+ add r1, r1, r1
+__ashlsi3_5:
+ add r1, r1, r1
+__ashlsi3_4:
+ add r1, r1, r1
+__ashlsi3_3:
+ add r1, r1, r1
+__ashlsi3_2:
+ add r1, r1, r1
+__ashlsi3_1:
+ add r1, r1, r1
+__ashlsi3_0:
+ ret
+
+
110 external/gpl3/gcc/dist/gcc/config/lm32/_ashrsi3.asm
View
@@ -0,0 +1,110 @@
+# _ashrsi3.S for Lattice Mico32
+# Contributed by Jon Beniston <jon@beniston.com> and Richard Henderson.
+#
+# Copyright (C) 2009 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+# <http://www.gnu.org/licenses/>.
+#
+
+/* Arithmetic right shift. */
+
+ .global __ashrsi3
+ .type __ashrsi3,@function
+
+__ashrsi3:
+ /* Only use 5 LSBs, as that's all the h/w shifter uses. */
+ andi r2, r2, 0x1f
+ /* Get address of offset into unrolled shift loop to jump to. */
+#ifdef __PIC__
+ lw r3, (gp+got(__ashrsi3_0))
+#else
+ mvhi r3, hi(__ashrsi3_0)
+ ori r3, r3, lo(__ashrsi3_0)
+#endif
+ add r2, r2, r2
+ add r2, r2, r2
+ sub r3, r3, r2
+ b r3
+
+__ashrsi3_31:
+ sri r1, r1, 1
+__ashrsi3_30:
+ sri r1, r1, 1
+__ashrsi3_29:
+ sri r1, r1, 1
+__ashrsi3_28:
+ sri r1, r1, 1
+__ashrsi3_27:
+ sri r1, r1, 1
+__ashrsi3_26:
+ sri r1, r1, 1
+__ashrsi3_25:
+ sri r1, r1, 1
+__ashrsi3_24:
+ sri r1, r1, 1
+__ashrsi3_23:
+ sri r1, r1, 1
+__ashrsi3_22:
+ sri r1, r1, 1
+__ashrsi3_21:
+ sri r1, r1, 1
+__ashrsi3_20:
+ sri r1, r1, 1
+__ashrsi3_19:
+ sri r1, r1, 1
+__ashrsi3_18:
+ sri r1, r1, 1
+__ashrsi3_17:
+ sri r1, r1, 1
+__ashrsi3_16:
+ sri r1, r1, 1
+__ashrsi3_15:
+ sri r1, r1, 1
+__ashrsi3_14:
+ sri r1, r1, 1
+__ashrsi3_13:
+ sri r1, r1, 1
+__ashrsi3_12:
+ sri r1, r1, 1
+__ashrsi3_11:
+ sri r1, r1, 1
+__ashrsi3_10:
+ sri r1, r1, 1
+__ashrsi3_9:
+ sri r1, r1, 1
+__ashrsi3_8:
+ sri r1, r1, 1
+__ashrsi3_7:
+ sri r1, r1, 1
+__ashrsi3_6:
+ sri r1, r1, 1
+__ashrsi3_5:
+ sri r1, r1, 1
+__ashrsi3_4:
+ sri r1, r1, 1
+__ashrsi3_3:
+ sri r1, r1, 1
+__ashrsi3_2:
+ sri r1, r1, 1
+__ashrsi3_1:
+ sri r1, r1, 1
+__ashrsi3_0:
+ ret
+
99 external/gpl3/gcc/dist/gcc/config/lm32/_divsi3.c
View
@@ -0,0 +1,99 @@
+/* _divsi3 for Lattice Mico32.
+ Contributed by Jon Beniston <jon@beniston.com>
+
+ Copyright (C) 2009 Free Software Foundation, Inc.
+
+ This file is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 3, or (at your option) any
+ later version.
+
+ This file is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include "libgcc_lm32.h"
+
+/* Signed integer division. */
+
+static const UQItype __divsi3_table[] = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 3, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 4, 2, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 5, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 6, 3, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 7, 3, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 8, 4, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
+ 0, 9, 4, 3, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0,
+ 0, 10, 5, 3, 2, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ 0, 11, 5, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,
+ 0, 12, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0,
+ 0, 13, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0, 0,
+ 0, 14, 7, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0,
+ 0, 15, 7, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1,
+};
+
+SItype
+__divsi3 (SItype a, SItype b)
+{
+ int neg = 0;
+ SItype res;
+ int cfg;
+
+ if (b == 0)
+ {
+ /* Raise divide by zero exception. */
+ int eba, sr;
+ /* Save interrupt enable. */
+ __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
+ sr = (sr & 1) << 1;
+ __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
+ /* Branch to exception handler. */
+ __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
+ eba += 32 * 5;
+ __asm__ __volatile__ ("mv ea, ra");
+ __asm__ __volatile__ ("b %0"::"r" (eba));
+ __builtin_unreachable ();
+ }
+
+ if (((USItype) (a | b)) < 16)
+ res = __divsi3_table[(a << 4) + b];
+ else
+ {
+
+ if (a < 0)
+ {
+ a = -a;
+ neg = !neg;
+ }
+
+ if (b < 0)
+ {
+ b = -b;
+ neg = !neg;
+ }
+
+ __asm__ ("rcsr %0, CFG":"=r" (cfg));
+ if (cfg & 2)
+ __asm__ ("divu %0, %1, %2": "=r" (res):"r" (a), "r" (b));
+ else
+ res = __udivmodsi4 (a, b, 0);
+
+ if (neg)
+ res = -res;
+ }
+
+ return res;
+}
109 external/gpl3/gcc/dist/gcc/config/lm32/_lshrsi3.asm
View
@@ -0,0 +1,109 @@
+# _lshrsi3.S for Lattice Mico32
+# Contributed by Jon Beniston <jon@beniston.com> and Richard Henderson.
+#
+# Copyright (C) 2009 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 3, or (at your option) any
+# later version.
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# Under Section 7 of GPL version 3, you are granted additional
+# permissions described in the GCC Runtime Library Exception, version
+# 3.1, as published by the Free Software Foundation.
+#
+# You should have received a copy of the GNU General Public License and
+# a copy of the GCC Runtime Library Exception along with this program;
+# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+# <http://www.gnu.org/licenses/>.
+#
+
+/* Logical right shift. */
+
+ .global __lshrsi3
+ .type __lshrsi3,@function
+
+__lshrsi3:
+ /* Only use 5 LSBs, as that's all the h/w shifter uses. */
+ andi r2, r2, 0x1f
+ /* Get address of offset into unrolled shift loop to jump to. */
+#ifdef __PIC__
+ lw r3, (gp+got(__lshrsi3_0))
+#else
+ mvhi r3, hi(__lshrsi3_0)
+ ori r3, r3, lo(__lshrsi3_0)
+#endif
+ add r2, r2, r2
+ add r2, r2, r2
+ sub r3, r3, r2
+ b r3
+
+__lshrsi3_31:
+ srui r1, r1, 1
+__lshrsi3_30:
+ srui r1, r1, 1
+__lshrsi3_29:
+ srui r1, r1, 1
+__lshrsi3_28:
+ srui r1, r1, 1
+__lshrsi3_27:
+ srui r1, r1, 1
+__lshrsi3_26:
+ srui r1, r1, 1
+__lshrsi3_25:
+ srui r1, r1, 1
+__lshrsi3_24:
+ srui r1, r1, 1
+__lshrsi3_23:
+ srui r1, r1, 1
+__lshrsi3_22:
+ srui r1, r1, 1
+__lshrsi3_21:
+ srui r1, r1, 1
+__lshrsi3_20:
+ srui r1, r1, 1
+__lshrsi3_19:
+ srui r1, r1, 1
+__lshrsi3_18:
+ srui r1, r1, 1
+__lshrsi3_17:
+ srui r1, r1, 1
+__lshrsi3_16:
+ srui r1, r1, 1
+__lshrsi3_15:
+ srui r1, r1, 1
+__lshrsi3_14:
+ srui r1, r1, 1
+__lshrsi3_13:
+ srui r1, r1, 1
+__lshrsi3_12:
+ srui r1, r1, 1
+__lshrsi3_11:
+ srui r1, r1, 1
+__lshrsi3_10:
+ srui r1, r1, 1
+__lshrsi3_9:
+ srui r1, r1, 1
+__lshrsi3_8:
+ srui r1, r1, 1
+__lshrsi3_7:
+ srui r1, r1, 1
+__lshrsi3_6:
+ srui r1, r1, 1
+__lshrsi3_5:
+ srui r1, r1, 1
+__lshrsi3_4:
+ srui r1, r1, 1
+__lshrsi3_3:
+ srui r1, r1, 1
+__lshrsi3_2:
+ srui r1, r1, 1
+__lshrsi3_1:
+ srui r1, r1, 1
+__lshrsi3_0:
+ ret
71 external/gpl3/gcc/dist/gcc/config/lm32/_modsi3.c
View
@@ -0,0 +1,71 @@
+/* _modsi3 for Lattice Mico32.
+ Contributed by Jon Beniston <jon@beniston.com>
+
+ Copyright (C) 2009 Free Software Foundation, Inc.
+
+ This file is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 3, or (at your option) any
+ later version.
+
+ This file is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include "libgcc_lm32.h"
+
+/* Signed integer modulus. */
+
+SItype
+__modsi3 (SItype a, SItype b)
+{
+ int neg = 0;
+ SItype res;
+ int cfg;
+
+ if (b == 0)
+ {
+ /* Raise divide by zero exception. */
+ int eba, sr;
+ /* Save interrupt enable. */
+ __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
+ sr = (sr & 1) << 1;
+ __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
+ /* Branch to exception handler. */
+ __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
+ eba += 32 * 5;
+ __asm__ __volatile__ ("mv ea, ra");
+ __asm__ __volatile__ ("b %0"::"r" (eba));
+ __builtin_unreachable ();
+ }
+
+ if (a < 0)
+ {
+ a = -a;
+ neg = 1;
+ }
+
+ if (b < 0)
+ b = -b;
+
+__asm__ ("rcsr %0, CFG":"=r" (cfg));
+ if (cfg & 2)
+ __asm__ ("modu %0, %1, %2": "=r" (res):"r" (a), "r" (b));
+ else
+ res = __udivmodsi4 (a, b, 1);
+
+ if (neg)
+ res = -res;
+
+ return res;
+}
48 external/gpl3/gcc/dist/gcc/config/lm32/_mulsi3.c
View
@@ -0,0 +1,48 @@
+/* _mulsi3 for Lattice Mico32.
+ Contributed by Jon Beniston <jon@beniston.com>
+
+ Copyright (C) 2009 Free Software Foundation, Inc.
+
+ This file is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 3, or (at your option) any
+ later version.
+
+ This file is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include "libgcc_lm32.h"
+
+/* Integer multiplication. */
+
+USItype
+__mulsi3 (USItype a, USItype b)
+{
+ USItype result;
+
+ result = 0;
+
+ if (a == 0)
+ return 0;
+
+ while (b != 0)
+ {
+ if (b & 1)
+ result += a;
+ a <<= 1;
+ b >>= 1;
+ }
+
+ return result;
+}
53 external/gpl3/gcc/dist/gcc/config/lm32/_udivmodsi4.c
View
@@ -0,0 +1,53 @@
+/* _udivmodsi4 for Lattice Mico32.
+ Contributed by Jon Beniston <jon@beniston.com>
+
+ Copyright (C) 2009 Free Software Foundation, Inc.
+
+ This file is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 3, or (at your option) any
+ later version.
+
+ This file is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include "libgcc_lm32.h"
+
+/* Unsigned integer division/modulus. */
+
+USItype
+__udivmodsi4 (USItype num, USItype den, int modwanted)
+{
+ USItype bit = 1;
+ USItype res = 0;
+
+ while (den < num && bit && !(den & (1L << 31)))
+ {
+ den <<= 1;
+ bit <<= 1;
+ }
+ while (bit)
+ {
+ if (num >= den)
+ {
+ num -= den;
+ res |= bit;
+ }
+ bit >>= 1;
+ den >>= 1;
+ }
+ if (modwanted)
+ return num;
+ return res;
+}
49 external/gpl3/gcc/dist/gcc/config/lm32/_udivsi3.c
View
@@ -0,0 +1,49 @@
+/* _udivsi3 for Lattice Mico32.
+ Contributed by Jon Beniston <jon@beniston.com>
+
+ Copyright (C) 2009 Free Software Foundation, Inc.
+
+ This file is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 3, or (at your option) any
+ later version.
+
+ This file is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include "libgcc_lm32.h"
+
+/* Unsigned integer division. */
+
+USItype
+__udivsi3 (USItype a, USItype b)
+{
+ if (b == 0)
+ {
+ /* Raise divide by zero exception. */
+ int eba, sr;
+ /* Save interrupt enable. */
+ __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
+ sr = (sr & 1) << 1;
+ __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
+ /* Branch to exception handler. */
+ __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
+ eba += 32 * 5;
+ __asm__ __volatile__ ("mv ea, ra");
+ __asm__ __volatile__ ("b %0"::"r" (eba));
+ __builtin_unreachable ();
+ }
+
+ return __udivmodsi4 (a, b, 0);
+}
49 external/gpl3/gcc/dist/gcc/config/lm32/_umodsi3.c
View
@@ -0,0 +1,49 @@
+/* _umodsi3 for Lattice Mico32.
+ Contributed by Jon Beniston <jon@beniston.com>
+
+ Copyright (C) 2009 Free Software Foundation, Inc.
+
+ This file is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the
+ Free Software Foundation; either version 3, or (at your option) any
+ later version.
+
+ This file is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include "libgcc_lm32.h"
+
+/* Unsigned modulus. */
+
+USItype
+__umodsi3 (USItype a, USItype b)
+{
+ if (b == 0)
+ {
+ /* Raise divide by zero exception. */
+ int eba, sr;
+ /* Save interrupt enable. */
+ __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
+ sr = (sr & 1) << 1;
+ __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
+ /* Branch to exception handler. */
+ __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
+ eba += 32 * 5;
+ __asm__ __volatile__ ("mv ea, ra");
+ __asm__ __volatile__ ("b %0"::"r" (eba));
+ __builtin_unreachable ();
+ }
+
+ return __udivmodsi4 (a, b, 1);
+}
13 external/gpl3/gcc/dist/gcc/config/lm32/lm32-netbsd.h
View
@@ -96,19 +96,6 @@ Boston, MA 02111-1307, USA. */
/* Use the default. */
#undef TARGET_ASM_GLOBALIZE_LABEL
-/* FIXME: Hacked from the <elfos.h> one so that we avoid multiple
- labels in a function declaration (since pa.c seems determined to do
- it differently) */
-
-#undef ASM_DECLARE_FUNCTION_NAME
-#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
- do \
- { \
- ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "function"); \
- ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL)); \
- } \
- while (0)
-
/* NetBSD always uses gas. */
#undef TARGET_GAS
#define TARGET_GAS 1
7 external/gpl3/gcc/dist/gcc/config/lm32/t-lm32
View
@@ -1,2 +1,9 @@
# for multilib
MULTILIB_OPTIONS = mbarrel-shift-enabled mmultiply-enabled mdivide-enabled msign-extend-enabled
+#LIB1ASMSRC = lm32/_ashlsi3.S \
+# lm32/_ashrsi3.S \
+# lm32/_lshrsi3.S
+
+#LIB1ASMFUNCS = _udivsi3 _umodsi3
+
+LIB2FUNCS_EXTRA += $(srcdir)/config/lm32/_divsi3.c $(srcdir)/config/lm32/_modsi3.c $(srcdir)/config/lm32/_mulsi3.c $(srcdir)/config/lm32/_udivmodsi4.c $(srcdir)/config/lm32/_udivsi3.c $(srcdir)/config/lm32/_umodsi3.c $(srcdir)/config/lm32/_ashlsi3.asm $(srcdir)/config/lm32/_ashrsi3.asm $(srcdir)/config/lm32/_lshrsi3.asm
4 external/gpl3/gcc/dist/libgcc/config.host
View
@@ -365,6 +365,10 @@ lm32-*-elf*|lm32-*-rtems*)
extra_parts="crtbegin.o crtend.o crti.o crtn.o"
tmake_file="lm32/t-lm32 lm32/t-elf t-softfp"
;;
+lm32-*-netbsd*)
+ extra_parts="crtbegin.o crtend.o crti.o crtn.o"
+ tmake_file="lm32/t-lm32 lm32/t-elf t-softfp"
+ ;;
lm32-*-uclinux*)
extra_parts="crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o"
tmake_file="lm32/t-lm32 lm32/t-uclinux t-softfp"
4 share/mk/bsd.sys.mk
View
@@ -114,6 +114,10 @@ FFLAGS+= -mieee
CFLAGS+= -Wa,-Av8plus
.endif
+.if ${MACHINE_ARCH} == "lm32" && ${MACHINE} == "milkymist"
+CFLAGS+= -mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled
+.endif
+
.if !defined(NOGCCERROR)
.if (${MACHINE_ARCH} == "mips64el") || (${MACHINE_ARCH} == "mips64eb")
CPUFLAGS+= -Wa,--fatal-warnings
6 sys/arch/lm32/compile/Makefile
View
@@ -0,0 +1,6 @@
+# $NetBSD: Makefile,v 1.1 2003/01/06 17:40:35 lukem Exp $
+
+.include <bsd.prog.mk>
+
+CFLAGS += -mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled
+
14 sys/arch/lm32/conf/GENERIC
View
@@ -0,0 +1,14 @@
+machine milkymist lm32
+
+#maxusers 16
+
+options HZ=100
+file-system PROCFS
+file-system TMPFS
+file-system PTYFS
+file-system KERNFS
+file-system FDESC
+
+config netbsd root on ? type ?
+
+mainbus0 at root
86 sys/arch/lm32/conf/Makefile.lm32
View
@@ -0,0 +1,86 @@
+# $NetBSD: Makefile.lm32,v 1.178 2012/10/03 18:58:31 dsl Exp $
+
+# Makefile for NetBSD
+#
+
+MACHINE_ARCH= lm32
+USETOOLS?= no
+NEED_OWN_INSTALL_TARGET?=no
+.include <bsd.own.mk>
+
+USE_SSP?= no
+
+##
+## (1) port identification
+##
+LM32= $S/arch/lm32
+GENASSYM_CONF= ${LM32}/lm32/genassym.cf
+
+##
+## (2) compile settings
+##
+CPPFLAGS+= -Dlm32
+
+AFLAGS.mptramp.S= ${${ACTIVE_CC} == "clang":?-no-integrated-as:}
+AFLAGS.spl.S= ${${ACTIVE_CC} == "clang":?-no-integrated-as:}
+AFLAGS.lock_stubs.S= ${${ACTIVE_CC} == "clang":?-no-integrated-as:}
+
+##
+## (3) libkern and compat
+##
+OPT_MODULAR= %MODULAR%
+.if !empty(OPT_MODULAR)
+KERN_AS= obj
+.else
+KERN_AS= library
+.endif
+
+##
+## (4) local objects, compile rules, and dependencies
+##
+MD_OBJS=
+MD_CFILES=
+MD_SFILES=
+
+##
+## (5) link settings
+##
+TEXTADDR?= c0100000
+LINKFLAGS_NORMAL= -X
+KERN_LDSCRIPT?= kern.ldscript
+LINKFORMAT= -T ${LM32}/conf/${KERN_LDSCRIPT}
+
+##
+## (7) misc settings
+##
+
+.if !make(obj) && !make(clean) && !make(cleandir)
+.BEGIN:
+ @rm -f lm32 && \
+ ln -s $S/arch/lm32/include lm32
+.endif
+
+##
+## (8) config(8) generated machinery
+##
+%INCLUDES
+
+%OBJS
+
+%CFILES
+
+%SFILES
+
+%LOAD
+
+%RULES
+
+##
+## (9) port independent kernel machinery
+##
+.include "$S/conf/Makefile.kern.inc"
+
+##
+## (10) Appending make options.
+##
+%MAKEOPTIONSAPPEND
9 sys/arch/lm32/conf/files.lm32
View
@@ -0,0 +1,9 @@
+include "arch/lm32/conf/majors.lm32"
+
+maxpartitions 8
+
+define mainbus {}
+device mainbus
+attach mainbus at root
+
+file arch/lm32/mainbus.c mainbus
1  sys/arch/lm32/conf/majors.lm32
View
@@ -0,0 +1 @@
+device-major mem char 2
2  sys/arch/lm32/include/Makefile.inc
View
@@ -0,0 +1,2 @@
+
+CFLAGS += -mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled
62 sys/arch/lm32/include/ansi.h
View
@@ -0,0 +1,62 @@
+/* $NetBSD: ansi.h,v 1.25 2011/07/17 20:54:41 joerg Exp $ */
+
+/*-
+ * Copyright (c) 1990, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)ansi.h 8.2 (Berkeley) 1/4/94
+ */
+
+#ifndef _LM32_ANSI_H_
+#define _LM32_ANSI_H_
+
+#include <sys/cdefs.h>
+
+#include <machine/int_types.h>
+
+/*
+ * Types which are fundamental to the implementation and may appear in
+ * more than one standard header are defined here. Standard headers
+ * then use:
+ * #ifdef _BSD_SIZE_T_
+ * typedef _BSD_SIZE_T_ size_t;
+ * #undef _BSD_SIZE_T_
+ * #endif
+ */
+#define _BSD_CLOCK_T_ unsigned long /* clock() */
+#define _BSD_PTRDIFF_T_ int /* ptr1 - ptr2 */
+#define _BSD_SIZE_T_ unsigned int /* sizeof() */
+#define _BSD_SSIZE_T_ int /* byte count or error */
+#define _BSD_TIME_T_ __int64_t /* time() */
+#define _BSD_CLOCKID_T_ int /* clockid_t */
+#define _BSD_TIMER_T_ int /* timer_t */
+#define _BSD_SUSECONDS_T_ int /* suseconds_t */
+#define _BSD_USECONDS_T_ unsigned int /* useconds_t */
+#define _BSD_WCHAR_T_ int /* wchar_t */
+#define _BSD_WINT_T_ int /* wint_t */
+
+#endif /* _LM32_ANSI_H_ */
245 sys/arch/lm32/include/asm.h
View
@@ -0,0 +1,245 @@
+/* $NetBSD: asm.h,v 1.27 2010/12/20 21:11:25 joerg Exp $ */
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * William Jolitz.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)asm.h 5.5 (Berkeley) 5/7/91
+ */
+
+#ifndef _LM32_ASM_H_
+#define _LM32_ASM_H_
+
+/*
+ * The old NetBSD ELF toolchain used underscores. The new
+ * NetBSD ELF toolchain does not. The C pre-processor
+ * defines __NO_LEADING_UNDERSCORES__ for the new ELF toolchain.
+ */
+
+#if defined(__ELF__) && defined(__NO_LEADING_UNDERSCORES__)
+# define _C_LABEL(x) x
+#else
+#ifdef __STDC__
+# define _C_LABEL(x) _ ## x
+#else
+# define _C_LABEL(x) _/**/x
+#endif
+#endif
+#define _ASM_LABEL(x) x
+
+/* let kernels and others override entrypoint alignment */
+#ifndef _ALIGN_TEXT
+# define _ALIGN_TEXT .align 2
+#endif
+
+#ifdef __ELF__
+#define _ENTRY(x) \
+ .text ;\
+ _ALIGN_TEXT ;\
+ .globl x ;\
+ .type x,@function ;\
+ x:
+#else /* !__ELF__ */
+#define _ENTRY(x) \
+ .text ;\
+ _ALIGN_TEXT ;\
+ .globl x ;\
+ x:
+#endif /* !__ELF__ */
+
+#ifdef GPROF
+#define _PROF_PROLOGUE \
+;FIXME: to be replaced by lm32 asm code ; \
+; mov.l 1f,r1 ; \
+; mova 2f,r0 ; \
+; jmp @r1 ; \
+; nop ; \
+; .align 2 ; \
+;1: .long __mcount ; \
+;2:
+#else /* !GPROF */
+#define _PROF_PROLOGUE
+#endif /* !GPROF */
+
+#define ENTRY(y) _ENTRY(_C_LABEL(y)) _PROF_PROLOGUE
+#define NENTRY(y) _ENTRY(_C_LABEL(y))
+#define ASENTRY(y) _ENTRY(_ASM_LABEL(y)) _PROF_PROLOGUE
+
+#define SET_ENTRY_SIZE(y) \
+ .size _C_LABEL(y), . - _C_LABEL(y)
+
+#define SET_ASENTRY_SIZE(y) \
+ .size _ASM_LABEL(y), . - _ASM_LABEL(y)
+
+#ifdef __ELF__
+#define ALTENTRY(name) \
+ .globl _C_LABEL(name) ;\
+ .type _C_LABEL(name),@function ;\
+ _C_LABEL(name):
+#else
+#define ALTENTRY(name) \
+ .globl _C_LABEL(name) ;\
+ _C_LABEL(name):
+#endif
+
+
+/*
+ * Hide the gory details of PIC calls vs. normal calls. Use as in the
+ * following example:
+ *
+ * sts.l pr, @-sp
+ * PIC_PROLOGUE(.L_got, r0) ! saves old r12 on stack
+ * ...
+ * mov.l .L_function_1, r0
+ * 1: CALL r0 ! each call site needs a label
+ * nop
+ * ...
+ * mov.l .L_function_2, r0
+ * 2: CALL r0
+ * nop
+ * ...
+ * PIC_EPILOGUE ! restores r12 from stack
+ * lds.l @sp+, pr ! so call in right order
+ * rts
+ * nop
+ *
+ * .align 2
+ * .L_got:
+ * PIC_GOT_DATUM
+ * .L_function_1: ! if you call the same function twice
+ * CALL_DATUM(function, 1b) ! provide call datum for each call
+ * .L_function_2:
+ * CALL_DATUM(function, 2b)
+ */
+
+#ifdef PIC
+
+#define PIC_PLT(x) x@PLT
+#define PIC_GOT(x) x@GOT
+#define PIC_GOTOFF(x) x@GOTOFF
+
+#define PIC_PROLOGUE(got) \
+;FIXME: This needs to be replaced by lm32 asm \
+; mov.l r12, @-sp; \
+; PIC_PROLOGUE_NOSAVE(got)
+
+/*
+ * Functions that do non local jumps don't need to preserve r12,
+ * so we can shave off two instructions to save/restore it.
+ */
+#define PIC_PROLOGUE_NOSAVE(got) \
+;FIXME: This needs to be replaced by lm32 asm \
+; mov.l got, r12; \
+; mova got, r0; \
+; add r0, r12
+
+#define PIC_EPILOGUE \
+;FIXME: This needs to be replaced by lm32 asm \
+; mov.l @sp+, r12
+
+#define PIC_EPILOGUE_SLOT \
+ PIC_EPILOGUE
+
+#define PIC_GOT_DATUM \
+;FIXME: This needs to be replaced by lm32 asm \
+; .long _GLOBAL_OFFSET_TABLE_
+
+#define CALL_DATUM(function, lpcs) \
+;FIXME: This needs to be replaced by lm32 asm \
+; .long PIC_PLT(function) - ((lpcs) + 4 - (.))
+
+/*
+ * This will result in text relocations in the shared library,
+ * unless the function is local or has hidden or protected visibility.
+ * Does not require PIC prologue.
+ */
+#define CALL_DATUM_LOCAL(function, lpcs) \
+;FIXME: This needs to be replaced by lm32 asm \
+; .long function - ((lpcs) + 4)
+
+#else /* !PIC */
+
+#define PIC_PROLOGUE(label)
+#define PIC_PROLOGUE_NOSAVE(label)
+#define PIC_EPILOGUE
+#define PIC_EPILOGUE_SLOT nop
+#define PIC_GOT_DATUM
+
+#define CALL_DATUM(function, lpcs) \
+;FIXME: This needs to be replaced by lm32 asm \
+; .long function
+
+#define CALL_DATUM_LOCAL(function, lpcs) \
+;FIXME: This needs to be replaced by lm32 asm \
+; .long function
+
+#endif /* !PIC */
+
+
+#define ASMSTR .asciz
+
+#ifdef __ELF__
+#define RCSID(x) .pushsection ".ident"; .asciz x; .popsection
+#else
+#define RCSID(x) .text; .asciz x
+#endif
+
+#ifdef NO_KERNEL_RCSIDS
+#define __KERNEL_RCSID(_n, _s) /* nothing */
+#else
+#define __KERNEL_RCSID(_n, _s) RCSID(_s)
+#endif
+
+#ifdef __ELF__
+#define WEAK_ALIAS(alias,sym) \
+ .weak _C_LABEL(alias); \
+ _C_LABEL(alias) = _C_LABEL(sym)
+#endif
+
+/*
+ * STRONG_ALIAS: create a strong alias.
+ */
+#define STRONG_ALIAS(alias,sym) \
+ .globl _C_LABEL(alias); \
+ _C_LABEL(alias) = _C_LABEL(sym)
+
+#ifdef __STDC__
+#define WARN_REFERENCES(sym,msg) \
+ .pushsection .gnu.warning. ## sym; \
+ .ascii msg; \
+ .popsection
+#else
+#define WARN_REFERENCES(sym,msg) \
+ .pushsection .gnu.warning./**/sym; \
+ .ascii msg; \
+ .popsection
+#endif /* __STDC__ */
+
+#endif /* !_LM32_ASM_H_ */
8 sys/arch/lm32/include/bswap.h
View
@@ -0,0 +1,8 @@
+/* $NetBSD: bswap.h,v 1.6 2006/01/31 07:51:41 dsl Exp $ */
+
+#ifndef _LM32_BSWAP_H_
+#define _LM32_BSWAP_H_
+
+#include <sys/bswap.h>
+
+#endif /* _LM32_BSWAP_H_ */
12 sys/arch/lm32/include/cdefs.h
View
@@ -0,0 +1,12 @@
+/* $NetBSD: cdefs.h,v 1.9 2012/01/20 14:08:06 joerg Exp $ */
+
+#ifndef _LM32_CDEFS_H_
+#define _LM32_CDEFS_H_
+
+#if defined(_STANDALONE)
+#define __compactcall __attribute__((__regparm__(3)))
+#endif
+
+#define __ALIGNBYTES (sizeof(int) - 1)
+
+#endif /* !_LM32_CDEFS_H_ */
244 sys/arch/lm32/include/cpu.h
View
@@ -0,0 +1,244 @@
+/* $NetBSD: cpu.h,v 1.53 2012/10/27 17:18:13 chs Exp $ */
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * William Jolitz.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)cpu.h 5.4 (Berkeley) 5/9/91
+ */
+
+#ifndef _LM32_CPU_H_
+#define _LM32_CPU_H_
+
+#if defined(_KERNEL) || defined(_STANDALONE)
+#include <sys/types.h>
+#else
+#include <stdbool.h>
+#endif /* _KERNEL || _STANDALONE */
+
+#if defined(_KERNEL) || defined(_KMEMUSER)
+
+/*
+ * Definitions unique to lm32 cpu support.
+ */
+#include <machine/frame.h>
+#include <machine/pte.h>
+
+#include <sys/cpu_data.h>
+#include <sys/evcnt.h>
+#include <sys/device_if.h> /* for device_t */
+
+
+struct intrsource;
+struct pmap;
+
+/*
+ * a bunch of this belongs in cpuvar.h; move it later..
+ */
+
+struct cpu_info {
+ struct cpu_data ci_data; /* MI per-cpu data */
+ cpuid_t ci_cpuid;
+ device_t ci_dev; /* pointer to our device */
+ int ci_current_ipl;
+ struct cpu_info *ci_self; /* self-pointer */
+ void *ci_tlog_base; /* Trap log base */
+ int32_t ci_tlog_offset; /* Trap log current offset */
+
+ /*
+ * Private members.
+ */
+ struct evcnt ci_tlb_evcnt; /* tlb shootdown counter */
+ struct pmap *ci_pmap; /* current pmap */
+ int ci_want_pmapload; /* pmap_load() is needed */
+ int ci_curldt; /* current LDT descriptor */
+ int ci_nintrhand; /* number of H/W interrupt handlers */
+ uint64_t ci_scratch;
+ uintptr_t ci_pmap_data[128 / sizeof(uintptr_t)];
+
+ volatile int ci_mtx_count; /* Negative count of spin mutexes */
+ volatile int ci_mtx_oldspl; /* Old SPL at this ci_idepth */
+
+ uint32_t ci_flags; /* flags; see below */
+
+ uint32_t ci_signature; /* LM32 cpuid type */
+ uint32_t ci_vendor[4]; /* vendor string */
+ uint32_t ci_cpu_serial[3]; /* PIII serial number */
+
+ const struct cpu_functions *ci_func; /* start/stop functions */
+ struct trapframe *ci_ddb_regs;
+
+ u_int ci_cflush_lsize; /* CFLUSH insn line size */
+ char *ci_doubleflt_stack;
+ char *ci_ddbipi_stack;
+ volatile int ci_want_resched;
+};
+
+
+#endif /* _KERNEL || __KMEMUSER */
+
+#ifdef _KERNEL
+/*
+ * We statically allocate the CPU info for the primary CPU (or,
+ * the only CPU on uniprocessors), and the primary CPU is the
+ * first CPU on the CPU info list.
+ */
+extern struct cpu_info cpu_info_primary;
+extern struct cpu_info *cpu_info_list;
+
+extern struct cpu_info cpu_info_store;
+#define curcpu() (&cpu_info_store)
+
+/*
+ * definitions of cpu-dependent requirements
+ * referenced in generic code
+ */
+#define cpu_number() 0
+
+#define cpu_proc_fork(p1, p2) /* nothing */
+
+#define CPU_STARTUP(_ci, _target) ((_ci)->ci_func->start(_ci, _target))
+#define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci))
+#define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci))
+
+#define aston(l, why) ((l)->l_md.md_astpending |= (why))
+
+void cpu_boot_secondary_processors(void);
+void cpu_init_idle_lwps(void);
+void cpu_init_msrs(struct cpu_info *, bool);
+void cpu_load_pmap(struct pmap *, struct pmap *);
+void cpu_broadcast_halt(void);
+void cpu_kick(struct cpu_info *);
+
+#define curpcb ((struct pcb *)lwp_getpcb(curlwp))
+
+/*
+ * Arguments to hardclock, softclock and statclock
+ * encapsulate the previous machine state in an opaque
+ * clockframe; for now, use generic intrframe.
+ */
+struct clockframe {
+ struct registers cf_if;
+ int tf_pc;
+};
+
+#define CLKF_USERMODE(framep) (0)
+#define CLKF_PC(framep) ((framep)->tf_pc)
+#define CLKF_INTR(framep) (0)
+
+/*
+ * Give a profiling tick to the current process when the user profiling
+ * buffer pages are invalid. On the i386, request an ast to send us
+ * through trap(), marking the proc as needing a profiling tick.
+ */
+extern void cpu_need_proftick(struct lwp *l);
+
+/*
+ * Notify the LWP l that it has a signal pending, process as soon as
+ * possible.
+ */
+extern void cpu_signotify(struct lwp *);
+
+/*
+ * We need a machine-independent name for this.
+ */
+extern void (*delay_func)(unsigned int);
+struct timeval;
+
+#define DELAY(x) (*delay_func)(x)
+#define delay(x) (*delay_func)(x)
+
+extern int cputype;
+extern int cpuid_level;
+extern int cpu_class;
+
+extern void (*lm32_cpu_idle)(void);
+#define cpu_idle() (*lm32_cpu_idle)()
+
+/* machdep.c */
+void dumpconf(void);
+void cpu_reset(void);
+
+/* identcpu.c */
+void cpu_probe(struct cpu_info *);
+void cpu_identify(struct cpu_info *);
+
+/* locore.s */
+struct region_descriptor;
+void lgdt(struct region_descriptor *);
+
+struct pcb;
+void savectx(struct pcb *);
+void lwp_trampoline(void);
+
+/* cpu.c */
+
+void cpu_probe_features(struct cpu_info *);
+
+/* npx.c */
+void npxsave_lwp(struct lwp *, bool);
+void npxsave_cpu(bool);
+
+/* vm_machdep.c */
+paddr_t kvtop(void *);
+
+#endif /* _KERNEL */
+
+#if defined(_KERNEL) || defined(_KMEMUSER)
+#include <machine/psl.h> /* Must be after struct cpu_info declaration */
+#endif /* _KERNEL || __KMEMUSER */
+
+/*
+ * Structure for CPU_DISKINFO sysctl call.
+ * XXX this should be somewhere else.
+ */
+#define MAX_BIOSDISKS 16
+
+struct disklist {
+ int dl_nbiosdisks; /* number of bios disks */
+ struct biosdisk_info {
+ int bi_dev; /* BIOS device # (0x80 ..) */
+ int bi_cyl; /* cylinders on disk */
+ int bi_head; /* heads per track */
+ int bi_sec; /* sectors per track */
+ uint64_t bi_lbasecs; /* total sec. (iff ext13) */
+#define BIFLAG_INVALID 0x01
+#define BIFLAG_EXTINT13 0x02
+ int bi_flags;
+ } dl_biosdisks[MAX_BIOSDISKS];
+
+ int dl_nnativedisks; /* number of native disks */
+ struct nativedisk_info {
+ char ni_devname[16]; /* native device name */
+ int ni_nmatches; /* # of matches w/ BIOS */
+ int ni_biosmatches[MAX_BIOSDISKS]; /* indices in dl_biosdisks */
+ } dl_nativedisks[1]; /* actually longer */
+};
+#endif /* !_LM32_CPU_H_ */
45 sys/arch/lm32/include/cpu_counter.h
View
@@ -0,0 +1,45 @@
+/* $NetBSD: cpu_counter.h,v 1.5 2011/02/02 12:26:42 bouyer Exp $ */
+
+/*-
+ * Copyright (c) 2000, 2008 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Bill Sommerfeld.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LM32_CPU_COUNTER_H_
+#define _LM32_CPU_COUNTER_H_
+
+#ifdef _KERNEL
+
+uint64_t cpu_counter(void);
+uint64_t cpu_counter_serializing(void);
+uint32_t cpu_counter32(void);
+uint64_t cpu_frequency(struct cpu_info *);
+int cpu_hascounter(void);
+
+#endif /* _KERNEL */
+
+#endif /* !_LM32_CPU_COUNTER_H_ */
3  sys/arch/lm32/include/endian_machdep.h
View
@@ -0,0 +1,3 @@
+/* $NetBSD: endian_machdep.h,v 1.1 2000/03/17 00:09:24 mycroft Exp $ */
+
+#define _BYTE_ORDER _BIG_ENDIAN
93 sys/arch/lm32/include/frame.h
View
@@ -0,0 +1,93 @@
+/* $NetBSD: frame.h,v 1.35 2012/02/19 21:06:11 rmind Exp $ */
+
+/*-
+ * Copyright (c) 1998 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Charles M. Hannum.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*-
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * William Jolitz.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)frame.h 5.2 (Berkeley) 1/18/91
+ */
+
+#ifndef _LM32_FRAME_H_
+#define _LM32_FRAME_H_
+
+#if defined(_KERNEL)
+
+#include <lm32/signal.h>
+#include <sys/ucontext.h>
+#include <sys/siginfo.h>
+/*
+ * New-style signal frame
+ */
+struct sigframe_siginfo {
+ int sf_ra; /* return address for handler */
+ int sf_signum; /* "signum" argument for handler */
+ siginfo_t *sf_sip; /* "sip" argument for handler */
+ ucontext_t *sf_ucp; /* "ucp" argument for handler */
+ siginfo_t sf_si; /* actual saved siginfo */
+ ucontext_t sf_uc; /* actual saved ucontext */
+};
+
+
+
+void *getframe(struct lwp *, int, int *);
+void buildcontext(struct lwp *, int, void *, void *);
+void sendsig_sigcontext(const ksiginfo_t *, const sigset_t *);
+
+#endif /* _KERNEL */
+#endif /* _LM32_FRAME_H_ */
56 sys/arch/lm32/include/int_const.h
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@@ -0,0 +1,56 @@
+/* $NetBSD: int_const.h,v 1.3 2010/05/29 17:33:57 tnozaki Exp $ */
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Klaus Klein.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LM32_INT_CONST_H_
+#define _LM32_INT_CONST_H_
+
+/*
+ * 7.18.4 Macros for integer constants
+ */
+
+/* 7.18.4.1 Macros for minimum-width integer constants */
+
+#define INT8_C(c) c
+#define INT16_C(c) c
+#define INT32_C(c) c
+#define INT64_C(c) c ## LL
+
+#define UINT8_C(c) c
+#define UINT16_C(c) c
+#define UINT32_C(c) c ## U
+#define UINT64_C(c) c ## ULL
+
+/* 7.18.4.2 Macros for greatest-width integer constants */
+
+#define INTMAX_C(c) c ## LL
+#define UINTMAX_C(c) c ## ULL
+
+#endif /* !_LM32_INT_CONST_H_ */
212 sys/arch/lm32/include/int_fmtio.h
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@@ -0,0 +1,212 @@
+/* $NetBSD: int_fmtio.h,v 1.7 2008/04/28 20:23:24 martin Exp $ */
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Klaus Klein.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LM32_INT_FMTIO_H_
+#define _LM32_INT_FMTIO_H_
+
+/*
+ * 7.8.1 Macros for format specifiers
+ */
+
+/* fprintf macros for signed integers */
+
+#define PRId8 "d" /* int8_t */
+#define PRId16 "d" /* int16_t */
+#define PRId32 "d" /* int32_t */
+#define PRId64 "lld" /* int64_t */
+#define PRIdLEAST8 "d" /* int_least8_t */
+#define PRIdLEAST16 "d" /* int_least16_t */
+#define PRIdLEAST32 "d" /* int_least32_t */
+#define PRIdLEAST64 "lld" /* int_least64_t */
+#define PRIdFAST8 "d" /* int_fast8_t */
+#define PRIdFAST16 "d" /* int_fast16_t */
+#define PRIdFAST32 "d" /* int_fast32_t */
+#define PRIdFAST64 "lld" /* int_fast64_t */
+#define PRIdMAX "lld" /* intmax_t */
+#define PRIdPTR "d" /* intptr_t */
+
+#define PRIi8 "i" /* int8_t */
+#define PRIi16 "i" /* int16_t */
+#define PRIi32 "i" /* int32_t */
+#define PRIi64 "lli" /* int64_t */
+#define PRIiLEAST8 "i" /* int_least8_t */
+#define PRIiLEAST16 "i" /* int_least16_t */
+#define PRIiLEAST32 "i" /* int_least32_t */
+#define PRIiLEAST64 "lli" /* int_least64_t */
+#define PRIiFAST8 "i" /* int_fast8_t */
+#define PRIiFAST16 "i" /* int_fast16_t */
+#define PRIiFAST32 "i" /* int_fast32_t */
+#define PRIiFAST64 "lli" /* int_fast64_t */
+#define PRIiMAX "lli" /* intmax_t */
+#define PRIiPTR "i" /* intptr_t */
+
+/* fprintf macros for unsigned integers */
+
+#define PRIo8 "o" /* uint8_t */
+#define PRIo16 "o" /* uint16_t */
+#define PRIo32 "o" /* uint32_t */
+#define PRIo64 "llo" /* uint64_t */
+#define PRIoLEAST8 "o" /* uint_least8_t */
+#define PRIoLEAST16 "o" /* uint_least16_t */
+#define PRIoLEAST32 "o" /* uint_least32_t */
+#define PRIoLEAST64 "llo" /* uint_least64_t */
+#define PRIoFAST8 "o" /* uint_fast8_t */
+#define PRIoFAST16 "o" /* uint_fast16_t */
+#define PRIoFAST32 "o" /* uint_fast32_t */
+#define PRIoFAST64 "llo" /* uint_fast64_t */
+#define PRIoMAX "llo" /* uintmax_t */
+#define PRIoPTR "o" /* uintptr_t */
+
+#define PRIu8 "u" /* uint8_t */
+#define PRIu16 "u" /* uint16_t */
+#define PRIu32 "u" /* uint32_t */
+#define PRIu64 "llu" /* uint64_t */
+#define PRIuLEAST8 "u" /* uint_least8_t */
+#define PRIuLEAST16 "u" /* uint_least16_t */
+#define PRIuLEAST32 "u" /* uint_least32_t */
+#define PRIuLEAST64 "llu" /* uint_least64_t */
+#define PRIuFAST8 "u" /* uint_fast8_t */
+#define PRIuFAST16 "u" /* uint_fast16_t */
+#define PRIuFAST32 "u" /* uint_fast32_t */
+#define PRIuFAST64 "llu" /* uint_fast64_t */
+#define PRIuMAX "llu" /* uintmax_t */
+#define PRIuPTR "u" /* uintptr_t */
+
+#define PRIx8 "x" /* uint8_t */
+#define PRIx16 "x" /* uint16_t */
+#define PRIx32 "x" /* uint32_t */
+#define PRIx64 "llx" /* uint64_t */
+#define PRIxLEAST8 "x" /* uint_least8_t */
+#define PRIxLEAST16 "x" /* uint_least16_t */
+#define PRIxLEAST32 "x" /* uint_least32_t */
+#define PRIxLEAST64 "llx" /* uint_least64_t */
+#define PRIxFAST8 "x" /* uint_fast8_t */
+#define PRIxFAST16 "x" /* uint_fast16_t */
+#define PRIxFAST32 "x" /* uint_fast32_t */
+#define PRIxFAST64 "llx" /* uint_fast64_t */
+#define PRIxMAX "llx" /* uintmax_t */
+#define PRIxPTR "x" /* uintptr_t */
+
+#define PRIX8 "X" /* uint8_t */
+#define PRIX16 "X" /* uint16_t */
+#define PRIX32 "X" /* uint32_t */
+#define PRIX64 "llX" /* uint64_t */
+#define PRIXLEAST8 "X" /* uint_least8_t */
+#define PRIXLEAST16 "X" /* uint_least16_t */
+#define PRIXLEAST32 "X" /* uint_least32_t */
+#define PRIXLEAST64 "llX" /* uint_least64_t */
+#define PRIXFAST8 "X" /* uint_fast8_t */
+#define PRIXFAST16 "X" /* uint_fast16_t */
+#define PRIXFAST32 "X" /* uint_fast32_t */
+#define PRIXFAST64 "llX" /* uint_fast64_t */
+#define PRIXMAX "llX" /* uintmax_t */
+#define PRIXPTR "X" /* uintptr_t */
+
+/* fscanf macros for signed integers */
+
+#define SCNd8 "hhd" /* int8_t */
+#define SCNd16 "hd" /* int16_t */
+#define SCNd32 "d" /* int32_t */
+#define SCNd64 "lld" /* int64_t */
+#define SCNdLEAST8 "hhd" /* int_least8_t */
+#define SCNdLEAST16 "hd" /* int_least16_t */
+#define SCNdLEAST32 "d" /* int_least32_t */
+#define SCNdLEAST64 "lld" /* int_least64_t */
+#define SCNdFAST8 "hhd" /* int_fast8_t */
+#define SCNdFAST16 "d" /* int_fast16_t */
+#define SCNdFAST32 "d" /* int_fast32_t */
+#define SCNdFAST64 "lld" /* int_fast64_t */
+#define SCNdMAX "lld" /* intmax_t */
+#define SCNdPTR "d" /* intptr_t */
+
+#define SCNi8 "hhi" /* int8_t */
+#define SCNi16 "hi" /* int16_t */
+#define SCNi32 "i" /* int32_t */
+#define SCNi64 "lli" /* int64_t */
+#define SCNiLEAST8 "hhi" /* int_least8_t */
+#define SCNiLEAST16 "hi" /* int_least16_t */
+#define SCNiLEAST32 "i" /* int_least32_t */
+#define SCNiLEAST64 "lli" /* int_least64_t */
+#define SCNiFAST8 "hhi" /* int_fast8_t */
+#define SCNiFAST16 "i" /* int_fast16_t */
+#define SCNiFAST32 "i" /* int_fast32_t */
+#define SCNiFAST64 "lli" /* int_fast64_t */
+#define SCNiMAX "lli" /* intmax_t */
+#define SCNiPTR "i" /* intptr_t */
+
+/* fscanf macros for unsigned integers */
+
+#define SCNo8 "hho" /* uint8_t */
+#define SCNo16 "ho" /* uint16_t */
+#define SCNo32 "o" /* uint32_t */
+#define SCNo64 "llo" /* uint64_t */
+#define SCNoLEAST8 "hho" /* uint_least8_t */
+#define SCNoLEAST16 "ho" /* uint_least16_t */
+#define SCNoLEAST32 "o" /* uint_least32_t */
+#define SCNoLEAST64 "llo" /* uint_least64_t */
+#define SCNoFAST8 "hho" /* uint_fast8_t */
+#define SCNoFAST16 "o" /* uint_fast16_t */
+#define SCNoFAST32 "o" /* uint_fast32_t */
+#define SCNoFAST64 "llo" /* uint_fast64_t */
+#define SCNoMAX "llo" /* uintmax_t */
+#define SCNoPTR "o" /* uintptr_t */
+
+#define SCNu8 "hhu" /* uint8_t */
+#define SCNu16 "hu" /* uint16_t */
+#define SCNu32 "u" /* uint32_t */
+#define SCNu64 "llu" /* uint64_t */
+#define SCNuLEAST8 "hhu" /* uint_least8_t */
+#define SCNuLEAST16 "hu" /* uint_least16_t */
+#define SCNuLEAST32 "u" /* uint_least32_t */
+#define SCNuLEAST64 "llu" /* uint_least64_t */
+#define SCNuFAST8 "hhu" /* uint_fast8_t */
+#define SCNuFAST16 "u" /* uint_fast16_t */
+#define SCNuFAST32 "u" /* uint_fast32_t */
+#define SCNuFAST64 "llu" /* uint_fast64_t */
+#define SCNuMAX "llu" /* uintmax_t */
+#define SCNuPTR "u" /* uintptr_t */
+
+#define SCNx8 "hhx" /* uint8_t */
+#define SCNx16 "hx" /* uint16_t */
+#define SCNx32 "x" /* uint32_t */
+#define SCNx64 "llx" /* uint64_t */
+#define SCNxLEAST8 "hhx" /* uint_least8_t */
+#define SCNxLEAST16 "hx" /* uint_least16_t */
+#define SCNxLEAST32 "x" /* uint_least32_t */
+#define SCNxLEAST64 "llx" /* uint_least64_t */
+#define SCNxFAST8 "hhx" /* uint_fast8_t */
+#define SCNxFAST16 "x" /* uint_fast16_t */
+#define SCNxFAST32 "x" /* uint_fast32_t */
+#define SCNxFAST64 "llx" /* uint_fast64_t */
+#define SCNxMAX "llx" /* uintmax_t */
+#define SCNxPTR "x" /* uintptr_t */
+
+#endif /* !_LM32_INT_FMTIO_H_ */
127 sys/arch/lm32/include/int_limits.h
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@@ -0,0 +1,127 @@
+/* $NetBSD: int_limits.h,v 1.8 2008/04/28 20:23:32 martin Exp $ */
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Klaus Klein.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LM32_INT_LIMITS_H_
+#define _LM32_INT_LIMITS_H_
+
+/*
+ * 7.18.2 Limits of specified-width integer types
+ */
+
+/* 7.18.2.1 Limits of exact-width integer types */
+
+/* minimum values of exact-width signed integer types */
+#define INT8_MIN (-0x7f-1) /* int8_t */
+#define INT16_MIN (-0x7fff-1) /* int16_t */
+#define INT32_MIN (-0x7fffffff-1) /* int32_t */
+#define INT64_MIN (-0x7fffffffffffffffLL-1) /* int64_t */
+
+/* maximum values of exact-width signed integer types */
+#define INT8_MAX 0x7f /* int8_t */
+#define INT16_MAX 0x7fff /* int16_t */
+#define INT32_MAX 0x7fffffff /* int32_t */
+#define INT64_MAX 0x7fffffffffffffffLL /* int64_t */
+
+/* maximum values of exact-width unsigned integer types */
+#define UINT8_MAX 0xff /* uint8_t */
+#define UINT16_MAX 0xffff /* uint16_t */
+#define UINT32_MAX 0xffffffffU /* uint32_t */
+#define UINT64_MAX 0xffffffffffffffffULL /* uint64_t */
+
+/* 7.18.2.2 Limits of minimum-width integer types */
+
+/* minimum values of minimum-width signed integer types */
+#define INT_LEAST8_MIN (-0x7f-1) /* int_least8_t */
+#define INT_LEAST16_MIN (-0x7fff-1) /* int_least16_t */
+#define INT_LEAST32_MIN (-0x7fffffff-1) /* int_least32_t */
+#define INT_LEAST64_MIN (-0x7fffffffffffffffLL-1) /* int_least64_t */
+
+/* maximum values of minimum-width signed integer types */
+#define INT_LEAST8_MAX 0x7f /* int_least8_t */
+#define INT_LEAST16_MAX 0x7fff /* int_least16_t */
+#define INT_LEAST32_MAX 0x7fffffff /* int_least32_t */
+#define INT_LEAST64_MAX 0x7fffffffffffffffLL /* int_least64_t */
+
+/* maximum values of minimum-width unsigned integer types */
+#define UINT_LEAST8_MAX 0xff /* uint_least8_t */
+#define UINT_LEAST16_MAX 0xffff /* uint_least16_t */
+#define UINT_LEAST32_MAX 0xffffffffU /* uint_least32_t */
+#define UINT_LEAST64_MAX 0xffffffffffffffffULL /* uint_least64_t */
+
+/* 7.18.2.3 Limits of fastest minimum-width integer types */
+
+/* minimum values of fastest minimum-width signed integer types */
+#define INT_FAST8_MIN (-0x7fffffff-1) /* int_fast8_t */
+#define INT_FAST16_MIN (-0x7fffffff-1) /* int_fast16_t */
+#define INT_FAST32_MIN (-0x7fffffff-1) /* int_fast32_t */
+#define INT_FAST64_MIN (-0x7fffffffffffffffLL-1) /* int_fast64_t */
+
+/* maximum values of fastest minimum-width signed integer types */
+#define INT_FAST8_MAX 0x7fffffff /* int_fast8_t */
+#define INT_FAST16_MAX 0x7fffffff /* int_fast16_t */
+#define INT_FAST32_MAX 0x7fffffff /* int_fast32_t */
+#define INT_FAST64_MAX 0x7fffffffffffffffLL /* int_fast64_t */
+
+/* maximum values of fastest minimum-width unsigned integer types */
+#define UINT_FAST8_MAX 0xffffffffU /* uint_fast8_t */
+#define UINT_FAST16_MAX 0xffffffffU /* uint_fast16_t */
+#define UINT_FAST32_MAX 0xffffffffU /* uint_fast32_t */
+#define UINT_FAST64_MAX 0xffffffffffffffffULL /* uint_fast64_t */
+
+/* 7.18.2.4 Limits of integer types capable of holding object pointers */
+
+#define INTPTR_MIN (-0x7fffffff-1) /* intptr_t */
+#define INTPTR_MAX 0x7fffffff /* intptr_t */
+#define UINTPTR_MAX 0xffffffffU /* uintptr_t */
+
+/* 7.18.2.5 Limits of greatest-width integer types */
+
+#define INTMAX_MIN (-0x7fffffffffffffffLL-1) /* intmax_t */
+#define INTMAX_MAX 0x7fffffffffffffffLL /* intmax_t */
+#define UINTMAX_MAX 0xffffffffffffffffULL /* uintmax_t */
+
+
+/*
+ * 7.18.3 Limits of other integer types
+ */
+
+/* limits of ptrdiff_t */
+#define PTRDIFF_MIN (-0x7fffffff-1) /* ptrdiff_t */
+#define PTRDIFF_MAX 0x7fffffff /* ptrdiff_t */
+
+/* limits of sig_atomic_t */
+#define SIG_ATOMIC_MIN (-0x7fffffff-1) /* sig_atomic_t */
+#define SIG_ATOMIC_MAX 0x7fffffff /* sig_atomic_t */
+
+/* limit of size_t */
+#define SIZE_MAX 0xffffffffU /* size_t */
+
+#endif /* !_LM32_INT_LIMITS_H_ */
95 sys/arch/lm32/include/int_mwgwtypes.h
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@@ -0,0 +1,95 @@
+/* $NetBSD: int_mwgwtypes.h,v 1.5 2008/04/28 20:23:32 martin Exp $ */
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Klaus Klein.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LM32_INT_MWGWTYPES_H_
+#define _LM32_INT_MWGWTYPES_H_
+
+/*
+ * 7.18.1 Integer types
+ */
+
+/* 7.18.1.2 Minimum-width integer types */
+
+typedef signed char int_least8_t;
+typedef unsigned char uint_least8_t;
+typedef short int int_least16_t;
+typedef unsigned short int uint_least16_t;
+typedef int int_least32_t;
+typedef unsigned int uint_least32_t;
+#ifdef __COMPILER_INT64__
+typedef __COMPILER_INT64__ int_least64_t;
+typedef __COMPILER_UINT64__ uint_least64_t;
+#elif defined(_LP64)
+typedef long int int_least64_t;
+typedef unsigned long int uint_least64_t;
+#else
+/* LONGLONG */
+typedef long long int int_least64_t;
+/* LONGLONG */
+typedef unsigned long long int uint_least64_t;
+#endif
+
+/* 7.18.1.3 Fastest minimum-width integer types */
+typedef int int_fast8_t;
+typedef unsigned int uint_fast8_t;
+typedef int int_fast16_t;
+typedef unsigned int uint_fast16_t;
+typedef int int_fast32_t;
+typedef unsigned int uint_fast32_t;
+#ifdef __COMPILER_INT64__
+typedef __COMPILER_INT64__ int_fast64_t;
+typedef __COMPILER_UINT64__ uint_fast64_t;
+#elif defined(_LP64)
+typedef long int int_fast64_t;
+typedef unsigned long int uint_fast64_t;
+#else
+/* LONGLONG */
+typedef long long int int_fast64_t;
+/* LONGLONG */
+typedef unsigned long long int uint_fast64_t;
+#endif
+
+/* 7.18.1.5 Greatest-width integer types */
+
+#ifdef __COMPILER_INT64__
+typedef __COMPILER_INT64__ intmax_t;
+typedef unsigned __COMPILER_INT64__ uintmax_t;
+#elif defined(_LP64)
+typedef long int intmax_t;