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  1. 9  TODO
  2. 2  build.sh
  3. 4  external/gpl3/binutils/dist/cpu/lm32.cpu
  4. 94  external/gpl3/binutils/dist/gas/config/tc-lm32.c
  5. 9  external/gpl3/binutils/dist/opcodes/lm32-desc.c
  6. 114  external/gpl3/gcc/dist/gcc/config/lm32/_ashlsi3.asm
  7. 110  external/gpl3/gcc/dist/gcc/config/lm32/_ashrsi3.asm
  8. 99  external/gpl3/gcc/dist/gcc/config/lm32/_divsi3.c
  9. 109  external/gpl3/gcc/dist/gcc/config/lm32/_lshrsi3.asm
  10. 71  external/gpl3/gcc/dist/gcc/config/lm32/_modsi3.c
  11. 48  external/gpl3/gcc/dist/gcc/config/lm32/_mulsi3.c
  12. 53  external/gpl3/gcc/dist/gcc/config/lm32/_udivmodsi4.c
  13. 49  external/gpl3/gcc/dist/gcc/config/lm32/_udivsi3.c
  14. 49  external/gpl3/gcc/dist/gcc/config/lm32/_umodsi3.c
  15. 13  external/gpl3/gcc/dist/gcc/config/lm32/lm32-netbsd.h
  16. 7  external/gpl3/gcc/dist/gcc/config/lm32/t-lm32
  17. 4  external/gpl3/gcc/dist/libgcc/config.host
  18. 4  share/mk/bsd.sys.mk
  19. 6  sys/arch/lm32/compile/Makefile
  20. 14  sys/arch/lm32/conf/GENERIC
  21. 86  sys/arch/lm32/conf/Makefile.lm32
  22. 9  sys/arch/lm32/conf/files.lm32
  23. 1  sys/arch/lm32/conf/majors.lm32
  24. 2  sys/arch/lm32/include/Makefile.inc
  25. 62  sys/arch/lm32/include/ansi.h
  26. 245  sys/arch/lm32/include/asm.h
  27. 8  sys/arch/lm32/include/bswap.h
  28. 12  sys/arch/lm32/include/cdefs.h
  29. 244  sys/arch/lm32/include/cpu.h
  30. 45  sys/arch/lm32/include/cpu_counter.h
  31. 3  sys/arch/lm32/include/endian_machdep.h
  32. 93  sys/arch/lm32/include/frame.h
  33. 56  sys/arch/lm32/include/int_const.h
  34. 212  sys/arch/lm32/include/int_fmtio.h
  35. 127  sys/arch/lm32/include/int_limits.h
  36. 95  sys/arch/lm32/include/int_mwgwtypes.h
  37. 68  sys/arch/lm32/include/int_types.h
  38. 23  sys/arch/lm32/include/intr.h
  39. 128  sys/arch/lm32/include/limits.h
  40. 121  sys/arch/lm32/include/lock.h
  41. 90  sys/arch/lm32/include/mcontext.h
  42. 80  sys/arch/lm32/include/mutex.h
  43. 97  sys/arch/lm32/include/param.h
  44. 49  sys/arch/lm32/include/pcb.h
  45. 20  sys/arch/lm32/include/pmap.h
  46. 60  sys/arch/lm32/include/proc.h
  47. 6  sys/arch/lm32/include/psl.h
  48. 117  sys/arch/lm32/include/pte.h
  49. 47  sys/arch/lm32/include/ptrace.h
  50. 99  sys/arch/lm32/include/reg.h
  51. 39  sys/arch/lm32/include/registers.h
  52. 50  sys/arch/lm32/include/rwlock.h
  53. 64  sys/arch/lm32/include/signal.h
  54. 53  sys/arch/lm32/include/trap.h
  55. 101  sys/arch/lm32/include/types.h
  56. 107  sys/arch/lm32/include/vmparam.h
  57. 47  sys/arch/lm32/include/wchar_limits.h
  58. 14  sys/arch/milkymist/Makefile
  59. 3  sys/arch/milkymist/compile/Makefile
  60. 14  sys/arch/milkymist/conf/GENERIC
  61. 100  sys/arch/milkymist/conf/Makefile.milkymist
  62. 2  sys/arch/milkymist/include/Makefile.inc
  63. 8  sys/arch/milkymist/include/ansi.h
  64. 3  sys/arch/milkymist/include/bswap.h
  65. 386  sys/arch/milkymist/include/bus_defs.h
  66. 385  sys/arch/milkymist/include/bus_funcs.h
  67. 8  sys/arch/milkymist/include/cdefs.h
  68. 3  sys/arch/milkymist/include/cpu.h
  69. 29  sys/arch/milkymist/include/cpu_counter.h
  70. 14  sys/arch/{lm32 → milkymist}/include/disklabel.h
  71. 8  sys/arch/milkymist/include/elf_machdep.h
  72. 3  sys/arch/milkymist/include/endian.h
  73. 3  sys/arch/milkymist/include/endian_machdep.h
  74. 8  sys/arch/milkymist/include/frame.h
  75. 3  sys/arch/milkymist/include/int_const.h
  76. 3  sys/arch/milkymist/include/int_fmtio.h
  77. 3  sys/arch/milkymist/include/int_limits.h
  78. 3  sys/arch/milkymist/include/int_mwgwtypes.h
  79. 3  sys/arch/milkymist/include/int_types.h
  80. 138  sys/arch/milkymist/include/intr.h
  81. 104  sys/arch/milkymist/include/irqhandler.h
  82. 3  sys/arch/milkymist/include/limits.h
  83. 4  sys/arch/milkymist/include/lock.h
  84. 3  sys/arch/milkymist/include/mcontext.h
  85. 3  sys/arch/milkymist/include/mutex.h
  86. 51  sys/arch/milkymist/include/param.h
  87. 3  sys/arch/milkymist/include/pcb.h
  88. 3  sys/arch/milkymist/include/pmap.h
  89. 3  sys/arch/milkymist/include/proc.h
  90. 29  sys/arch/milkymist/include/psl.h
  91. 3  sys/arch/milkymist/include/pte.h
  92. 8  sys/arch/milkymist/include/ptrace.h
  93. 8  sys/arch/milkymist/include/reg.h
  94. 3  sys/arch/milkymist/include/rwlock.h
  95. 3  sys/arch/milkymist/include/signal.h
  96. 9  sys/arch/milkymist/include/trap.h
  97. 11  sys/arch/milkymist/include/types.h
  98. 6  sys/arch/milkymist/include/vmparam.h
  99. 3  sys/arch/milkymist/include/wchar_limits.h
  100. 49  sys/arch/milkymist/milkymist/genassym.cf
  101. 158  sys/arch/milkymist/milkymist/locore.s
  102. 296  sys/arch/milkymist/milkymist/machdep.c
  103. 3  sys/lib/libkern/Makefile.libkern
  104. 3  sys/lib/libkern/arch/lm32/Makefile.inc
  105. 114  sys/lib/libkern/arch/lm32/_ashlsi3.S
  106. 110  sys/lib/libkern/arch/lm32/_ashrsi3.S
  107. 99  sys/lib/libkern/arch/lm32/_divsi3.c
  108. 109  sys/lib/libkern/arch/lm32/_lshrsi3.S
  109. 71  sys/lib/libkern/arch/lm32/_modsi3.c
  110. 53  sys/lib/libkern/arch/lm32/_udivmodsi4.c
  111. 49  sys/lib/libkern/arch/lm32/_udivsi3.c
  112. 2,163  sys/lib/libkern/arch/lm32/libgcc2.c
  113. 99  sys/lib/libkern/arch/lm32/libgcc_lm32.h
  114. 3  tools/headerlist
9  TODO
... ...
@@ -0,0 +1,9 @@
  1
+LM32 port TODO:
  2
+
  3
+- add some libkern features
  4
+- add crtstuff in libcsu
  5
+- verify frame.h
  6
+- make _spl() functions less nazi (don't mask all IRQs when it's not necessary)
  7
+- make sure it's fine to hardwire CLKF_USERMOD to 0 or 1 (this and the following one seem to be used for statistics purposes only)
  8
+- make sure it's fine to hardwire CLKF_INTR to 0 or 1
  9
+- Do I need to implement cpu_did_resched() ?
2  build.sh
@@ -650,7 +650,7 @@ MACHINE=vax		MACHINE_ARCH=vax
650 650
 MACHINE=x68k		MACHINE_ARCH=m68k
651 651
 MACHINE=zaurus		MACHINE_ARCH=arm	DEFAULT
652 652
 MACHINE=zaurus		MACHINE_ARCH=earm
653  
-MACHINE=lm32 		MACHINE_ARCH=lm32
  653
+MACHINE=milkymist	MACHINE_ARCH=lm32
654 654
 '
655 655
 
656 656
 # getarch -- find the default MACHINE_ARCH for a MACHINE,
4  external/gpl3/binutils/dist/cpu/lm32.cpu
@@ -101,9 +101,11 @@
101 101
                (EBA 7)
102 102
                (DC 8)
103 103
                (DEBA 9)
  104
+               (CFG2 10)
104 105
                (JTX 14) (JRX 15)          
105 106
                (BP0 16) (BP1 17) (BP2 18) (BP3 19)
106  
-               (WP0 24) (WP1 25) (WP2 26) (WP3 27)     
  107
+               (WP0 24) (WP1 25) (WP2 26) (WP3 27)
  108
+	       (PSW 29) (TLBVADDR 30) (TLBPADDR 31) (TLBBADVADDR 31)
107 109
               )
108 110
   )
109 111
   () ()
94  external/gpl3/binutils/dist/gas/config/tc-lm32.c
@@ -72,6 +72,99 @@ const char line_separator_chars[] = ";";
72 72
 const char EXP_CHARS[]            = "eE";
73 73
 const char FLT_CHARS[]            = "dD";
74 74
 
  75
+/* Helper function for lm32_stringer.  Used to find the end of
  76
+   a string.  */
  77
+
  78
+static unsigned int
  79
+lm32_stringer_aux (char *s)
  80
+{
  81
+  unsigned int c = *s & CHAR_MASK;
  82
+
  83
+  switch (c)
  84
+    {
  85
+    case '\"':
  86
+      c = NOT_A_CHAR;
  87
+      break;
  88
+    default:
  89
+      break;
  90
+    }
  91
+  return c;
  92
+}
  93
+
  94
+/* Handle a .STRING type pseudo-op.  */
  95
+
  96
+static void
  97
+lm32_stringer (int append_zero)
  98
+{
  99
+  char *s, num_buf[4];
  100
+  unsigned int c;
  101
+  int i;
  102
+
  103
+  /* Preprocess the string to handle lm32-specific escape sequences.
  104
+     For example, \xDD where DD is a hexadecimal number should be
  105
+     changed to \OOO where OOO is an octal number.  */
  106
+
  107
+  /* Skip the opening quote.  */
  108
+  s = input_line_pointer + 1;
  109
+
  110
+  while (is_a_char (c = lm32_stringer_aux (s++)))
  111
+    {
  112
+      if (c == '\\')
  113
+	{
  114
+	  c = *s;
  115
+	  switch (c)
  116
+	    {
  117
+	      /* Handle \x<num>.  */
  118
+	    case 'x':
  119
+	      {
  120
+		unsigned int number;
  121
+		int num_digit;
  122
+		char dg;
  123
+		char *s_start = s;
  124
+
  125
+		/* Get past the 'x'.  */
  126
+		s++;
  127
+		for (num_digit = 0, number = 0, dg = *s;
  128
+		     num_digit < 2
  129
+		     && (ISDIGIT (dg) || (dg >= 'a' && dg <= 'f')
  130
+			 || (dg >= 'A' && dg <= 'F'));
  131
+		     num_digit++)
  132
+		  {
  133
+		    if (ISDIGIT (dg))
  134
+		      number = number * 16 + dg - '0';
  135
+		    else if (dg >= 'a' && dg <= 'f')
  136
+		      number = number * 16 + dg - 'a' + 10;
  137
+		    else
  138
+		      number = number * 16 + dg - 'A' + 10;
  139
+
  140
+		    s++;
  141
+		    dg = *s;
  142
+		  }
  143
+		if (num_digit > 0)
  144
+		  {
  145
+		    switch (num_digit)
  146
+		      {
  147
+		      case 1:
  148
+			sprintf (num_buf, "%02o", number);
  149
+			break;
  150
+		      case 2:
  151
+			sprintf (num_buf, "%03o", number);
  152
+			break;
  153
+		      }
  154
+		    for (i = 0; i <= num_digit; i++)
  155
+		      s_start[i] = num_buf[i];
  156
+		  }
  157
+		break;
  158
+	      }
  159
+	    /* This might be a "\"", skip over the escaped char.  */
  160
+	    default:
  161
+	      s++;
  162
+	      break;
  163
+	    }
  164
+	}
  165
+    }
  166
+  stringer (8 + append_zero);
  167
+}
75 168
 /* Target specific assembly directives.  */
76 169
 
77 170
 const pseudo_typeS md_pseudo_table[] =
@@ -81,6 +174,7 @@ const pseudo_typeS md_pseudo_table[] =
81 174
   { "hword",   cons,                2 },
82 175
   { "word",    cons,                4 },
83 176
   { "dword",   cons,                8 },
  177
+  { "stringz", lm32_stringer,         1},
84 178
   {(char *)0 , (void(*)(int))0,     0}
85 179
 };
86 180
 
9  external/gpl3/binutils/dist/opcodes/lm32-desc.c
@@ -185,6 +185,7 @@ static CGEN_KEYWORD_ENTRY lm32_cgen_opval_h_csr_entries[] =
185 185
   { "EBA", 7, {0, {{{0, 0}}}}, 0, 0 },
186 186
   { "DC", 8, {0, {{{0, 0}}}}, 0, 0 },
187 187
   { "DEBA", 9, {0, {{{0, 0}}}}, 0, 0 },
  188
+  { "CFG2", 10, {0, {{{0, 0}}}}, 0, 0 },
188 189
   { "JTX", 14, {0, {{{0, 0}}}}, 0, 0 },
189 190
   { "JRX", 15, {0, {{{0, 0}}}}, 0, 0 },
190 191
   { "BP0", 16, {0, {{{0, 0}}}}, 0, 0 },
@@ -194,13 +195,17 @@ static CGEN_KEYWORD_ENTRY lm32_cgen_opval_h_csr_entries[] =
194 195
   { "WP0", 24, {0, {{{0, 0}}}}, 0, 0 },
195 196
   { "WP1", 25, {0, {{{0, 0}}}}, 0, 0 },
196 197
   { "WP2", 26, {0, {{{0, 0}}}}, 0, 0 },
197  
-  { "WP3", 27, {0, {{{0, 0}}}}, 0, 0 }
  198
+  { "WP3", 27, {0, {{{0, 0}}}}, 0, 0 },
  199
+  { "PSW", 29, {0, {{{0, 0}}}}, 0, 0 },
  200
+  { "TLBVADDR", 30, {0, {{{0, 0}}}}, 0, 0 },
  201
+  { "TLBPADDR", 31, {0, {{{0, 0}}}}, 0, 0 },
  202
+  { "TLBBADVADDR", 31, {0, {{{0, 0}}}}, 0, 0 }
198 203
 };
199 204
 
200 205
 CGEN_KEYWORD lm32_cgen_opval_h_csr =
201 206
 {
202 207
   & lm32_cgen_opval_h_csr_entries[0],
203  
-  20,
  208
+  25,
204 209
   0, 0, 0, 0, ""
205 210
 };
206 211
 
114  external/gpl3/gcc/dist/gcc/config/lm32/_ashlsi3.asm
... ...
@@ -0,0 +1,114 @@
  1
+# _ashlsi3.S for Lattice Mico32 
  2
+# Contributed by Jon Beniston <jon@beniston.com> and Richard Henderson.
  3
+#
  4
+# Copyright (C) 2009 Free Software Foundation, Inc. 
  5
+#
  6
+# This file is free software; you can redistribute it and/or modify it
  7
+# under the terms of the GNU General Public License as published by the
  8
+# Free Software Foundation; either version 3, or (at your option) any
  9
+# later version.
  10
+# 
  11
+# This file is distributed in the hope that it will be useful, but
  12
+# WITHOUT ANY WARRANTY; without even the implied warranty of
  13
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14
+# General Public License for more details.
  15
+# 
  16
+# Under Section 7 of GPL version 3, you are granted additional
  17
+# permissions described in the GCC Runtime Library Exception, version
  18
+# 3.1, as published by the Free Software Foundation.
  19
+#
  20
+# You should have received a copy of the GNU General Public License and
  21
+# a copy of the GCC Runtime Library Exception along with this program;
  22
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  23
+# <http://www.gnu.org/licenses/>.
  24
+# 
  25
+
  26
+/* Arithmetic left shift.  */
  27
+        
  28
+        .text
  29
+
  30
+        .global __ashlsi3
  31
+        .type __ashlsi3,@function
  32
+
  33
+        .align 4        
  34
+__ashlsi3:
  35
+        /* Only use 5 LSBs, as that's all the h/w shifter uses.  */
  36
+        andi    r2, r2, 0x1f
  37
+        /* Get address of offset into unrolled shift loop to jump to.  */
  38
+#ifdef __PIC__
  39
+        lw      r3, (gp+got(__ashlsi3_0))
  40
+#else
  41
+        mvhi    r3, hi(__ashlsi3_0)
  42
+        ori     r3, r3, lo(__ashlsi3_0)
  43
+#endif
  44
+        add     r2, r2, r2
  45
+        add     r2, r2, r2
  46
+        sub     r3, r3, r2
  47
+        b       r3        
  48
+        
  49
+__ashlsi3_31:
  50
+        add     r1, r1, r1
  51
+__ashlsi3_30:
  52
+        add     r1, r1, r1
  53
+__ashlsi3_29:
  54
+        add     r1, r1, r1
  55
+__ashlsi3_28:
  56
+        add     r1, r1, r1
  57
+__ashlsi3_27:
  58
+        add     r1, r1, r1
  59
+__ashlsi3_26:
  60
+        add     r1, r1, r1
  61
+__ashlsi3_25:
  62
+        add     r1, r1, r1
  63
+__ashlsi3_24:
  64
+        add     r1, r1, r1
  65
+__ashlsi3_23:
  66
+        add     r1, r1, r1
  67
+__ashlsi3_22:
  68
+        add     r1, r1, r1
  69
+__ashlsi3_21:
  70
+        add     r1, r1, r1
  71
+__ashlsi3_20:
  72
+        add     r1, r1, r1
  73
+__ashlsi3_19:
  74
+        add     r1, r1, r1
  75
+__ashlsi3_18:
  76
+        add     r1, r1, r1
  77
+__ashlsi3_17:
  78
+        add     r1, r1, r1
  79
+__ashlsi3_16:
  80
+        add     r1, r1, r1
  81
+__ashlsi3_15:
  82
+        add     r1, r1, r1
  83
+__ashlsi3_14:
  84
+        add     r1, r1, r1
  85
+__ashlsi3_13:
  86
+        add     r1, r1, r1
  87
+__ashlsi3_12:
  88
+        add     r1, r1, r1
  89
+__ashlsi3_11:
  90
+        add     r1, r1, r1
  91
+__ashlsi3_10:
  92
+        add     r1, r1, r1
  93
+__ashlsi3_9:
  94
+        add     r1, r1, r1
  95
+__ashlsi3_8:
  96
+        add     r1, r1, r1
  97
+__ashlsi3_7:
  98
+        add     r1, r1, r1
  99
+__ashlsi3_6:
  100
+        add     r1, r1, r1
  101
+__ashlsi3_5:
  102
+        add     r1, r1, r1
  103
+__ashlsi3_4:
  104
+        add     r1, r1, r1
  105
+__ashlsi3_3:
  106
+        add     r1, r1, r1
  107
+__ashlsi3_2:
  108
+        add     r1, r1, r1
  109
+__ashlsi3_1:
  110
+        add     r1, r1, r1
  111
+__ashlsi3_0:
  112
+        ret
  113
+                
  114
+        
110  external/gpl3/gcc/dist/gcc/config/lm32/_ashrsi3.asm
... ...
@@ -0,0 +1,110 @@
  1
+# _ashrsi3.S for Lattice Mico32 
  2
+# Contributed by Jon Beniston <jon@beniston.com> and Richard Henderson.
  3
+#
  4
+# Copyright (C) 2009 Free Software Foundation, Inc. 
  5
+#
  6
+# This file is free software; you can redistribute it and/or modify it
  7
+# under the terms of the GNU General Public License as published by the
  8
+# Free Software Foundation; either version 3, or (at your option) any
  9
+# later version.
  10
+# 
  11
+# This file is distributed in the hope that it will be useful, but
  12
+# WITHOUT ANY WARRANTY; without even the implied warranty of
  13
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14
+# General Public License for more details.
  15
+# 
  16
+# Under Section 7 of GPL version 3, you are granted additional
  17
+# permissions described in the GCC Runtime Library Exception, version
  18
+# 3.1, as published by the Free Software Foundation.
  19
+#
  20
+# You should have received a copy of the GNU General Public License and
  21
+# a copy of the GCC Runtime Library Exception along with this program;
  22
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  23
+# <http://www.gnu.org/licenses/>.
  24
+# 
  25
+
  26
+/* Arithmetic right shift.  */
  27
+
  28
+        .global __ashrsi3
  29
+        .type __ashrsi3,@function
  30
+                                                  
  31
+__ashrsi3:
  32
+        /* Only use 5 LSBs, as that's all the h/w shifter uses.  */
  33
+        andi    r2, r2, 0x1f
  34
+        /* Get address of offset into unrolled shift loop to jump to.  */
  35
+#ifdef __PIC__
  36
+        lw      r3, (gp+got(__ashrsi3_0))
  37
+#else
  38
+        mvhi    r3, hi(__ashrsi3_0)
  39
+        ori     r3, r3, lo(__ashrsi3_0)
  40
+#endif
  41
+        add     r2, r2, r2
  42
+        add     r2, r2, r2
  43
+        sub     r3, r3, r2
  44
+        b       r3        
  45
+        
  46
+__ashrsi3_31:
  47
+        sri     r1, r1, 1
  48
+__ashrsi3_30:
  49
+        sri     r1, r1, 1
  50
+__ashrsi3_29:
  51
+        sri     r1, r1, 1
  52
+__ashrsi3_28:
  53
+        sri     r1, r1, 1
  54
+__ashrsi3_27:
  55
+        sri     r1, r1, 1
  56
+__ashrsi3_26:
  57
+        sri     r1, r1, 1
  58
+__ashrsi3_25:
  59
+        sri     r1, r1, 1
  60
+__ashrsi3_24:
  61
+        sri     r1, r1, 1
  62
+__ashrsi3_23:
  63
+        sri     r1, r1, 1
  64
+__ashrsi3_22:
  65
+        sri     r1, r1, 1
  66
+__ashrsi3_21:
  67
+        sri     r1, r1, 1
  68
+__ashrsi3_20:
  69
+        sri     r1, r1, 1
  70
+__ashrsi3_19:
  71
+        sri     r1, r1, 1
  72
+__ashrsi3_18:
  73
+        sri     r1, r1, 1
  74
+__ashrsi3_17:
  75
+        sri     r1, r1, 1
  76
+__ashrsi3_16:
  77
+        sri     r1, r1, 1
  78
+__ashrsi3_15:
  79
+        sri     r1, r1, 1
  80
+__ashrsi3_14:
  81
+        sri     r1, r1, 1
  82
+__ashrsi3_13:
  83
+        sri     r1, r1, 1
  84
+__ashrsi3_12:
  85
+        sri     r1, r1, 1
  86
+__ashrsi3_11:
  87
+        sri     r1, r1, 1
  88
+__ashrsi3_10:
  89
+        sri     r1, r1, 1
  90
+__ashrsi3_9:
  91
+        sri     r1, r1, 1
  92
+__ashrsi3_8:
  93
+        sri     r1, r1, 1
  94
+__ashrsi3_7:
  95
+        sri     r1, r1, 1
  96
+__ashrsi3_6:
  97
+        sri     r1, r1, 1
  98
+__ashrsi3_5:
  99
+        sri     r1, r1, 1
  100
+__ashrsi3_4:
  101
+        sri     r1, r1, 1
  102
+__ashrsi3_3:
  103
+        sri     r1, r1, 1
  104
+__ashrsi3_2:
  105
+        sri     r1, r1, 1
  106
+__ashrsi3_1:
  107
+        sri     r1, r1, 1
  108
+__ashrsi3_0:
  109
+        ret
  110
+        
99  external/gpl3/gcc/dist/gcc/config/lm32/_divsi3.c
... ...
@@ -0,0 +1,99 @@
  1
+/* _divsi3 for Lattice Mico32.
  2
+   Contributed by Jon Beniston <jon@beniston.com> 
  3
+   
  4
+   Copyright (C) 2009 Free Software Foundation, Inc.
  5
+
  6
+   This file is free software; you can redistribute it and/or modify it
  7
+   under the terms of the GNU General Public License as published by the
  8
+   Free Software Foundation; either version 3, or (at your option) any
  9
+   later version.
  10
+   
  11
+   This file is distributed in the hope that it will be useful, but
  12
+   WITHOUT ANY WARRANTY; without even the implied warranty of
  13
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14
+   General Public License for more details.
  15
+   
  16
+   Under Section 7 of GPL version 3, you are granted additional
  17
+   permissions described in the GCC Runtime Library Exception, version
  18
+   3.1, as published by the Free Software Foundation.
  19
+   
  20
+   You should have received a copy of the GNU General Public License and
  21
+   a copy of the GCC Runtime Library Exception along with this program;
  22
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  23
+   <http://www.gnu.org/licenses/>. */
  24
+
  25
+#include "libgcc_lm32.h"
  26
+
  27
+/* Signed integer division.  */
  28
+
  29
+static const UQItype __divsi3_table[] = {
  30
+  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  31
+  0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  32
+  0, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  33
+  0, 3, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  34
+  0, 4, 2, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  35
+  0, 5, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  36
+  0, 6, 3, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  37
+  0, 7, 3, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
  38
+  0, 8, 4, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
  39
+  0, 9, 4, 3, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0,
  40
+  0, 10, 5, 3, 2, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
  41
+  0, 11, 5, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,
  42
+  0, 12, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0,
  43
+  0, 13, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0, 0,
  44
+  0, 14, 7, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0,
  45
+  0, 15, 7, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1,
  46
+};
  47
+
  48
+SItype
  49
+__divsi3 (SItype a, SItype b)
  50
+{
  51
+  int neg = 0;
  52
+  SItype res;
  53
+  int cfg;
  54
+
  55
+  if (b == 0)
  56
+    {
  57
+      /* Raise divide by zero exception.  */
  58
+      int eba, sr;
  59
+      /* Save interrupt enable.  */
  60
+      __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
  61
+      sr = (sr & 1) << 1;
  62
+      __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
  63
+      /* Branch to exception handler.  */
  64
+      __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
  65
+      eba += 32 * 5;
  66
+      __asm__ __volatile__ ("mv ea, ra");
  67
+      __asm__ __volatile__ ("b %0"::"r" (eba));
  68
+      __builtin_unreachable ();
  69
+    }
  70
+
  71
+  if (((USItype) (a | b)) < 16)
  72
+    res = __divsi3_table[(a << 4) + b];
  73
+  else
  74
+    {
  75
+
  76
+      if (a < 0)
  77
+	{
  78
+	  a = -a;
  79
+	  neg = !neg;
  80
+	}
  81
+
  82
+      if (b < 0)
  83
+	{
  84
+	  b = -b;
  85
+	  neg = !neg;
  86
+	}
  87
+
  88
+    __asm__ ("rcsr %0, CFG":"=r" (cfg));
  89
+      if (cfg & 2)
  90
+      __asm__ ("divu %0, %1, %2": "=r" (res):"r" (a), "r" (b));
  91
+      else
  92
+	res = __udivmodsi4 (a, b, 0);
  93
+
  94
+      if (neg)
  95
+	res = -res;
  96
+    }
  97
+
  98
+  return res;
  99
+}
109  external/gpl3/gcc/dist/gcc/config/lm32/_lshrsi3.asm
... ...
@@ -0,0 +1,109 @@
  1
+# _lshrsi3.S for Lattice Mico32 
  2
+# Contributed by Jon Beniston <jon@beniston.com> and Richard Henderson.
  3
+#
  4
+# Copyright (C) 2009 Free Software Foundation, Inc. 
  5
+#
  6
+# This file is free software; you can redistribute it and/or modify it
  7
+# under the terms of the GNU General Public License as published by the
  8
+# Free Software Foundation; either version 3, or (at your option) any
  9
+# later version.
  10
+# 
  11
+# This file is distributed in the hope that it will be useful, but
  12
+# WITHOUT ANY WARRANTY; without even the implied warranty of
  13
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14
+# General Public License for more details.
  15
+# 
  16
+# Under Section 7 of GPL version 3, you are granted additional
  17
+# permissions described in the GCC Runtime Library Exception, version
  18
+# 3.1, as published by the Free Software Foundation.
  19
+#
  20
+# You should have received a copy of the GNU General Public License and
  21
+# a copy of the GCC Runtime Library Exception along with this program;
  22
+# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  23
+# <http://www.gnu.org/licenses/>.
  24
+# 
  25
+
  26
+/* Logical right shift.  */
  27
+        
  28
+        .global __lshrsi3
  29
+        .type __lshrsi3,@function
  30
+
  31
+__lshrsi3:
  32
+        /* Only use 5 LSBs, as that's all the h/w shifter uses.  */
  33
+        andi    r2, r2, 0x1f
  34
+        /* Get address of offset into unrolled shift loop to jump to.  */
  35
+#ifdef __PIC__
  36
+        lw      r3, (gp+got(__lshrsi3_0))
  37
+#else
  38
+        mvhi    r3, hi(__lshrsi3_0)
  39
+        ori     r3, r3, lo(__lshrsi3_0)
  40
+#endif
  41
+        add     r2, r2, r2
  42
+        add     r2, r2, r2
  43
+        sub     r3, r3, r2
  44
+        b       r3        
  45
+        
  46
+__lshrsi3_31:        
  47
+        srui    r1, r1, 1
  48
+__lshrsi3_30:        
  49
+        srui    r1, r1, 1
  50
+__lshrsi3_29:        
  51
+        srui    r1, r1, 1
  52
+__lshrsi3_28:        
  53
+        srui    r1, r1, 1
  54
+__lshrsi3_27:        
  55
+        srui    r1, r1, 1
  56
+__lshrsi3_26:        
  57
+        srui    r1, r1, 1
  58
+__lshrsi3_25:        
  59
+        srui    r1, r1, 1
  60
+__lshrsi3_24:        
  61
+        srui    r1, r1, 1
  62
+__lshrsi3_23:        
  63
+        srui    r1, r1, 1
  64
+__lshrsi3_22:        
  65
+        srui    r1, r1, 1
  66
+__lshrsi3_21:        
  67
+        srui    r1, r1, 1
  68
+__lshrsi3_20:        
  69
+        srui    r1, r1, 1
  70
+__lshrsi3_19:        
  71
+        srui    r1, r1, 1
  72
+__lshrsi3_18:        
  73
+        srui    r1, r1, 1
  74
+__lshrsi3_17:        
  75
+        srui    r1, r1, 1
  76
+__lshrsi3_16:        
  77
+        srui    r1, r1, 1
  78
+__lshrsi3_15:        
  79
+        srui    r1, r1, 1
  80
+__lshrsi3_14:        
  81
+        srui    r1, r1, 1
  82
+__lshrsi3_13:        
  83
+        srui    r1, r1, 1
  84
+__lshrsi3_12:        
  85
+        srui    r1, r1, 1
  86
+__lshrsi3_11:        
  87
+        srui    r1, r1, 1
  88
+__lshrsi3_10:        
  89
+        srui    r1, r1, 1
  90
+__lshrsi3_9:        
  91
+        srui    r1, r1, 1
  92
+__lshrsi3_8:        
  93
+        srui    r1, r1, 1
  94
+__lshrsi3_7:        
  95
+        srui    r1, r1, 1
  96
+__lshrsi3_6:        
  97
+        srui    r1, r1, 1
  98
+__lshrsi3_5:        
  99
+        srui    r1, r1, 1
  100
+__lshrsi3_4:        
  101
+        srui    r1, r1, 1
  102
+__lshrsi3_3:        
  103
+        srui    r1, r1, 1
  104
+__lshrsi3_2:        
  105
+        srui    r1, r1, 1
  106
+__lshrsi3_1:        
  107
+        srui    r1, r1, 1
  108
+__lshrsi3_0:        
  109
+        ret
71  external/gpl3/gcc/dist/gcc/config/lm32/_modsi3.c
... ...
@@ -0,0 +1,71 @@
  1
+/* _modsi3 for Lattice Mico32.
  2
+   Contributed by Jon Beniston <jon@beniston.com> 
  3
+   
  4
+   Copyright (C) 2009 Free Software Foundation, Inc.
  5
+
  6
+   This file is free software; you can redistribute it and/or modify it
  7
+   under the terms of the GNU General Public License as published by the
  8
+   Free Software Foundation; either version 3, or (at your option) any
  9
+   later version.
  10
+   
  11
+   This file is distributed in the hope that it will be useful, but
  12
+   WITHOUT ANY WARRANTY; without even the implied warranty of
  13
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14
+   General Public License for more details.
  15
+   
  16
+   Under Section 7 of GPL version 3, you are granted additional
  17
+   permissions described in the GCC Runtime Library Exception, version
  18
+   3.1, as published by the Free Software Foundation.
  19
+   
  20
+   You should have received a copy of the GNU General Public License and
  21
+   a copy of the GCC Runtime Library Exception along with this program;
  22
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  23
+   <http://www.gnu.org/licenses/>. */
  24
+
  25
+#include "libgcc_lm32.h"
  26
+
  27
+/* Signed integer modulus.  */
  28
+
  29
+SItype
  30
+__modsi3 (SItype a, SItype b)
  31
+{
  32
+  int neg = 0;
  33
+  SItype res;
  34
+  int cfg;
  35
+
  36
+  if (b == 0)
  37
+    {
  38
+      /* Raise divide by zero exception.  */
  39
+      int eba, sr;
  40
+      /* Save interrupt enable.  */
  41
+      __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
  42
+      sr = (sr & 1) << 1;
  43
+      __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
  44
+      /* Branch to exception handler.  */
  45
+      __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
  46
+      eba += 32 * 5;
  47
+      __asm__ __volatile__ ("mv ea, ra");
  48
+      __asm__ __volatile__ ("b %0"::"r" (eba));
  49
+      __builtin_unreachable ();
  50
+    }
  51
+
  52
+  if (a < 0)
  53
+    {
  54
+      a = -a;
  55
+      neg = 1;
  56
+    }
  57
+
  58
+  if (b < 0)
  59
+    b = -b;
  60
+
  61
+__asm__ ("rcsr %0, CFG":"=r" (cfg));
  62
+  if (cfg & 2)
  63
+  __asm__ ("modu %0, %1, %2": "=r" (res):"r" (a), "r" (b));
  64
+  else
  65
+    res = __udivmodsi4 (a, b, 1);
  66
+
  67
+  if (neg)
  68
+    res = -res;
  69
+
  70
+  return res;
  71
+}
48  external/gpl3/gcc/dist/gcc/config/lm32/_mulsi3.c
... ...
@@ -0,0 +1,48 @@
  1
+/* _mulsi3 for Lattice Mico32.
  2
+   Contributed by Jon Beniston <jon@beniston.com> 
  3
+   
  4
+   Copyright (C) 2009 Free Software Foundation, Inc.
  5
+
  6
+   This file is free software; you can redistribute it and/or modify it
  7
+   under the terms of the GNU General Public License as published by the
  8
+   Free Software Foundation; either version 3, or (at your option) any
  9
+   later version.
  10
+   
  11
+   This file is distributed in the hope that it will be useful, but
  12
+   WITHOUT ANY WARRANTY; without even the implied warranty of
  13
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14
+   General Public License for more details.
  15
+   
  16
+   Under Section 7 of GPL version 3, you are granted additional
  17
+   permissions described in the GCC Runtime Library Exception, version
  18
+   3.1, as published by the Free Software Foundation.
  19
+   
  20
+   You should have received a copy of the GNU General Public License and
  21
+   a copy of the GCC Runtime Library Exception along with this program;
  22
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  23
+   <http://www.gnu.org/licenses/>. */
  24
+
  25
+#include "libgcc_lm32.h"
  26
+
  27
+/* Integer multiplication.  */
  28
+
  29
+USItype
  30
+__mulsi3 (USItype a, USItype b)
  31
+{
  32
+  USItype result;
  33
+
  34
+  result = 0;
  35
+
  36
+  if (a == 0)
  37
+    return 0;
  38
+
  39
+  while (b != 0)
  40
+    {
  41
+      if (b & 1)
  42
+	result += a;
  43
+      a <<= 1;
  44
+      b >>= 1;
  45
+    }
  46
+
  47
+  return result;
  48
+}
53  external/gpl3/gcc/dist/gcc/config/lm32/_udivmodsi4.c
... ...
@@ -0,0 +1,53 @@
  1
+/* _udivmodsi4 for Lattice Mico32.
  2
+   Contributed by Jon Beniston <jon@beniston.com> 
  3
+   
  4
+   Copyright (C) 2009 Free Software Foundation, Inc.
  5
+
  6
+   This file is free software; you can redistribute it and/or modify it
  7
+   under the terms of the GNU General Public License as published by the
  8
+   Free Software Foundation; either version 3, or (at your option) any
  9
+   later version.
  10
+   
  11
+   This file is distributed in the hope that it will be useful, but
  12
+   WITHOUT ANY WARRANTY; without even the implied warranty of
  13
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14
+   General Public License for more details.
  15
+   
  16
+   Under Section 7 of GPL version 3, you are granted additional
  17
+   permissions described in the GCC Runtime Library Exception, version
  18
+   3.1, as published by the Free Software Foundation.
  19
+   
  20
+   You should have received a copy of the GNU General Public License and
  21
+   a copy of the GCC Runtime Library Exception along with this program;
  22
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  23
+   <http://www.gnu.org/licenses/>. */
  24
+
  25
+#include "libgcc_lm32.h"
  26
+
  27
+/* Unsigned integer division/modulus.  */
  28
+
  29
+USItype
  30
+__udivmodsi4 (USItype num, USItype den, int modwanted)
  31
+{
  32
+  USItype bit = 1;
  33
+  USItype res = 0;
  34
+
  35
+  while (den < num && bit && !(den & (1L << 31)))
  36
+    {
  37
+      den <<= 1;
  38
+      bit <<= 1;
  39
+    }
  40
+  while (bit)
  41
+    {
  42
+      if (num >= den)
  43
+	{
  44
+	  num -= den;
  45
+	  res |= bit;
  46
+	}
  47
+      bit >>= 1;
  48
+      den >>= 1;
  49
+    }
  50
+  if (modwanted)
  51
+    return num;
  52
+  return res;
  53
+}
49  external/gpl3/gcc/dist/gcc/config/lm32/_udivsi3.c
... ...
@@ -0,0 +1,49 @@
  1
+/* _udivsi3 for Lattice Mico32.
  2
+   Contributed by Jon Beniston <jon@beniston.com> 
  3
+   
  4
+   Copyright (C) 2009 Free Software Foundation, Inc.
  5
+
  6
+   This file is free software; you can redistribute it and/or modify it
  7
+   under the terms of the GNU General Public License as published by the
  8
+   Free Software Foundation; either version 3, or (at your option) any
  9
+   later version.
  10
+   
  11
+   This file is distributed in the hope that it will be useful, but
  12
+   WITHOUT ANY WARRANTY; without even the implied warranty of
  13
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14
+   General Public License for more details.
  15
+   
  16
+   Under Section 7 of GPL version 3, you are granted additional
  17
+   permissions described in the GCC Runtime Library Exception, version
  18
+   3.1, as published by the Free Software Foundation.
  19
+   
  20
+   You should have received a copy of the GNU General Public License and
  21
+   a copy of the GCC Runtime Library Exception along with this program;
  22
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  23
+   <http://www.gnu.org/licenses/>. */
  24
+
  25
+#include "libgcc_lm32.h"
  26
+
  27
+/* Unsigned integer division.  */
  28
+
  29
+USItype
  30
+__udivsi3 (USItype a, USItype b)
  31
+{
  32
+  if (b == 0)
  33
+    {
  34
+      /* Raise divide by zero exception.  */
  35
+      int eba, sr;
  36
+      /* Save interrupt enable.  */
  37
+      __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
  38
+      sr = (sr & 1) << 1;
  39
+      __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
  40
+      /* Branch to exception handler.  */
  41
+      __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
  42
+      eba += 32 * 5;
  43
+      __asm__ __volatile__ ("mv ea, ra");
  44
+      __asm__ __volatile__ ("b %0"::"r" (eba));
  45
+      __builtin_unreachable ();
  46
+    }
  47
+
  48
+  return __udivmodsi4 (a, b, 0);
  49
+}
49  external/gpl3/gcc/dist/gcc/config/lm32/_umodsi3.c
... ...
@@ -0,0 +1,49 @@
  1
+/* _umodsi3 for Lattice Mico32.
  2
+   Contributed by Jon Beniston <jon@beniston.com> 
  3
+   
  4
+   Copyright (C) 2009 Free Software Foundation, Inc.
  5
+
  6
+   This file is free software; you can redistribute it and/or modify it
  7
+   under the terms of the GNU General Public License as published by the
  8
+   Free Software Foundation; either version 3, or (at your option) any
  9
+   later version.
  10
+   
  11
+   This file is distributed in the hope that it will be useful, but
  12
+   WITHOUT ANY WARRANTY; without even the implied warranty of
  13
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14
+   General Public License for more details.
  15
+   
  16
+   Under Section 7 of GPL version 3, you are granted additional
  17
+   permissions described in the GCC Runtime Library Exception, version
  18
+   3.1, as published by the Free Software Foundation.
  19
+   
  20
+   You should have received a copy of the GNU General Public License and
  21
+   a copy of the GCC Runtime Library Exception along with this program;
  22
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  23
+   <http://www.gnu.org/licenses/>. */
  24
+
  25
+#include "libgcc_lm32.h"
  26
+
  27
+/* Unsigned modulus.  */
  28
+
  29
+USItype
  30
+__umodsi3 (USItype a, USItype b)
  31
+{
  32
+  if (b == 0)
  33
+    {
  34
+      /* Raise divide by zero exception.  */
  35
+      int eba, sr;
  36
+      /* Save interrupt enable.  */
  37
+      __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
  38
+      sr = (sr & 1) << 1;
  39
+      __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
  40
+      /* Branch to exception handler.  */
  41
+      __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
  42
+      eba += 32 * 5;
  43
+      __asm__ __volatile__ ("mv ea, ra");
  44
+      __asm__ __volatile__ ("b %0"::"r" (eba));
  45
+      __builtin_unreachable ();
  46
+    }
  47
+
  48
+  return __udivmodsi4 (a, b, 1);
  49
+}
13  external/gpl3/gcc/dist/gcc/config/lm32/lm32-netbsd.h
@@ -96,19 +96,6 @@ Boston, MA 02111-1307, USA.  */
96 96
 /* Use the default.  */
97 97
 #undef TARGET_ASM_GLOBALIZE_LABEL
98 98
 
99  
-/* FIXME: Hacked from the <elfos.h> one so that we avoid multiple
100  
-   labels in a function declaration (since pa.c seems determined to do
101  
-   it differently)  */
102  
-
103  
-#undef ASM_DECLARE_FUNCTION_NAME
104  
-#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)		\
105  
-  do								\
106  
-    {								\
107  
-      ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "function");	\
108  
-      ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL));		\
109  
-    }								\
110  
-  while (0)
111  
-
112 99
 /* NetBSD always uses gas.  */
113 100
 #undef TARGET_GAS
114 101
 #define TARGET_GAS 1
7  external/gpl3/gcc/dist/gcc/config/lm32/t-lm32
... ...
@@ -1,2 +1,9 @@
1 1
 # for multilib
2 2
 MULTILIB_OPTIONS = mbarrel-shift-enabled mmultiply-enabled mdivide-enabled msign-extend-enabled
  3
+#LIB1ASMSRC = lm32/_ashlsi3.S \ 
  4
+#	     lm32/_ashrsi3.S \
  5
+#	     lm32/_lshrsi3.S
  6
+
  7
+#LIB1ASMFUNCS = _udivsi3 _umodsi3
  8
+
  9
+LIB2FUNCS_EXTRA += $(srcdir)/config/lm32/_divsi3.c $(srcdir)/config/lm32/_modsi3.c $(srcdir)/config/lm32/_mulsi3.c $(srcdir)/config/lm32/_udivmodsi4.c $(srcdir)/config/lm32/_udivsi3.c $(srcdir)/config/lm32/_umodsi3.c $(srcdir)/config/lm32/_ashlsi3.asm $(srcdir)/config/lm32/_ashrsi3.asm $(srcdir)/config/lm32/_lshrsi3.asm
4  external/gpl3/gcc/dist/libgcc/config.host
@@ -365,6 +365,10 @@ lm32-*-elf*|lm32-*-rtems*)
365 365
         extra_parts="crtbegin.o crtend.o crti.o crtn.o"
366 366
         tmake_file="lm32/t-lm32 lm32/t-elf t-softfp"
367 367
 	;;
  368
+lm32-*-netbsd*)
  369
+        extra_parts="crtbegin.o crtend.o crti.o crtn.o"
  370
+        tmake_file="lm32/t-lm32 lm32/t-elf t-softfp"
  371
+	;;
368 372
 lm32-*-uclinux*)
369 373
         extra_parts="crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o"
370 374
         tmake_file="lm32/t-lm32 lm32/t-uclinux t-softfp"
4  share/mk/bsd.sys.mk
@@ -114,6 +114,10 @@ FFLAGS+=	-mieee
114 114
 CFLAGS+=	-Wa,-Av8plus
115 115
 .endif
116 116
 
  117
+.if ${MACHINE_ARCH} == "lm32" && ${MACHINE} == "milkymist"
  118
+CFLAGS+= -mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled
  119
+.endif
  120
+
117 121
 .if !defined(NOGCCERROR)
118 122
 .if (${MACHINE_ARCH} == "mips64el") || (${MACHINE_ARCH} == "mips64eb")
119 123
 CPUFLAGS+=	-Wa,--fatal-warnings
6  sys/arch/lm32/compile/Makefile
... ...
@@ -0,0 +1,6 @@
  1
+#	$NetBSD: Makefile,v 1.1 2003/01/06 17:40:35 lukem Exp $
  2
+
  3
+.include <bsd.prog.mk>
  4
+
  5
+CFLAGS += -mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled
  6
+
14  sys/arch/lm32/conf/GENERIC
... ...
@@ -0,0 +1,14 @@
  1
+machine milkymist lm32
  2
+
  3
+#maxusers 16
  4
+
  5
+options HZ=100
  6
+file-system PROCFS
  7
+file-system TMPFS
  8
+file-system PTYFS
  9
+file-system KERNFS
  10
+file-system FDESC
  11
+
  12
+config netbsd root on ? type ?
  13
+
  14
+mainbus0 at root
86  sys/arch/lm32/conf/Makefile.lm32
... ...
@@ -0,0 +1,86 @@
  1
+#	$NetBSD: Makefile.lm32,v 1.178 2012/10/03 18:58:31 dsl Exp $
  2
+
  3
+# Makefile for NetBSD
  4
+#
  5
+
  6
+MACHINE_ARCH=	lm32
  7
+USETOOLS?=	no
  8
+NEED_OWN_INSTALL_TARGET?=no
  9
+.include <bsd.own.mk>
  10
+
  11
+USE_SSP?=	no
  12
+
  13
+##
  14
+## (1) port identification
  15
+##
  16
+LM32=		$S/arch/lm32
  17
+GENASSYM_CONF=	${LM32}/lm32/genassym.cf
  18
+
  19
+##
  20
+## (2) compile settings
  21
+##
  22
+CPPFLAGS+=	-Dlm32
  23
+
  24
+AFLAGS.mptramp.S= ${${ACTIVE_CC} == "clang":?-no-integrated-as:}
  25
+AFLAGS.spl.S= ${${ACTIVE_CC} == "clang":?-no-integrated-as:}
  26
+AFLAGS.lock_stubs.S= ${${ACTIVE_CC} == "clang":?-no-integrated-as:}
  27
+
  28
+##
  29
+## (3) libkern and compat
  30
+##
  31
+OPT_MODULAR=	%MODULAR%
  32
+.if !empty(OPT_MODULAR)
  33
+KERN_AS=	obj
  34
+.else
  35
+KERN_AS=	library
  36
+.endif
  37
+
  38
+##
  39
+## (4) local objects, compile rules, and dependencies
  40
+##
  41
+MD_OBJS=
  42
+MD_CFILES=
  43
+MD_SFILES=
  44
+
  45
+##
  46
+## (5) link settings
  47
+##
  48
+TEXTADDR?=	c0100000
  49
+LINKFLAGS_NORMAL=	-X
  50
+KERN_LDSCRIPT?=	kern.ldscript
  51
+LINKFORMAT=	-T ${LM32}/conf/${KERN_LDSCRIPT}
  52
+
  53
+##
  54
+## (7) misc settings
  55
+##
  56
+
  57
+.if !make(obj) && !make(clean) && !make(cleandir)
  58
+.BEGIN:
  59
+	@rm -f lm32 && \
  60
+		ln -s $S/arch/lm32/include lm32
  61
+.endif
  62
+
  63
+##
  64
+## (8) config(8) generated machinery
  65
+##
  66
+%INCLUDES
  67
+
  68
+%OBJS
  69
+
  70
+%CFILES
  71
+
  72
+%SFILES
  73
+
  74
+%LOAD
  75
+
  76
+%RULES
  77
+
  78
+##
  79
+## (9) port independent kernel machinery
  80
+##
  81
+.include "$S/conf/Makefile.kern.inc"
  82
+
  83
+##
  84
+## (10) Appending make options.
  85
+##
  86
+%MAKEOPTIONSAPPEND
9  sys/arch/lm32/conf/files.lm32
... ...
@@ -0,0 +1,9 @@
  1
+include "arch/lm32/conf/majors.lm32"
  2
+
  3
+maxpartitions 8
  4
+
  5
+define mainbus {}
  6
+device mainbus
  7
+attach mainbus at root
  8
+
  9
+file arch/lm32/mainbus.c mainbus
1  sys/arch/lm32/conf/majors.lm32
... ...
@@ -0,0 +1 @@
  1
+device-major mem char 2
2  sys/arch/lm32/include/Makefile.inc
... ...
@@ -0,0 +1,2 @@
  1
+
  2
+CFLAGS += -mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled
62  sys/arch/lm32/include/ansi.h
... ...
@@ -0,0 +1,62 @@
  1
+/*	$NetBSD: ansi.h,v 1.25 2011/07/17 20:54:41 joerg Exp $	*/
  2
+
  3
+/*-
  4
+ * Copyright (c) 1990, 1993
  5
+ *	The Regents of the University of California.  All rights reserved.
  6
+ *
  7
+ * Redistribution and use in source and binary forms, with or without
  8
+ * modification, are permitted provided that the following conditions
  9
+ * are met:
  10
+ * 1. Redistributions of source code must retain the above copyright
  11
+ *    notice, this list of conditions and the following disclaimer.
  12
+ * 2. Redistributions in binary form must reproduce the above copyright
  13
+ *    notice, this list of conditions and the following disclaimer in the
  14
+ *    documentation and/or other materials provided with the distribution.
  15
+ * 3. Neither the name of the University nor the names of its contributors
  16
+ *    may be used to endorse or promote products derived from this software
  17
+ *    without specific prior written permission.
  18
+ *
  19
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  20
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  23
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  29
+ * SUCH DAMAGE.
  30
+ *
  31
+ *	@(#)ansi.h	8.2 (Berkeley) 1/4/94
  32
+ */
  33
+
  34
+#ifndef	_LM32_ANSI_H_
  35
+#define	_LM32_ANSI_H_
  36
+
  37
+#include <sys/cdefs.h>
  38
+
  39
+#include <machine/int_types.h>
  40
+
  41
+/*
  42
+ * Types which are fundamental to the implementation and may appear in
  43
+ * more than one standard header are defined here.  Standard headers
  44
+ * then use:
  45
+ *	#ifdef	_BSD_SIZE_T_
  46
+ *	typedef	_BSD_SIZE_T_ size_t;
  47
+ *	#undef	_BSD_SIZE_T_
  48
+ *	#endif
  49
+ */
  50
+#define	_BSD_CLOCK_T_		unsigned long	/* clock() */
  51
+#define	_BSD_PTRDIFF_T_		int		/* ptr1 - ptr2 */
  52
+#define	_BSD_SIZE_T_		unsigned int	/* sizeof() */
  53
+#define	_BSD_SSIZE_T_		int		/* byte count or error */
  54
+#define	_BSD_TIME_T_		__int64_t	/* time() */
  55
+#define	_BSD_CLOCKID_T_		int		/* clockid_t */
  56
+#define	_BSD_TIMER_T_		int		/* timer_t */
  57
+#define	_BSD_SUSECONDS_T_	int		/* suseconds_t */
  58
+#define	_BSD_USECONDS_T_	unsigned int	/* useconds_t */
  59
+#define	_BSD_WCHAR_T_		int		/* wchar_t */
  60
+#define	_BSD_WINT_T_		int		/* wint_t */
  61
+
  62
+#endif	/* _LM32_ANSI_H_ */
245  sys/arch/lm32/include/asm.h
... ...
@@ -0,0 +1,245 @@
  1
+/*	$NetBSD: asm.h,v 1.27 2010/12/20 21:11:25 joerg Exp $	*/
  2
+
  3
+/*-
  4
+ * Copyright (c) 1990 The Regents of the University of California.
  5
+ * All rights reserved.
  6
+ *
  7
+ * This code is derived from software contributed to Berkeley by
  8
+ * William Jolitz.
  9
+ *
  10
+ * Redistribution and use in source and binary forms, with or without
  11
+ * modification, are permitted provided that the following conditions
  12
+ * are met:
  13
+ * 1. Redistributions of source code must retain the above copyright
  14
+ *    notice, this list of conditions and the following disclaimer.
  15
+ * 2. Redistributions in binary form must reproduce the above copyright
  16
+ *    notice, this list of conditions and the following disclaimer in the
  17
+ *    documentation and/or other materials provided with the distribution.
  18
+ * 3. Neither the name of the University nor the names of its contributors
  19
+ *    may be used to endorse or promote products derived from this software
  20
+ *    without specific prior written permission.
  21
+ *
  22
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  23
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  25
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  26
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  28
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  29
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  30
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  31
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32
+ * SUCH DAMAGE.
  33
+ *
  34
+ *	@(#)asm.h	5.5 (Berkeley) 5/7/91
  35
+ */
  36
+
  37
+#ifndef _LM32_ASM_H_
  38
+#define	_LM32_ASM_H_
  39
+
  40
+/*
  41
+ * The old NetBSD ELF toolchain used underscores.  The new
  42
+ * NetBSD ELF toolchain does not.  The C pre-processor
  43
+ * defines __NO_LEADING_UNDERSCORES__ for the new ELF toolchain.
  44
+ */
  45
+
  46
+#if defined(__ELF__) && defined(__NO_LEADING_UNDERSCORES__)
  47
+# define _C_LABEL(x)	x
  48
+#else
  49
+#ifdef __STDC__
  50
+# define _C_LABEL(x)	_ ## x
  51
+#else
  52
+# define _C_LABEL(x)	_/**/x
  53
+#endif
  54
+#endif
  55
+#define	_ASM_LABEL(x)	x
  56
+
  57
+/* let kernels and others override entrypoint alignment */
  58
+#ifndef _ALIGN_TEXT
  59
+# define _ALIGN_TEXT .align 2
  60
+#endif
  61
+
  62
+#ifdef __ELF__
  63
+#define	_ENTRY(x)							\
  64
+	.text								;\
  65
+	_ALIGN_TEXT							;\
  66
+	.globl x							;\
  67
+	.type x,@function						;\
  68
+	x:
  69
+#else /* !__ELF__ */
  70
+#define	_ENTRY(x)							\
  71
+	.text								;\
  72
+	_ALIGN_TEXT							;\
  73
+	.globl x							;\
  74
+	x:
  75
+#endif /* !__ELF__ */
  76
+
  77
+#ifdef GPROF
  78
+#define	_PROF_PROLOGUE				  \
  79
+;FIXME: to be replaced by lm32 asm code         ; \
  80
+;	mov.l	1f,r1				; \
  81
+;	mova	2f,r0				; \
  82
+;	jmp	@r1				; \
  83
+;	 nop					; \
  84
+;	.align	2				; \
  85
+;1:	.long	__mcount			; \
  86
+;2:
  87
+#else  /* !GPROF */
  88
+#define	_PROF_PROLOGUE
  89
+#endif /* !GPROF */
  90
+
  91
+#define	ENTRY(y)	_ENTRY(_C_LABEL(y)) _PROF_PROLOGUE
  92
+#define	NENTRY(y)	_ENTRY(_C_LABEL(y))
  93
+#define	ASENTRY(y)	_ENTRY(_ASM_LABEL(y)) _PROF_PROLOGUE
  94
+
  95
+#define SET_ENTRY_SIZE(y) \
  96
+	.size	_C_LABEL(y), . - _C_LABEL(y)
  97
+
  98
+#define SET_ASENTRY_SIZE(y) \
  99
+	.size	_ASM_LABEL(y), . - _ASM_LABEL(y)
  100
+
  101
+#ifdef __ELF__
  102
+#define	ALTENTRY(name)				 \
  103
+	.globl _C_LABEL(name)			;\
  104
+	.type _C_LABEL(name),@function		;\
  105
+	_C_LABEL(name):
  106
+#else
  107
+#define	ALTENTRY(name)				 \
  108
+	.globl _C_LABEL(name)			;\
  109
+	_C_LABEL(name):
  110
+#endif
  111
+
  112
+
  113
+/*
  114
+ * Hide the gory details of PIC calls vs. normal calls.  Use as in the
  115
+ * following example:
  116
+ *
  117
+ *	sts.l	pr, @-sp
  118
+ *	PIC_PROLOGUE(.L_got, r0)	! saves old r12 on stack
  119
+ *	...
  120
+ *	mov.l	.L_function_1, r0
  121
+ * 1:	CALL	r0			! each call site needs a label
  122
+ *	 nop
  123
+ *      ...
  124
+ *	mov.l	.L_function_2, r0
  125
+ * 2:	CALL	r0
  126
+ *	 nop
  127
+ *	...
  128
+ *	PIC_EPILOGUE			! restores r12 from stack
  129
+ *	lds.l	@sp+, pr		!  so call in right order 
  130
+ *	rts
  131
+ *	 nop
  132
+ *
  133
+ *	.align 2
  134
+ * .L_got:
  135
+ *	PIC_GOT_DATUM
  136
+ * .L_function_1:			! if you call the same function twice
  137
+ *	CALL_DATUM(function, 1b)	!  provide call datum for each call
  138
+ * .L_function_2:
  139
+ * 	CALL_DATUM(function, 2b)
  140
+ */
  141
+
  142
+#ifdef PIC
  143
+
  144
+#define	PIC_PLT(x)	x@PLT
  145
+#define	PIC_GOT(x)	x@GOT
  146
+#define	PIC_GOTOFF(x)	x@GOTOFF
  147
+
  148
+#define	PIC_PROLOGUE(got)			\
  149
+;FIXME: This needs to be replaced by lm32 asm   \
  150
+;        	mov.l	r12, @-sp;		\
  151
+;		PIC_PROLOGUE_NOSAVE(got)
  152
+
  153
+/*
  154
+ * Functions that do non local jumps don't need to preserve r12,
  155
+ * so we can shave off two instructions to save/restore it.
  156
+ */
  157
+#define	PIC_PROLOGUE_NOSAVE(got)		\
  158
+;FIXME: This needs to be replaced by lm32 asm   \
  159
+;        	mov.l	got, r12;		\
  160
+;        	mova	got, r0;		\
  161
+;        	add	r0, r12
  162
+
  163
+#define	PIC_EPILOGUE				\
  164
+;FIXME: This needs to be replaced by lm32 asm   \
  165
+;		mov.l	@sp+, r12
  166
+
  167
+#define PIC_EPILOGUE_SLOT 			\
  168
+		PIC_EPILOGUE
  169
+
  170
+#define PIC_GOT_DATUM \
  171
+;FIXME: This needs to be replaced by lm32 asm   \
  172
+;		.long	_GLOBAL_OFFSET_TABLE_
  173
+
  174
+#define CALL_DATUM(function, lpcs) \
  175
+;FIXME: This needs to be replaced by lm32 asm   \
  176
+;		.long	PIC_PLT(function) - ((lpcs) + 4 - (.))
  177
+
  178
+/*
  179
+ * This will result in text relocations in the shared library,
  180
+ * unless the function is local or has hidden or protected visibility.
  181
+ * Does not require PIC prologue.
  182
+ */
  183
+#define CALL_DATUM_LOCAL(function, lpcs) \
  184
+;FIXME: This needs to be replaced by lm32 asm   \
  185
+;		.long	function - ((lpcs) + 4)
  186
+
  187
+#else  /* !PIC */
  188
+
  189
+#define	PIC_PROLOGUE(label)
  190
+#define	PIC_PROLOGUE_NOSAVE(label)
  191
+#define	PIC_EPILOGUE
  192
+#define	PIC_EPILOGUE_SLOT	nop
  193
+#define PIC_GOT_DATUM
  194
+
  195
+#define CALL_DATUM(function, lpcs) \
  196
+;FIXME: This needs to be replaced by lm32 asm   \
  197
+;		.long	function
  198
+
  199
+#define CALL_DATUM_LOCAL(function, lpcs) \
  200
+;FIXME: This needs to be replaced by lm32 asm   \
  201
+;		.long	function
  202
+
  203
+#endif /* !PIC */
  204
+
  205
+
  206
+#define	ASMSTR		.asciz
  207
+
  208
+#ifdef __ELF__
  209
+#define RCSID(x)	.pushsection ".ident"; .asciz x; .popsection
  210
+#else
  211
+#define	RCSID(x)	.text; .asciz x
  212
+#endif
  213
+
  214
+#ifdef NO_KERNEL_RCSIDS
  215
+#define	__KERNEL_RCSID(_n, _s)	/* nothing */
  216
+#else