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lm32: Add support for CFG2 CSR register

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commit cd0badebd6b39c1fb206b662196009bfcc7809d7 1 parent 0dcd80f
Yann Sionneau authored
1  cpu/lm32.cpu
@@ -101,6 +101,7 @@
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                (EBA 7)
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                (DC 8)
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                (DEBA 9)
  104
+	       (CFG2 10)
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                (JTX 14) (JRX 15)          
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                (BP0 16) (BP1 17) (BP2 18) (BP3 19)
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                (WP0 24) (WP1 25) (WP2 26) (WP3 27)     
3  opcodes/lm32-desc.c
@@ -185,6 +185,7 @@ static CGEN_KEYWORD_ENTRY lm32_cgen_opval_h_csr_entries[] =
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   { "EBA", 7, {0, {{{0, 0}}}}, 0, 0 },
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   { "DC", 8, {0, {{{0, 0}}}}, 0, 0 },
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   { "DEBA", 9, {0, {{{0, 0}}}}, 0, 0 },
  188
+  { "CFG2", 10, {0, {{{0, 0}}}}, 0, 0 },
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   { "JTX", 14, {0, {{{0, 0}}}}, 0, 0 },
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   { "JRX", 15, {0, {{{0, 0}}}}, 0, 0 },
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   { "BP0", 16, {0, {{{0, 0}}}}, 0, 0 },
@@ -204,7 +205,7 @@ static CGEN_KEYWORD_ENTRY lm32_cgen_opval_h_csr_entries[] =
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 CGEN_KEYWORD lm32_cgen_opval_h_csr =
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 {
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   & lm32_cgen_opval_h_csr_entries[0],
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-  24,
  208
+  25,
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   0, 0, 0, 0, ""
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 };
210 211
 

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