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Fix typo

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commit 7e7685402c253450dbda220304ced2c16dbbc3ec 1 parent e472898
Yann Sionneau authored October 24, 2012
2  lm32_cpu.v
@@ -2196,7 +2196,7 @@ begin
2196 2196
     `LM32_CSR_JRX:  csr_read_data_x = jrx_csr_read_data;
2197 2197
 `endif
2198 2198
     `LM32_CSR_CFG2: csr_read_data_x = cfg2;
2199  
-`ifdef `LM32_MMU_ENABLED
  2199
+`ifdef CFG_MMU_ENABLED
2200 2200
     `LM32_CSR_TLB_VADDRESS: csr_read_data_x = load_store_csr_read_data_x;
2201 2201
     `LM32_CSR_TLB_PADDRESS: csr_read_data_x = instruction_csr_read_data_x;
2202 2202
     `LM32_CSR_PSW:	csr_read_data_x = lm32_csr_psw_reg;
2  lm32_dcache.v
@@ -284,7 +284,7 @@ reg [`LM32_DC_ADDR_OFFSET_RNG] refill_offset;           // Which word in cache l
284 284
 wire last_refill;                                       // Indicates when on last cycle of cache refill
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 reg [`LM32_DC_TMEM_ADDR_RNG] flush_set;                 // Which set is currently being flushed
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287  
-`ifdef LM32_MMU_ENABLED
  287
+`ifdef CFG_MMU_ENABLED
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 wire [addr_dtlb_index_width-1:0] dtlb_data_read_address;
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 wire [addr_dtlb_index_width-1:0] dtlb_data_write_address;
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 wire dtlb_data_read_port_enable;
2  lm32_interrupt.v
@@ -267,7 +267,7 @@ begin
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             begin
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                 // Handle wcsr write
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                 if ((csr == `LM32_CSR_IE)
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-`ifdef `LM32_MMU_ENABLED
  270
+`ifdef CFG_MMU_ENABLED
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 		 || (csr == `LM32_CSR_PSW)
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 `endif
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 		)

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