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base fork: fallen/milkymist-mmu
base: 2b79691a1126
...
head fork: fallen/milkymist-mmu
compare: de964d411ce8
  • 2 commits
  • 2 files changed
  • 0 commit comments
  • 1 contributor
Commits on Oct 12, 2012
Yann Sionneau Add support for DTLB in PSW register 836f789
Yann Sionneau Fix DTLB exception handling test de964d4
View
20 cores/lm32/rtl/lm32_cpu.v
@@ -2216,33 +2216,45 @@ begin
`ifdef CFG_DEBUG_ENABLED
if (non_debug_exception_q_w == `TRUE)
begin
- // Save and then clear ITLB enable
+ // Save and then clear ITLB and DTLB enable
lm32_csr_psw_reg[`LM32_CSR_PSW_EITLBE] <= lm32_csr_psw_reg[`LM32_CSR_PSW_ITLBE];
+ lm32_csr_psw_reg[`LM32_CSR_PSW_EDTLBE] <= lm32_csr_psw_reg[`LM32_CSR_PSW_DTLBE];
lm32_csr_psw_reg[`LM32_CSR_PSW_ITLBE] <= `FALSE;
+ lm32_csr_psw_reg[`LM32_CSR_PSW_DTLBE] <= `FALSE;
end
else if (debug_exception_q_w == `TRUE)
begin
// Save and then clear TLB enable
lm32_csr_psw_reg[`LM32_CSR_PSW_BITLBE] <= lm32_csr_psw_reg[`LM32_CSR_PSW_ITLBE];
lm32_csr_psw_reg[`LM32_CSR_PSW_ITLBE] <= `FALSE;
+ lm32_csr_psw_reg[`LM32_CSR_PSW_BDTLBE] <= lm32_csr_psw_reg[`LM32_CSR_PSW_DTLBE];
+ lm32_csr_psw_reg[`LM32_CSR_PSW_DTLBE] <= `FALSE;
end
`else
if (exception_q_w == `TRUE)
begin
- // Save and then clear ITLB enable
+ // Save and then clear ITLB and DTLB enable
lm32_csr_psw_reg[`LM32_CSR_PSW_EITLBE] <= lm32_csr_psw_reg[`LM32_CSR_PSW_ITLBE];
lm32_csr_psw_reg[`LM32_CSR_PSW_ITLBE] <= `FALSE;
+ lm32_csr_psw_reg[`LM32_CSR_PSW_EDTLBE] <= lm32_csr_psw_reg[`LM32_CSR_PSW_DTLBE];
+ lm32_csr_psw_reg[`LM32_CSR_PSW_DTLBE] <= `FALSE;
end
`endif
else if (stall_x == `FALSE)
begin
if (eret_q_x == `TRUE)
- // Restore ITLB enable
+ begin
+ // Restore ITLB and DTLB enable
lm32_csr_psw_reg[`LM32_CSR_PSW_ITLBE] <= lm32_csr_psw_reg[`LM32_CSR_PSW_EITLBE];
+ lm32_csr_psw_reg[`LM32_CSR_PSW_DTLBE] <= lm32_csr_psw_reg[`LM32_CSR_PSW_EDTLBE];
+ end
`ifdef CFG_DEBUG_ENABLED
else if (bret_q_x == `TRUE)
- // Restore ITLB enable
+ begin
+ // Restore ITLB and DTLB enable
lm32_csr_psw_reg[`LM32_CSR_PSW_ITLBE] <= lm32_csr_psw_reg[`LM32_CSR_PSW_BITLBE];
+ lm32_csr_psw_reg[`LM32_CSR_PSW_DTLBE] <= lm32_csr_psw_reg[`LM32_CSR_PSW_BDTLBE];
+ end
`endif
else if (csr_write_enable_q_x == `TRUE)
begin
View
6 software/bios/dtlb_exception_handling_tests.c
@@ -51,7 +51,7 @@ void dtlb_exception_handling_tests() {
printf("\n<= Reading %d from virtual address 0x%08X\n\n", data, addr);
printf("=> Invalidating the mapping of virtual address 0x%08X in the TLB\n", addr);
- mmu_dtlb_invalidate_line(addr);
+ mmu_dtlb_invalidate_line(get_pfn(addr));
data = 43;
printf("=> Writing %d to physical address 0x%08X\n", data, addr);
@@ -67,7 +67,7 @@ void dtlb_exception_handling_tests() {
check_for_error(ret);
printf("=> Invalidating the mapping of virtual address 0x%08X in the TLB\n", addr);
- mmu_dtlb_invalidate_line(addr); // AND invalidate the mapping
+ mmu_dtlb_invalidate_line(get_pfn(addr)); // AND invalidate the mapping
data = 44;
printf("=> Writting %d to physical address 0x%08X\n", data, addr+0x1000);
@@ -77,5 +77,7 @@ void dtlb_exception_handling_tests() {
printf("=> Activating the MMU and reading form virtual address 0x%08X\n", addr);
data = read_word_with_mmu_enabled(addr);
printf("\n<= Reading %d from virtual address 0x%08X\n\n", data, addr);
+ data = *(unsigned int *)addr;
+ printf("\n<= Reading %d from physical address 0x%08X\n\n", data, addr);
}

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