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3  cores/lm32/rtl/lm32_dcache.v
@@ -799,7 +799,8 @@ begin
799 799
 					`LM32_TLB_CTRL_INVALIDATE_ENTRY:
800 800
 					begin
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 						dtlb_flushing <= 1;
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-						dtlb_flush_set <= dtlb_update_vaddr_csr_reg[`LM32_DTLB_IDX_RNG];
  802
+//						dtlb_flush_set <= dtlb_update_vaddr_csr_reg[`LM32_DTLB_IDX_RNG];
  803
+						dtlb_flush_set <= csr_write_data[`LM32_DTLB_IDX_RNG];
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 						dtlb_updating <= 0;
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 						dtlb_state <= `LM32_TLB_STATE_CHECK;
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 					end
3  cores/lm32/rtl/lm32_icache.v
@@ -888,7 +888,8 @@ begin
888 888
 						$display("it's an INVALIDATE ENTRY at %t", $time);
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 `endif
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 						itlb_flushing <= 1;
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-						itlb_flush_set <= itlb_update_vaddr_csr_reg[`LM32_ITLB_IDX_RNG];
  891
+//						itlb_flush_set <= itlb_update_vaddr_csr_reg[`LM32_ITLB_IDX_RNG];
  892
+						itlb_flush_set <= csr_write_data[`LM32_ITLB_IDX_RNG];
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 						itlb_updating <= 0;
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 						itlb_state <= `LM32_TLB_STATE_CHECK;
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 					end
14  software/libbase/mmu.c
@@ -47,18 +47,18 @@ unsigned int mmu_map(unsigned int vaddr, unsigned int paddr, char metadata) {
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 		{
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 			puts("Already mapped, updating metadata !");
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 			mappings[i].metadata |= metadata;
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-//			if (mappings[i].metadata & ITLB_MAPPING)
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-//				mmu_itlb_map(vaddr, paddr);
  50
+			if (mappings[i].metadata & ITLB_MAPPING)
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+				mmu_itlb_map(vaddr, paddr);
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 			if (mappings[i].metadata & DTLB_MAPPING)
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 				mmu_dtlb_map(vaddr, paddr);
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 			return 1;
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 		} else if ((vaddr == mappings[i].vaddr) && (paddr != mappings[i].paddr) && (mappings[i].metadata & MAPPING_IS_VALID))
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 		{
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-			puts("Vaddr already mapped to another Paddr (0x%08X), overwritting...\n", mappings[i].paddr);
  57
+			printf("Vaddr already mapped to another Paddr (0x%08X), overwritting...\n", mappings[i].paddr);
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 			mappings[i].paddr = paddr;
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 			mappings[i].metadata = (metadata | MAPPING_IS_VALID);
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-//			if (mappings[i].metadata & ITLB_MAPPING)
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-//				mmu_itlb_map(vaddr, paddr);
  60
+			if (mappings[i].metadata & ITLB_MAPPING)
  61
+				mmu_itlb_map(vaddr, paddr);
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 			if (mappings[i].metadata & DTLB_MAPPING)
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 				mmu_dtlb_map(vaddr, paddr);
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 			return 1;
@@ -75,8 +75,8 @@ unsigned int mmu_map(unsigned int vaddr, unsigned int paddr, char metadata) {
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 	mappings[empty_slot].paddr = paddr;
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 	mappings[empty_slot].metadata = (metadata | MAPPING_IS_VALID);
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-//	if (metadata & ITLB_MAPPING)
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-//		mmu_itlb_map(vaddr, paddr);
  78
+	if (metadata & ITLB_MAPPING)
  79
+		mmu_itlb_map(vaddr, paddr);
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 	if (metadata & DTLB_MAPPING)
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 		mmu_dtlb_map(vaddr, paddr);
18  software/libhal/mmu.c
@@ -56,27 +56,33 @@ inline void mmu_itlb_map(unsigned int vpfn, unsigned int pfn)
56 56
 
57 57
 inline void mmu_dtlb_invalidate_line(unsigned int vaddr)
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 {
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-	asm volatile ("ori %0, %0, 0x21\n\t"
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-		      "wcsr tlbvaddr, %0" :: "r"(vaddr) : );
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+	vaddr |= 0x21;
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+	asm volatile ("wcsr tlbvaddr, %0" :: "r"(vaddr) : );
61 61
 }
62 62
 
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 inline void mmu_itlb_invalidate_line(unsigned int vaddr)
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 {
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-	asm volatile ("ori %0, %0, 0x20\n\t"
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-		      "wcsr tlbvaddr, %0" :: "r"(vaddr) : );
  65
+	vaddr |= 0x20;
  66
+	asm volatile ("wcsr tlbvaddr, %0" :: "r"(vaddr) : );
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 }
68 68
 
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 inline void mmu_dtlb_invalidate(void)
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 {
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-	register unsigned int cmd = DTLB_CTRL_FLUSH_CMD;
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+//	register unsigned int cmd = DTLB_CTRL_FLUSH_CMD;
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 //	asm volatile("wcsr tlbctrl, %0" :: "r"(cmd) : );
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+	asm volatile("xor r11, r11, r11\n\t"
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+		     "ori r11, r11, 0x3\n\t"
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+		     "wcsr tlbvaddr, r11" ::: "r11");
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 }
75 78
 
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 inline void mmu_itlb_invalidate(void)
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 {
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-	register unsigned int cmd = ITLB_CTRL_FLUSH_CMD;
  81
+//	register unsigned int cmd = ITLB_CTRL_FLUSH_CMD;
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 //	asm volatile("wcsr tlbctrl, %0" :: "r"(cmd) : );
  83
+	asm volatile("xor r11, r11, r11\n\t"
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+		     "ori r11, r11, 0x2\n\t"
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+		     "wcsr tlbvaddr, r11" ::: "r11");
80 86
 
81 87
 }
82 88
 

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