32 arch/arm/mach-tegra/io.c
View file
@@ -55,24 +55,6 @@ static struct map_desc tegra_io_desc[] __initdata = {
.length = IO_IRAM_SIZE,
.type = MT_DEVICE,
},
{
.virtual = IO_HOST1X_VIRT,
.pfn = __phys_to_pfn(IO_HOST1X_PHYS),
.length = IO_HOST1X_SIZE,
.type = MT_DEVICE,
},
{
.virtual = IO_USB_VIRT,
.pfn = __phys_to_pfn(IO_USB_PHYS),
.length = IO_USB_SIZE,
.type = MT_DEVICE,
},
{
.virtual = IO_SDMMC_VIRT,
.pfn = __phys_to_pfn(IO_SDMMC_PHYS),
.length = IO_SDMMC_SIZE,
.type = MT_DEVICE,
},
};

void __init tegra_map_common_io(void)
@@ -86,20 +68,8 @@ void __init tegra_map_common_io(void)
void __iomem *tegra_ioremap(unsigned long p, size_t size, unsigned int type)
{
void __iomem *v = IO_ADDRESS(p);

/*
* __arm_ioremap fails to set the domain of ioremapped memory
* correctly, only use it on physical memory.
*/
if (v == NULL && p < SZ_1G)
if (v == NULL)
v = __arm_ioremap(p, size, type);

/*
* If the physical address was not physical memory or statically
* mapped, there's nothing we can do to map it safely.
*/
BUG_ON(v == NULL);

return v;
}
EXPORT_SYMBOL(tegra_ioremap);
10 arch/arm/mach-tegra/iovmm.c
View file
@@ -72,9 +72,6 @@ static LIST_HEAD(iovmm_groups);
static DEFINE_MUTEX(iovmm_list_lock);
static struct kmem_cache *iovmm_cache;

int nvmap_get_unpinned_iovmm_memory(int *total_unpinned_mem,
int *largest_unpinned_mem);

static tegra_iovmm_addr_t iovmm_align_up(struct tegra_iovmm_device *dev,
tegra_iovmm_addr_t addr)
{
@@ -130,7 +127,6 @@ static int tegra_iovmm_read_proc(char *page, char **start, off_t off,
struct iovmm_share_group *grp;
tegra_iovmm_addr_t max_free, total_free, total;
unsigned int num, num_free;
unsigned int total_unpinned, largest_unpinned;

int len = 0;

@@ -151,12 +147,6 @@ static int tegra_iovmm_read_proc(char *page, char **start, off_t off,
len += iovmprint("\t\tsize: %uKiB free: %uKiB "
"largest: %uKiB (%u free / %u total blocks)\n",
total, total_free, max_free, num_free, num);
nvmap_get_unpinned_iovmm_memory(&total_unpinned,
&largest_unpinned);
len += iovmprint("\t\tunpinned:total=%uKiB, "
"largest=%uKiB, pinned:total=%uKiB\n",
total_unpinned, largest_unpinned,
(total - total_free - total_unpinned));
}
}
mutex_unlock(&iovmm_list_lock);
9 arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_clock_config.c
View file
@@ -540,7 +540,7 @@ Ap20EmcTimingSet(

for (i = 0; i < s_Ap20EmcConfig.EmcTimingRegNum; i++)
{
//20110218, cs77.ha@lge.com, DVFS patch [START]
//20110218, , DVFS patch [START]
#if 1
if (s_Ap20EmcConfig.pEmcTimingReg[i] == EMC_DLL_XFORM_DQS_0)
{
@@ -554,7 +554,7 @@ Ap20EmcTimingSet(
#else
if (i == EMC_CFG_DIG_DLL_INDEX)
#endif
//20110218, cs77.ha@lge.com, DVFS patch [END]
//20110218, , DVFS patch [END]
d = pEmcConfig->EmcDigDll;
else
d = pEmcConfig->pOdmEmcConfig->EmcTimingParameters[i];
@@ -584,17 +584,12 @@ Ap20EmcTimingSetFinish(
return;

a = (((NvU32)(s_pEmcBaseReg)) + EMC_INTSTATUS_0);
//20110318, jm1.lee@lge.com, nVidia recommandation for no LCD response [START]
#if 0
for (;;)
{
d = NV_DRF_VAL(EMC, INTSTATUS, CLKCHANGE_COMPLETE_INT, NV_READ32(a));
if (d)
break;
}
#endif
NvOsWaitUS(10);
//20110318, jm1.lee@lge.com, nVidia recommandation for no LCD response [END]

a = (((NvU32)(s_pEmcBaseReg)) + EMC_CFG_DIG_DLL_0);
NV_WRITE32(a, pEmcConfig->EmcDigDll);
3 arch/arm/mach-tegra/nvrm/core/common/nvrm_power_dfs.c
View file
@@ -2730,6 +2730,9 @@ void NvRmPrivDfsSuspend(NvOdmSocPowerState state)
NV_MAX(pDvs->DvsCorner.EmcMv,
pDvs->DvsCorner.ModulesMv));

// faux123: add back the check against min core voltage
v = NV_MAX(v, pDvs->MinCoreMv);

// If CPU rail returns to default level by PMU underneath DVFS
// need to synchronize voltage after LP1 same way as after LP2
if (pDvs->VCpuOTPOnWakeup)
4 arch/arm/mach-tegra/nvrm/dispatch/NvRm_Dispatch.c
View file
@@ -179,8 +179,8 @@ static NvU32 s_FuncAllowedInNvrmModulePackage =
(0 << 4) | //err_ = NvRmModuleResetWithHold_dispatch_( InBuffer, InSize, OutBuffer, OutSize, Ctx );
(0 << 3) | //err_ = NvRmModuleReset_dispatch_( InBuffer, InSize, OutBuffer, OutSize, Ctx );
(1 << 2) | //err_ = NvRmModuleGetNumInstances_dispatch_( InBuffer, InSize, OutBuffer, OutSize, Ctx );
(1 << 1) | //err_ = NvRmModuleGetBaseAddress_dispatch_( InBuffer, InSize, OutBuffer, OutSize, Ctx );
(1 << 0); //err_ = NvRmModuleGetModuleInfo_dispatch_( InBuffer, InSize, OutBuffer, OutSize, Ctx );
(0 << 1) | //err_ = NvRmModuleGetBaseAddress_dispatch_( InBuffer, InSize, OutBuffer, OutSize, Ctx );
(0 << 0); //err_ = NvRmModuleGetModuleInfo_dispatch_( InBuffer, InSize, OutBuffer, OutSize, Ctx );

static NvU32 s_FuncAllowedInNvrmInitPackage =
(1 << 3) | //err_ = NvRmClose_dispatch_( InBuffer, InSize, OutBuffer, OutSize, Ctx );
278 arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c
View file

Large diffs are not rendered by default.

40 arch/arm/mach-tegra/nvrm_user.c
View file
@@ -27,18 +27,9 @@
#include <linux/platform_device.h>
#include <linux/suspend.h>
#include <linux/percpu.h>
#include <linux/kthread.h>
#include <linux/delay.h>
#include <linux/io.h>
//+++ INKSPOT: 22/june/2011 - to check NVRM response time
#include <linux/time.h>
//--- INKSPOT: 22/june/2011
#ifdef CONFIG_HAS_EARLYSUSPEND
#include <linux/earlysuspend.h>
#endif

#include <mach/io.h>

#include "nvcommon.h"
#include "nvassert.h"
#include "nvos.h"
@@ -77,8 +68,7 @@ extern void NvRmPrivDvsRun(void);

//Variables for AVP suspend operation
extern NvRmDeviceHandle s_hRmGlobal;
extern NvRmPrivLockSharedPll();
extern NvRmPrivUnlockSharedPll();

static NvRtHandle s_RtHandle = NULL;

#define DEVICE_NAME "nvrm"
@@ -215,7 +205,7 @@ int nvrm_open(struct inode *inode, struct file *file)

priv->su = (file->f_op == &knvrm_fops);
file->private_data = priv;

return 0;
}

@@ -577,19 +567,15 @@ nvrm_notifier_store(struct kobject *kobj, struct kobj_attribute *attr,
}

static struct kobj_attribute nvrm_notifier_attribute =
__ATTR(notifier, 0664, nvrm_notifier_show, nvrm_notifier_store);
__ATTR(notifier, 0666, nvrm_notifier_show, nvrm_notifier_store);

//
// PM notifier
//

static void notify_daemon(const char* notice)
{
//+++ INKSPOT; 23/june/2011, Change from NV #842311
long timeout = HZ * 150;
struct timeval t;
struct tm result;
//--- INKSPOT
long timeout = HZ * 30;

// In case daemon's pid is not reported, do not signal or wait.
if (!s_nvrm_daemon_pid) {
@@ -608,19 +594,7 @@ static void notify_daemon(const char* notice)
printk(KERN_INFO "%s: wait for nvrm_daemon\n", __func__);
if (wait_event_timeout(tegra_pm_notifier_wait,
tegra_pm_notifier_continue_ok, timeout) == 0) {
//+++ INKSPOT : 23/june/2011 - To check response time from NVRM
do_gettimeofday(&t);
time_to_tm(t.tv_sec, 0, &result);
printk("Time: %ld-%d-%d %d:%d:%d \n",
(result.tm_year + 1900),
(result.tm_mon + 1),
result.tm_mday,
result.tm_hour,
result.tm_min,
result.tm_sec);
//--- INKSPOT :
printk(KERN_ERR "%s: timed out. nvrm_daemon did not reply\n", __func__);
panic("BUG!");
}

// Go back to the initial state.
@@ -635,13 +609,11 @@ int tegra_pm_notifier(struct notifier_block *nb,
// Notify the event to nvrm_daemon.
switch (event) {
case PM_SUSPEND_PREPARE:
NvRmPrivLockSharedPll();
NvRmPrivDvsStop();
NvRmPrivUnlockSharedPll();
#ifndef CONFIG_HAS_EARLYSUSPEND
notify_daemon(STRING_PM_DISPLAY_OFF);
#endif
notify_daemon(STRING_PM_SUSPEND_PREPARE);
NvRmPrivDvsStop();
break;
case PM_POST_SUSPEND:
notify_daemon(STRING_PM_POST_SUSPEND);
@@ -734,7 +706,7 @@ nvrm_core_lock_store(struct kobject *kobj, struct kobj_attribute *attr,
}

static struct kobj_attribute nvrm_core_lock_attribute =
__ATTR(core_lock, 0664, nvrm_core_lock_show, nvrm_core_lock_store);
__ATTR(core_lock, 0666, nvrm_core_lock_show, nvrm_core_lock_store);

#endif

257 arch/arm/mach-tegra/odm_kit/star/adaptations/pmu/max8907/max8907.c
View file

Large diffs are not rendered by default.

18 arch/arm/mach-tegra/odm_kit/star/adaptations/pmu/max8907/max8907_rtc.c
View file
@@ -136,7 +136,7 @@ Max8907RtcAlarmCountRead(
NvOdmPmuDeviceHandle hDevice,
NvU32* Count)
{
//20100928, byoungwoo.yoon@lge.com, RTC alarm enable [START]
//20100928, , RTC alarm enable [START]
NvU32 data = 0;
NvU32 BcdHours, BcdMinutes, BcdSeconds;
NvU32 Hours, Minutes, Seconds;
@@ -207,7 +207,7 @@ Max8907RtcAlarmCountRead(
}
NVODMPMU_PRINTF(("\n *Count=0x%x ", *Count));
return NV_TRUE;
//20100928, byoungwoo.yoon@lge.com, RTC alarm enable [END]
//20100928, , RTC alarm enable [END]

}

@@ -293,7 +293,7 @@ Max8907RtcAlarmCountWrite(
NvOdmPmuDeviceHandle hDevice,
NvU32 Count)
{
//20100928, byoungwoo.yoon@lge.com, RTC alarm enable [START]
//20100928, , RTC alarm enable [START]
NvU32 BcdHours, BcdMinutes, BcdSeconds;
NvU32 data = 0;
NvU8 BcdDD, BcdMM, BcdYY1, BcdYY2;
@@ -364,15 +364,15 @@ Max8907RtcAlarmCountWrite(
NVODMPMU_PRINTF(("\n [Alarm] Max8907RtcCountWrite() error. "));
return NV_FALSE;
}
//20100928, byoungwoo.yoon@lge.com, RTC alarm enable [END]
//20100928, , RTC alarm enable [END]

return NV_TRUE;
return NV_FALSE;
}

NvBool
Max8907RtcIsAlarmIntEnabled(NvOdmPmuDeviceHandle hDevice)
{
//20100928, byoungwoo.yoon@lge.com, RTC alarm enable [START]
//20100928, , RTC alarm enable [START]
NvU8 data = 0;
NVODMPMU_PRINTF(("\n [Alarm] Max8907RtcIsAlarmIntEnabled() "));
if (Max8907RtcI2cRead8(hDevice, MAX8907_ALARM0_CNTL, &data))
@@ -391,7 +391,7 @@ Max8907RtcIsAlarmIntEnabled(NvOdmPmuDeviceHandle hDevice)
}

NVODMPMU_PRINTF(("\n [Alarm] Max8907I2cRead32() error. "));
//20100928, byoungwoo.yoon@lge.com, RTC alarm enable [END]
//20100928, , RTC alarm enable [END]

return NV_FALSE;
}
@@ -401,7 +401,7 @@ Max8907RtcAlarmIntEnable(
NvOdmPmuDeviceHandle hDevice,
NvBool Enable)
{
//20100928, byoungwoo.yoon@lge.com, RTC alarm enable [START]
//20100928, , RTC alarm enable [START]
NvU8 data = 0;

NVODMPMU_PRINTF(("\n [Alarm] Max8907RtcAlarmIntEnable() "));
@@ -415,7 +415,7 @@ Max8907RtcAlarmIntEnable(
}

NVODMPMU_PRINTF(("\n [Alarm] Error !! : Max8907I2cWrite32() "));
//20100928, byoungwoo.yoon@lge.com, RTC alarm enable [END]
//20100928, , RTC alarm enable [END]

return NV_FALSE;
}
34 arch/arm/mach-tegra/odm_kit/star/adaptations/pmu/max8907/max8907_supply_info_table.h
View file
@@ -33,15 +33,13 @@ extern "C"
#define MAX8907_REQUESTVOLTAGE_LX_V2 1200
#define MAX8907_REQUESTVOLTAGE_LX_V3 1800

//20100413, cs77.ha@lge.com, add [START]
//20100413, , add [START]
#if defined(CONFIG_MACH_STAR)
#define MAX8907_REQUESTVOLTAGE_LDO1 3300 //DDRx 3.3V
#define MAX8907_REQUESTVOLTAGE_LDO2 1100 //PLL 1.1V
#define MAX8907_REQUESTVOLTAGE_LDO3 1800 //LCD 1.8V
#define MAX8907_REQUESTVOLTAGE_LDO4 3300 //USB
//emmc : for voltage margin
//#define MAX8907_REQUESTVOLTAGE_LDO5 2800
#define MAX8907_REQUESTVOLTAGE_LDO5 3000 //2800->3000
#define MAX8907_REQUESTVOLTAGE_LDO5 2800 //emmc
#define MAX8907_REQUESTVOLTAGE_LDO6 1800 //HDMI_PLL
#define MAX8907_REQUESTVOLTAGE_LDO7 3000 //SENSOR_3V
#define MAX8907_REQUESTVOLTAGE_LDO8 1800 //SENSOR_1.8V
@@ -57,17 +55,11 @@ extern "C"
#define MAX8907_REQUESTVOLTAGE_LDO18 1800 //VI 1.8V
#define MAX8907_REQUESTVOLTAGE_LDO19 1800 //TOUCH 1.8V
#define MAX8907_REQUESTVOLTAGE_LDO20 0
/*
//20110420 srinivas.mittapallli@lge.com Key LED brihtness Reduce to 700ua from 1ma
#define MAX8907_REQUESTVOLTAGE_WLED 0x07 //0x0A //0x0A(1mA) <- 0x14(2mA) <- 0x46(7mA) <- 0x64(10mA) : 0x00(0.1mA)~0xff(25.5mA)
*/
// LGE_CHANGE_S youngseok.jeong@lge.com LED brightness to 2mA
#define MAX8907_REQUESTVOLTAGE_WLED 0x14 //0x0A(1mA) <- 0x14(2mA) <- 0x46(7mA) <- 0x64(10mA) : 0x00(0.1mA)~0xff(25.5mA)
// LGE_CHANGE_E youngseok.jeong@lge.com LED brightness to 2mA
#define MAX8907_REQUESTVOLTAGE_WLED 0x14 //0x14(2mA) <- 0x46(7mA) <- 0x64(10mA) : 0x00(0.1mA)~0xff(25.5mA)
#else
#error "NOT SURPORTED!!!"
#endif
//20100413, cs77.ha@lge.com, add [END]
//20100413, , add [END]

#define MAX8907_REQUESTVOLTAGE_EXT_DCDC_1 5000 // Fixed
#define MAX8907_REQUESTVOLTAGE_EXT_DCDC_2 0 // Reserved
@@ -108,14 +100,14 @@ extern "C"
// is fixed at max. Turn Off time is "just in case" placeholder - no need
// for s/w to track when output capacitors are discharged.

//20100811 cs77.ha@lge.com CPU power patch [START]
//20100811 CPU power patch [START]
#define MAX8952_SCALE_UP_UV_PER_US (16000) // 16mv per 1us
//20100811 cs77.ha@lge.com CPU power patch [END]
//20100811 CPU power patch [END]
#define MAX8907_SCALE_UP_UV_PER_US (2500)
#define MAX8907_TURN_ON_TIME_US (3000)
#define MAX8907_TURN_OFF_TIME_US (20)

//20100413, cs77.ha@lge.com, add
//20100413, , add
#define MAX8907_INVALID_PORT 0xff

// Output voltages supplied by PMU
@@ -156,13 +148,13 @@ typedef enum
#if defined(CONFIG_MACH_STAR)
/*-- White LED --*/
Max8907PmuSupply_WHITE_LED, // (Boost WLED)
//20100413, cs77.ha@lge.com, add [START]
//20100413, , add [START]
Max8907PmuSupply_SOC,
Max8907PmuSupply_reset,
//20100413, cs77.ha@lge.com, add [END]
//20100413, , add [END]
#endif

//20100413, cs77.ha@lge.com, add [START]
//20100413, , add [START]
#ifndef CONFIG_MACH_STAR
/*-- External DC/DC switcher --*/
Max8907PmuSupply_EXT_DCDC_1, // EXT_DC/DC1
@@ -186,7 +178,7 @@ typedef enum
// potentiometer (DPM) AD5258
Max8907LxV1_Ad5258_DPM_EXT_DCDC_7,
#endif
//20100413, cs77.ha@lge.com, add [END],
//20100413, , add [END],

#if 0
//Temp for enabling fuse using p2 of i0 expander
@@ -196,11 +188,11 @@ typedef enum
// MAX8952 for VDD CPU
Max8907PmuSupply_EXT_DCDC_8_CPU,

//20110131, byoungwoo.yoon@lge.com, Stop i2c comm during reset [START]
//20110131, , Stop i2c comm during reset [START]
#if defined(CONFIG_MACH_STAR)
Max8907PmuSupply_Stop_i2c_Flag,
#endif
//20110131, byoungwoo.yoon@lge.com, Stop i2c comm during reset [END]
//20110131, , Stop i2c comm during reset [END]

Max8907PmuSupply_Num,
Max8907PmuSupply_Force32 = 0x7FFFFFFF
106 arch/arm/mach-tegra/odm_kit/star/platform/touch/nvodm_touch_synaptics.c
View file
@@ -44,9 +44,9 @@ Date Author Descriptions
#include "nvos.h"


// 20100413 joseph.jung@lge.com for Touch Firmware Upgrade [START]
// 20100413 for Touch Firmware Upgrade [START]
#include "synaptics_ts_firmware.h"
// 20100413 joseph.jung@lge.com for Touch Firmware Upgrade [END]
// 20100413 for Touch Firmware Upgrade [END]


////////////////////////////////////////////////////////////////////
@@ -69,17 +69,17 @@ Date Author Descriptions

#define SYNAPTICS_FINGER_MAX 10

// 20100929 joseph.jung@lge.com Ghost finger solution is applied to a ver. 4 or later for P999DW [START]
// 20100929 Ghost finger solution is applied to a ver. 4 or later for P999DW [START]
#define SYNAPTICS_MELT_SUPPORT_VER 4
// 20100929 joseph.jung@lge.com Ghost finger solution is applied to a ver. 4 or later for P999DW [END]
// 20100929 Ghost finger solution is applied to a ver. 4 or later for P999DW [END]


// 20101130 joseph.jung@lge.com Touch Panel is changed and base f/w version is 11 from Rev 1.0 for P999 [START]
// 20101130 Touch Panel is changed and base f/w version is 11 from Rev 1.0 for P999 [START]
#define SYNAPTICS_NEW_PANEL_BASE_FW_VER 11
// 20101130 joseph.jung@lge.com Touch Panel is changed and base f/w version is 11 from Rev 1.0 for P999 [END]
// 20101130 Touch Panel is changed and base f/w version is 11 from Rev 1.0 for P999 [END]


#undef SYNAPTICS_SUPPORT_FW_UPGRADE
#define SYNAPTICS_SUPPORT_FW_UPGRADE

#undef SYNAPTICS_SUPPORT_CAL // Use for only resistive touch

@@ -88,13 +88,13 @@ Date Author Descriptions
/////////////// Synaptics EVENT Define //////////////////
////////////////////////////////////////////////////////////////////

// 20101022 joseph.jung@lge.com touch smooth moving improve
// 20101022 touch smooth moving improve
#ifdef FEATURE_LGE_TOUCH_MOVING_IMPROVE
#define SYNAPTICS_DELTA_THRESHOLD 0x01
#else
#define SYNAPTICS_DELTA_THRESHOLD 0x05
#endif /* FEATURE_LGE_TOUCH_MOVING_IMPROVE */
// 20101022 joseph.jung@lge.com touch smooth moving improve
// 20101022 touch smooth moving improve

////////////////////////////////////////////////////////////////////
/////////////// Synaptics Control & Data Register //////////////////
@@ -130,13 +130,13 @@ Date Author Descriptions
#define SYNAPTICS_FLASH_QUERY_BASE_REG 0xE9
#define SYNAPTICS_FLASH_DATA_BASE_REG 0xEC

// 20100929 joseph.jung@lge.com Ghost finger solution = touch f/w [START]
// 20100929 Ghost finger solution = touch f/w [START]
#define SYNAPTICS_MELT_CONTROL_REG 0xF0

#define SYNAPTICS_NO_MELT_MODE 0
#define SYNAPTICS_MELT_MODE 1<<0
#define SYNAPTICS_AUTO_MELT_MODE 1<<1
// 20100929 joseph.jung@lge.com Ghost finger solution = touch f/w [END]
// 20100929 Ghost finger solution = touch f/w [END]

#define SYNAPTICS_INT_FLASH 1<<0
#define SYNAPTICS_INT_STATUS 1<<1
@@ -162,7 +162,7 @@ Date Author Descriptions
////////////////// Synaptics Data from Register ////////////////////
////////////////////////////////////////////////////////////////////

// 20100319 joseph.jung@lge.com Positon Conversion : Panel resolution -> LCD resolution [START]
// 20100319 Positon Conversion : Panel resolution -> LCD resolution [START]
#ifdef FEATURE_LGE_TOUCH_CUSTOMIZE
// convert reported coordinates, X : 1036 -> 479, Y : 1681 -> 799 (1728 -> 903)
#define TS_SNTS_GET_X_POSITION(high_reg, low_reg) \
@@ -175,7 +175,7 @@ Date Author Descriptions
#define TS_SNTS_GET_Y_POSITION(high_reg, low_reg) \
((int)((high_reg << 4) & 0x000007F0) | (int)((low_reg >> 4) & 0x0F))
#endif /* FEATURE_LGE_TOUCH_CUSTOMIZE */
// 20100319 joseph.jung@lge.com Positon Conversion : Panel resolution -> LCD resolution [END]
// 20100319 Positon Conversion : Panel resolution -> LCD resolution [END]

#define TS_SNTS_HAS_PINCH(gesture_reg) \
((gesture_reg&0x40)>>6)
@@ -249,9 +249,9 @@ typedef struct Synaptics_TouchDeviceRec
NvU32 I2cVddId;
NvU8 FirmwareRevId;
NvU32 I2cClockSpeedKHz;
// 20100929 joseph.jung@lge.com Ghost finger solution = touch f/w [START]
// 20100929 Ghost finger solution = touch f/w [START]
NvU8 MeltType;
// 20100929 joseph.jung@lge.com Ghost finger solution = touch f/w [START]
// 20100929 Ghost finger solution = touch f/w [START]
} Synaptics_TouchDevice;


@@ -283,14 +283,14 @@ static synaptics_ts_sensor_data ts_reg_data={0};
static synaptics_ts_finger_data curr_ts_data;
static synaptics_ts_finger_data prev_ts_data;

// 20101223 joseph.jung@lge.com improve ghost finger avoid algorithm [START]
// 20101223 improve ghost finger avoid algorithm [START]
static int synaptics_ts_melting_count = 0;
static NvBool synaptics_ts_melting_enable = NV_TRUE;

static NvU32 synaptics_ts_melting_check_time;

static NvBool synaptics_ts_first_finger_pressed = NV_FALSE;
// 20101223 joseph.jung@lge.com improve ghost finger avoid algorithm [END]
// 20101223 improve ghost finger avoid algorithm [END]



@@ -488,12 +488,7 @@ static NvBool Synaptics_GetSamples (Synaptics_TouchDevice* hTouch, NvOdmTouchCoo
{
curr_ts_data.X_position[i] = (int)TS_SNTS_GET_X_POSITION(ts_reg_data.fingers_data[i][0], ts_reg_data.fingers_data[i][2]);
curr_ts_data.Y_position[i] = (int)TS_SNTS_GET_Y_POSITION(ts_reg_data.fingers_data[i][1], ts_reg_data.fingers_data[i][2]);
// yehan.ahn@lge.com 2011/06/22 GB bug start
if(curr_ts_data.X_position[i] == 0)
curr_ts_data.X_position[i] = 1;
if(curr_ts_data.Y_position[i] == 0)
curr_ts_data.Y_position[i] = 1;
// yehan.ahn@lge.com 2011/06/22 end

if ((((ts_reg_data.fingers_data[i][3] & 0xf0) >> 4) - (ts_reg_data.fingers_data[i][3] & 0x0f)) > 0)
curr_ts_data.width[i] = (ts_reg_data.fingers_data[i][3] & 0xf0) >> 4;
else
@@ -530,7 +525,7 @@ static NvBool Synaptics_GetSamples (Synaptics_TouchDevice* hTouch, NvOdmTouchCoo
}
}
}
// 20101223 joseph.jung@lge.com improve ghost finger avoidance algorithm [START]
// 20101223 improve ghost finger avoidance algorithm [START]
if(hTouch->FirmwareRevId >= SYNAPTICS_MELT_SUPPORT_VER && hTouch->MeltType == SYNAPTICS_MELT_MODE)
{
if((coord->additionalInfo.Fingers > 1) || (coord->additionalInfo.Fingers == 1 && coord->additionalInfo.multi_fingerstate[0] == 0))
@@ -569,7 +564,7 @@ static NvBool Synaptics_GetSamples (Synaptics_TouchDevice* hTouch, NvOdmTouchCoo
else
synaptics_ts_first_finger_pressed = NV_FALSE;
}
// 20101223 joseph.jung@lge.com improve ghost finger avoidance algorithm [END]
// 20101223 improve ghost finger avoidance algorithm [END]
}

//NVODMTOUCH_PRINTF(("[Touch Driver] Synaptics_GetSamples [END]\n"));
@@ -578,7 +573,7 @@ static NvBool Synaptics_GetSamples (Synaptics_TouchDevice* hTouch, NvOdmTouchCoo
}


// 20100906 joseph.jung@lge.com for Touch Firmware Version Check [START]
// 20100906 for Touch Firmware Version Check [START]
static NvBool Synaptics_GetFWVersion(Synaptics_TouchDevice* hTouch)
{
NvU8 RMI_Query_BaseAddr;
@@ -594,19 +589,19 @@ static NvBool Synaptics_GetFWVersion(Synaptics_TouchDevice* hTouch)
if(Synaptics_ReadRegisterSafe (hTouch, FWVersion_Addr, (NvU8*)(&hTouch->FirmwareRevId), sizeof(hTouch->FirmwareRevId)))
{
printk("[TOUCH] Touch controller Firmware Version = %x\n", hTouch->FirmwareRevId);
// 20100906 joseph.jung@lge.com Touch F/W version [START]
// 20100906 Touch F/W version [START]
storeTouchFWversion(hTouch->FirmwareRevId);
// 20100906 joseph.jung@lge.com Touch F/W version [END]
// 20100906 Touch F/W version [END]
return NV_TRUE;
}
else
return NV_FALSE;
}
// 20100906 joseph.jung@lge.com for Touch Firmware Version Check [END]
// 20100906 for Touch Firmware Version Check [END]



// 20100413 joseph.jung@lge.com for Touch Firmware Upgrade [START]
// 20100413 for Touch Firmware Upgrade [START]
#ifdef SYNAPTICS_SUPPORT_FW_UPGRADE
static unsigned long ExtractLongFromHeader(const NvU8 *SynaImage) // Endian agnostic
{
@@ -702,7 +697,7 @@ static NvBool Synaptics_UpgradeFirmware(Synaptics_TouchDevice* hTouch)


//////////////////////// F/W Version Check ///////////////////////////
// 20101129 joseph.jung@lge.com Touch F/W upgrade is supported for Rev 1.0 or later for P999 [START]
// 20101129 Touch F/W upgrade is supported for Rev 1.0 or later for P999 [START]
#if defined(TMUS_10)
Synaptics_GetFWVersion(hTouch);

@@ -718,7 +713,7 @@ static NvBool Synaptics_UpgradeFirmware(Synaptics_TouchDevice* hTouch)
printk("[Touch Driver] Synaptics_UpgradeFirmware : Do not support anymore under Rev 1.0!!!!\n");
return NV_TRUE;
#endif
// 20101129 joseph.jung@lge.com Touch F/W upgrade is supported for Rev 1.0 or later for P999 [END]
// 20101129 Touch F/W upgrade is supported for Rev 1.0 or later for P999 [END]


//////////////////////// Configuration ///////////////////////////
@@ -1025,7 +1020,7 @@ static NvBool Synaptics_UpgradeFirmware(Synaptics_TouchDevice* hTouch)
return NV_TRUE;
}
#endif
// 20100413 joseph.jung@lge.com for Touch Firmware Upgrade [END]
// 20100413 for Touch Firmware Upgrade [END]



@@ -1048,9 +1043,9 @@ static void Synaptics_InitOdmTouch (NvOdmTouchDevice* Dev)
#endif /* SYNAPTICS_SUPPORT_CAL */
Dev->CurrentSampleRate = SYNAPTICS_HIGH_SAMPLE_RATE;
Dev->OutputDebugMessage = NV_FALSE;
// 20101020 joseph.jung@lge.com Interrupt Enable/Disable [START]
// 20101020 Interrupt Enable/Disable [START]
Dev->InterruptMask = Synaptics_InterruptMask;
// 20101020 joseph.jung@lge.com Interrupt Enable/Disable [END]
// 20101020 Interrupt Enable/Disable [END]
}


@@ -1072,7 +1067,7 @@ static NvBool Synaptics_Init(Synaptics_TouchDevice* hTouch)
prev_ts_data.pressure[i] = curr_ts_data.pressure[i] = 0;
}

// 20100929 joseph.jung@lge.com Ghost finger solution = touch f/w [START]
// 20100929 Ghost finger solution = touch f/w [START]
if(hTouch->FirmwareRevId >= SYNAPTICS_MELT_SUPPORT_VER)
{
NvU8 melt_mode = SYNAPTICS_MELT_MODE;
@@ -1081,23 +1076,23 @@ static NvBool Synaptics_Init(Synaptics_TouchDevice* hTouch)
}
else
hTouch->MeltType = SYNAPTICS_MELT_MODE;
// 20100929 joseph.jung@lge.com Ghost finger solution = touch f/w [END]
// 20100929 Ghost finger solution = touch f/w [END]

Synaptics_ReadRegisterSafe (hTouch, SYNAPTICS_DATA_BASE_REG, (NvU8*)(&ts_reg_data), sizeof(ts_reg_data));

// 20100402 joseph.jung@lge.com Touch Register Setting [START]
// 20100402 Touch Register Setting [START]
Synaptics_WriteRegister(hTouch, SYNAPTICS_DELTA_X_THRES_REG, SYNAPTICS_DELTA_THRESHOLD); // Delta X
Synaptics_WriteRegister(hTouch, SYNAPTICS_DELTA_Y_THRES_REG, SYNAPTICS_DELTA_THRESHOLD); // Delta Y
// 20100402 joseph.jung@lge.com Touch Register Setting [END]
// 20100402 Touch Register Setting [END]

// 20101228 joseph.jung@lge.com improve ghost finger avoidance algorithm [START]
// 20101228 improve ghost finger avoidance algorithm [START]
Synaptics_WriteRegister(hTouch, 0x5B, 0x00); // 2d gesture enable1 = not use
Synaptics_WriteRegister(hTouch, 0x5C, 0x00); // 2d gesture enable2 = not use
// 20101228 joseph.jung@lge.com improve ghost finger avoidance algorithm [END]
// 20101228 improve ghost finger avoidance algorithm [END]

// 20110120 joseph.jung@lge.com change to continuous mode by appl. request [START]
// 20110120 change to continuous mode by appl. request [START]
Synaptics_WriteRegister(hTouch, 0x51, 0x08);
// 20110120 joseph.jung@lge.com change to continuous mode by appl. request [END]
// 20110120 change to continuous mode by appl. request [END]

return NV_TRUE;
}
@@ -1109,8 +1104,8 @@ NvBool Synaptics_Open (NvOdmTouchDeviceHandle* hDevice, NvOdmOsSemaphoreHandle*
NvU32 i;
NvU32 found = 0;

NvU16 SENSOR_MAX_X_POSITION = LGE_TOUCH_RESOLUTION_X;
NvU16 SENSOR_MAX_Y_POSITION = LGE_TOUCH_RESOLUTION_Y;
NvU16 SENSOR_MAX_X_POSITION = LGE_TOUCH_RESOLUTION_X-1;
NvU16 SENSOR_MAX_Y_POSITION = LGE_TOUCH_RESOLUTION_Y-1;

const NvOdmPeripheralConnectivity *pConnectivity = NULL;

@@ -1230,12 +1225,12 @@ NvBool Synaptics_Open (NvOdmTouchDeviceHandle* hDevice, NvOdmOsSemaphoreHandle*
hTouch->I2cClockSpeedKHz = SYNAPTICS_I2C_SPEED_KHZ;
NVODMTOUCH_PRINTF(("[TOUCH] i2c speed = %d\n", hTouch->I2cClockSpeedKHz));

// 20100413 joseph.jung@lge.com for Touch Firmware Upgrade [START]
// 20100413 for Touch Firmware Upgrade [START]
#ifdef SYNAPTICS_SUPPORT_FW_UPGRADE
if(Synaptics_UpgradeFirmware(hTouch) == NV_FALSE)
goto fail;
#endif
// 20100413 joseph.jung@lge.com for Touch Firmware Upgrade [END]
// 20100413 for Touch Firmware Upgrade [END]

/* get chip revision id */
Synaptics_GetFWVersion(hTouch);
@@ -1292,7 +1287,7 @@ void Synaptics_Close (NvOdmTouchDeviceHandle hDevice)
NvOdmOsFree(hTouch);
}

// 20101020 joseph.jung@lge.com Interrupt Enable/Disable [START]
// 20101020 Interrupt Enable/Disable [START]
void Synaptics_InterruptMask(NvOdmTouchDeviceHandle hDevice, NvBool mask)
{
/*
@@ -1307,7 +1302,7 @@ void Synaptics_InterruptMask(NvOdmTouchDeviceHandle hDevice, NvBool mask)
printk("[TOUCH] Synaptics_InterruptMask by %d\n", mask);
}
}
// 20101020 joseph.jung@lge.com Interrupt Enable/Disable [END]
// 20101020 Interrupt Enable/Disable [END]



@@ -1443,7 +1438,6 @@ NvBool Synaptics_PowerOnOff (NvOdmTouchDeviceHandle hDevice, NvBool OnOff)
if (settletime)
NvOdmOsWaitUS(settletime); // wait to settle power

NvOdmOsWaitUS(10*1000); //10ms
hTouch->PowerOn = OnOff;
}

@@ -1459,10 +1453,10 @@ NvBool Synaptics_PowerControl (NvOdmTouchDeviceHandle hDevice, NvOdmTouchPowerMo
NvU8 SleepMode;
NvU8 DeviceControl;

// 20100920 joseph.jung@lge.com ESD Issue [START]
// 20100920 ESD Issue [START]
NvU8 configValueX;
NvU8 configValueY;
// 20100920 joseph.jung@lge.com ESD Issue [END]
// 20100920 ESD Issue [END]

if (!hTouch)
return NV_FALSE;
@@ -1491,7 +1485,7 @@ NvBool Synaptics_PowerControl (NvOdmTouchDeviceHandle hDevice, NvOdmTouchPowerMo
else
hTouch->SleepMode = (NvU32)SleepMode;

// 20100920 joseph.jung@lge.com ESD Issue [START]
// 20100920 ESD Issue [START]
if(mode == NvOdmTouch_PowerMode_0)
{
Synaptics_ReadRegisterSafe (hTouch, SYNAPTICS_DELTA_X_THRES_REG, (NvU8*)(&configValueX), sizeof(configValueX));
@@ -1504,14 +1498,14 @@ NvBool Synaptics_PowerControl (NvOdmTouchDeviceHandle hDevice, NvOdmTouchPowerMo
if(configValueY != SYNAPTICS_DELTA_THRESHOLD)
return NV_FALSE;
}
// 20100920 joseph.jung@lge.com ESD Issue [END]
// 20100920 ESD Issue [END]

if(Synaptics_ReadRegisterSafe (hTouch, SYNAPTICS_DEVICE_CONTROL_REG, (NvU8*)(&DeviceControl), sizeof(DeviceControl)))
printk("Synaptics Device Control Read Success\n");
if(Synaptics_WriteRegister(hTouch, SYNAPTICS_DEVICE_CONTROL_REG, ((DeviceControl & 0xFC) | SleepMode)))
printk("Synaptics Device Control Write Success\n");

// 20101223 joseph.jung@lge.com improve ghost finger avoidance algorithm [START]
// 20101223 improve ghost finger avoidance algorithm [START]
if(!SleepMode && hTouch->FirmwareRevId >= SYNAPTICS_MELT_SUPPORT_VER)
{
if(Synaptics_WriteRegister(hTouch, SYNAPTICS_MELT_CONTROL_REG, SYNAPTICS_MELT_MODE))
@@ -1524,7 +1518,7 @@ NvBool Synaptics_PowerControl (NvOdmTouchDeviceHandle hDevice, NvOdmTouchPowerMo
synaptics_ts_melting_enable = NV_TRUE;
}
}
// 20101223 joseph.jung@lge.com improve ghost finger avoidance algorithm [END]
// 20101223 improve ghost finger avoidance algorithm [END]

return NV_TRUE;
}
24 arch/arm/mach-tegra/odm_kit/star/query/nvodm_query.c
View file
@@ -37,6 +37,10 @@
*
* @b Description: Implements the query functions for ODMs that may be
* accessed at boot-time, runtime, or anywhere in between.
*
* faux123: revert back to Froyo Settings. LGE has performed a COMPLETE UTTER FAIL for
* changing the settings for the SDRAM parameters which caused freezes and Sleep of Deaths.
*
*/

#include <star_hw_definition.h>
@@ -112,11 +116,11 @@ static const NvOdmSdramControllerConfigAdv s_NvOdmStarSmartphoneHynixEmcConfigTa
0x00000008, /* TCLKSTABLE */
0x00000002, /* TCLKSTOP */
0x0000004b, /* TREFBW */
0x00000000, /* QUSE_EXTRA */
0x00000004, /* QUSE_EXTRA */
0x00000003, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
0x00000282, /* FBIO_CFG5 */
0x00000082, /* FBIO_CFG5 */
0xa06804ae, /* CFG_DIG_DLL */
0x0001f000, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */
@@ -166,11 +170,11 @@ static const NvOdmSdramControllerConfigAdv s_NvOdmStarSmartphoneHynixEmcConfigTa
0x00000008, /* TCLKSTABLE */
0x00000002, /* TCLKSTOP */
0x00000071, /* TREFBW */
0x00000000, /* QUSE_EXTRA */
0x00000004, /* QUSE_EXTRA */
0x00000003, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
0x00000282, /* FBIO_CFG5 */
0x00000082, /* FBIO_CFG5 */
0xa06804ae, /* CFG_DIG_DLL */
0x0001f000, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */
@@ -220,11 +224,11 @@ static const NvOdmSdramControllerConfigAdv s_NvOdmStarSmartphoneHynixEmcConfigTa
0x00000008, /* TCLKSTABLE */
0x00000002, /* TCLKSTOP */
0x000000e1, /* TREFBW */
0x00000000, /* QUSE_EXTRA */
0x00000005, /* QUSE_EXTRA */
0x00000000, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
0x00000282, /* FBIO_CFG5 */
0x00000082, /* FBIO_CFG5 */
0xa06804ae, /* CFG_DIG_DLL */
0x0001f000, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */
@@ -274,11 +278,11 @@ static const NvOdmSdramControllerConfigAdv s_NvOdmStarSmartphoneHynixEmcConfigTa
0x00000008, /* TCLKSTABLE */
0x00000002, /* TCLKSTOP */
0x000001c2, /* TREFBW */
0x00000000, /* QUSE_EXTRA */
0x00000005, /* QUSE_EXTRA */
0x00000001, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
0x00000282, /* FBIO_CFG5 */
0x00000082, /* FBIO_CFG5 */
0xa06804ae, /* CFG_DIG_DLL */
0x007f9010, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */
@@ -328,11 +332,11 @@ static const NvOdmSdramControllerConfigAdv s_NvOdmStarSmartphoneHynixEmcConfigTa
0x00000008, /* TCLKSTABLE */
0x00000002, /* TCLKSTOP */
0x00000270, /* TREFBW */
0x00000000, /* QUSE_EXTRA */
0x00000005, /* QUSE_EXTRA */
0x00000001, /* FBIO_CFG6 */
0x00000000, /* ODT_WRITE */
0x00000000, /* ODT_READ */
0x00000282, /* FBIO_CFG5 */
0x00000082, /* FBIO_CFG5 */
0xa04c04ae, /* CFG_DIG_DLL */
0x007fb010, /* DLL_XFORM_DQS */
0x00000000, /* DLL_XFORM_QUSE */
85 .../mach-tegra/odm_kit/star/query/subboards/nvodm_query_discovery_starsmartphone_addresses.h
View file
@@ -43,7 +43,7 @@
#include "pmu/max8907/max8907_supply_info_table.h"
#include "tmon/adt7461/nvodm_tmon_adt7461.h"

//20100426 sk.hwang@lge.com For global definition
//20100426 For global definition
//#include <star_global_definition.h>
#include <star_hw_definition.h>
#include <star_pinmux_definition.h>
@@ -62,29 +62,29 @@ static const NvOdmIoAddress s_lge_Tmon0Addresses[] =
#endif

#if defined(CONFIG_MACH_STAR)
//20100413, cs77.ha@lge.com, power off [START]
//20100413, , power off [START]
static const NvOdmIoAddress s_lge_SocOdmAddresses[] =
{
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_SOC, 0 },
};
//20100413, cs77.ha@lge.com, power off [END]
//20100413, , power off [END]

//20100703, cs77.ha@lge.com, power reset [START]
//20100703, , power reset [START]
static const NvOdmIoAddress s_lge_PowerResetAddresses[] =
{
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_reset, 0 },
};
//20100703, cs77.ha@lge.com, power reset [END]
//20100703, , power reset [END]
#endif

//20100413, cs77.ha@lge.com, powerkey [START]
//20100413, , powerkey [START]
#if defined(CONFIG_MACH_STAR)
static const NvOdmIoAddress s_lge_PowerKeyAddresses[] =
{
{ NvOdmIoModule_Gpio, 'v' - 'a' , 2, 0 },
};
#endif
//20100413, cs77.ha@lge.com, powerkey [END]
//20100413, , powerkey [END]

static const NvOdmIoAddress s_lge_HdmiAddresses[] =
{
@@ -125,13 +125,13 @@ static const NvOdmIoAddress s_lge_CoreAddresses[] =
// CPU voltage rail
static const NvOdmIoAddress s_lge_CpuAddresses[] =
{
//20100725 taewan.kim@lge.com add MAX8907C FEATURE [START]
//20100725 add MAX8907C FEATURE [START]
#if defined(CONFIG_MACH_STAR)
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_EXT_DCDC_8_CPU, 0 }, /* VDD_CPU_PMU -> V1 */
#else
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LX_V1, 0 }, /* VDD_CPU_PMU -> V1 */
#endif
//20100725 taewan.kim@lge.com add MAX8907C FEATURE [END]
//20100725 add MAX8907C FEATURE [END]
};
#endif

@@ -338,16 +338,16 @@ static const NvOdmIoAddress s_lge_SdioAddresses[] =
{ NvOdmIoModule_Sdio, 0x3, 0x0, 0 }, // eMMC
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LDO12, 0 }, // 2.8V microSD(VDDIO_SDIO)
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LX_V3, 0 }, // 1.8V eMMC VCCQ & microSD detect(VDDIO_NAND)
//20100727 cs77.ha@lge.com it should be always on for (a03 deepsleep isseu) work around [START]
//20100727 it should be always on for (a03 deepsleep isseu) work around [START]
#if defined(CONFIG_MACH_STAR)
//do nothing
#else
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LDO5, 0 }, // eMMC 2.8V VCC
#endif
//20100727 cs77.ha@lge.com it should be always on for (a03 deepsleep isseu) work around [END]
//20100727 it should be always on for (a03 deepsleep isseu) work around [END]
};

//Vibrator sk.hwang@lge.com for vibrator
//Vibrator for vibrator
static const NvOdmIoAddress s_lge_VibAddresses[] =
{
{ NvOdmIoModule_Vdd, 0x0, Max8907PmuSupply_LDO13, 0 }, // VCC_MOTOR_3V0
@@ -365,7 +365,7 @@ static const NvOdmIoAddress s_lge_AccelerometerAddresses[] =
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LDO8 , 0 }, /* LDO8 1.8V VCC_SENSOR_1V8*/
};

//Compass sk.hwang@lge.com
//Compass
static const NvOdmIoAddress s_lge_CompassAddresses[] =
{
{ NvOdmIoModule_I2c, 0x01, 0x0e, 0 }, /* I2C device address is 0x0F */
@@ -382,7 +382,7 @@ static const NvOdmIoAddress s_lge_GyroAddresses[] =
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LDO8 , 0 }, /* LDO8 1.8V VCC_SENSOR_1V8*/
};

//Proximity sk.hwang@lge.com
//Proximity
static const NvOdmIoAddress s_lge_ProximityAddresses[] =
{
{ NvOdmIoModule_I2c, 0x01, 0x44, 0 }, /* I2C device address is 0x44 */
@@ -391,7 +391,6 @@ static const NvOdmIoAddress s_lge_ProximityAddresses[] =
#elif defined (CONFIG_MACH_STAR_TMUS_E)
{ NvOdmIoModule_Gpio, 'w' - 'a', 2, 0 },
#else
#error PROXI_OUT PIN not assigned
{ NvOdmIoModule_Gpio, 'a' - 'a', 0, 0 },
#endif
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LDO7 , 0 }, /* LDO8 1.8V VCC_SENSOR_1V8*/
@@ -413,15 +412,15 @@ static const NvOdmIoAddress s_lge_MainDisplayAddresses[] =
{
{ NvOdmIoModule_Display, 0, 0, 0 },
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LX_V3, 0 }, /* VDDIO_LCD -> V3 */
//20100725 taewan.kim@lge.com add CPU Interface [START]
//20100725 add CPU Interface [START]
#if defined(CONFIG_MACH_STAR)
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LDO3 , 0 }, // NVVDD_LDO3_1V8
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LDO14 , 0 }, // NVVDD_LDO14_2V8
#else
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LDO17 , 0 }, /* MIPI DSI 1.2V */
{ NvOdmIoModule_Gpio, (NvU32)('v' - 'a'), 7, 0 },
#endif
//20100725 taewan.kim@lge.com add CPU Interface [END]
//20100725 add CPU Interface [END]
};

#if 0
@@ -444,7 +443,7 @@ static const NvOdmIoAddress s_lge_TouchPanelAddresses[] =
#endif

#if defined(CONFIG_MACH_STAR)
// 20100527 joseph.jung@lge.com Synaptics/Cypress Touch support [START]
// 20100527 Synaptics/Cypress Touch support [START]
static const NvOdmIoAddress s_lge_SynapticsTouchAddresses[] =
{
{ NvOdmIoModule_I2c, 0x00, 0x20, 0 }, /* GEN1_I2C instance = 0x00, Touch IC I2C Address = 0x20 */
@@ -460,10 +459,10 @@ static const NvOdmIoAddress s_lge_CypressTouchAddresses[] =
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LDO10, 0 }, // TOUCH_VCC_3V1
{ NvOdmIoModule_I2c_Pmu, 0x00, Max8907PmuSupply_LDO19, 0 }, // TOUCH_I2C_1V8
};
// 20100527 joseph.jung@lge.com Synaptics/Cypress Touch support [END]
// 20100527 Synaptics/Cypress Touch support [END]
#endif

// 20100401 taewan.kim@lge.com MUIC driver [START]
// 20100401 MUIC driver [START]
#if defined (CONFIG_MACH_STAR)
static const NvOdmIoAddress s_lge_MuicAddresses[] =
{
@@ -478,9 +477,9 @@ static const NvOdmIoAddress s_lge_MuicAddresses[] =
#endif
};
#endif
// 20100401 taewan.kim@lge.com MUIC driver [END]
// 20100401 MUIC driver [END]

//20100609, jh.ahn@lge.com, Charger IC Driver [START]
//20100609, , Charger IC Driver [START]
#if defined (CONFIG_MACH_STAR)
static const NvOdmIoAddress s_lge_ChargerAddresses[] =
{
@@ -489,35 +488,35 @@ static const NvOdmIoAddress s_lge_ChargerAddresses[] =
{ NvOdmIoModule_Gpio, 'q' - 'a', 2, 0 }, /* CHG_PGB_N */
};
#endif
//20100609, jh.ahn@lge.com, Charger IC Driver [END]
//20100609, , Charger IC Driver [END]

static const NvOdmIoAddress s_lge_BackLightAddresses[] =
{
{ NvOdmIoModule_I2c, 0x00, 0xC0, 0 }, /* GEN1_I2C instance = 0x00, AAT2870 I2C Address = 0xC0 */
{ NvOdmIoModule_Gpio, 'r' - 'a', 3, 0 }, /* GPIO Port R and Pin 3 */
};

//20100424, bojung.ko@lge.com, RIL code from firenze [START]
//20100424, , RIL code from firenze [START]
#if defined (CONFIG_MACH_STAR)
static const NvOdmIoAddress s_lge_SpiAddresses[] =
{
//20100729-1, syblue.lee@lge.com, Crazy!!, it changed [START]
//20100729-1, , Crazy!!, it changed [START]
{ NvOdmIoModule_Gpio, 'u' - 'a', 6, 0}, //SRDY1 //{ NvOdmIoModule_Gpio, 'o' - 'a', 5}, //SRDY2
{ NvOdmIoModule_Gpio, 'j' - 'a', 6, 0}, //MRDY1//{ NvOdmIoModule_Gpio, 'o' - 'a', 0}, //MRDY2
//20100729, syblue.lee@lge.com, Crazy!!, it changed [END]
//20100711-1, syblue.lee@lge.com, Add spi controller 0 and chip select 0 [START]
//20100729, , Crazy!!, it changed [END]
//20100711-1, , Add spi controller 0 and chip select 0 [START]
{ NvOdmIoModule_Spi, AP20_SPI1, 0x0, 0 }, /* Spi Controller 0 and Chip Select 0 */
//20100711, syblue.lee@lge.com, Add spi controller 0 and chip select 0 [END]
//20100809-1, syblue.lee@lge.com, Add SPI2 for AP-CP IPC [START]
//20100711, , Add spi controller 0 and chip select 0 [END]
//20100809-1, , Add SPI2 for AP-CP IPC [START]
#ifdef CONFIG_DUAL_SPI
{ NvOdmIoModule_Gpio, 'o' - 'a', 5, 0}, //SRDY2
{ NvOdmIoModule_Gpio, 'o' - 'a', 0, 0}, //MRDY2
{ NvOdmIoModule_Spi, AP20_SPI2, 0x0, 0}, /* Spi Controller 1 and Chip Select 0 */
#endif
//20100809, syblue.lee@lge.com, Add SPI2 for AP-CP IPC [END]
//20100809, , Add SPI2 for AP-CP IPC [END]
};
#endif
//20100424, bojung.ko@lge.com, RIL code from firenze [END]
//20100424, , RIL code from firenze [END]

// Bluetooth
static const NvOdmIoAddress s_lge_BluetoothAddresses[] =
@@ -528,7 +527,7 @@ static const NvOdmIoAddress s_lge_BluetoothAddresses[] =
#elif defined (CONFIG_MACH_STAR_TMUS_E)
{ NvOdmIoModule_Gpio, 'z' - 'a', 2, 0 }, // bt_en
#else
#error BT_EN pin not assigned
{ NvOdmIoModule_Gpio, 'q' - 'a', 4, 0 }, // bt_en
#endif
{ NvOdmIoModule_Gpio, 'c' - 'a', 7, 0 }, // bt_host_wakeup
{ NvOdmIoModule_Gpio, 'x' - 'a', 4, 0 }, // bt_wakeup
@@ -543,14 +542,14 @@ static const NvOdmIoAddress s_lge_WlanAddresses[] =
#elif defined (CONFIG_MACH_STAR_TMUS_E)
{ NvOdmIoModule_Gpio, 'w' - 'a', 1 }, // wlan_en
#else
#error WLAN_EN pin not assigned
{ NvOdmIoModule_Gpio, 'q' - 'a', 3, 0 }, // wlan_en
#endif
{ NvOdmIoModule_Gpio, 's' - 'a', 0, 0 }, // wlan_host_wakeup
{ NvOdmIoModule_Gpio, 'g' - 'a', 2, 0 }, // wlan_wakeup
};


//20100421 bergkamp.cho@lge.com [LGE_START]
//20100421 [LGE_START]
#if defined (CONFIG_MACH_STAR)
static const NvOdmIoAddress s_lge_HeadsetAddresses[] =
{
@@ -559,9 +558,9 @@ static const NvOdmIoAddress s_lge_HeadsetAddresses[] =
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LDO12, 0 }, // hook detection power rail
};
#endif /* CONFIG_MACH_STAR */
//20100421 bergkamp.cho@lge.com [LGE_END]
//20100421 [LGE_END]

//20100730 kyungsik.lee@lge.com [LGE_START]
//20100730 [LGE_START]
#if defined (CONFIG_MACH_STAR)
static const NvOdmIoAddress s_lge_CPdeviceAddresses[] =
{
@@ -572,7 +571,7 @@ static const NvOdmIoAddress s_lge_CPdeviceAddresses[] =
#endif /* CONFIG_SPI_MDM6600 */
};
#endif /* CONFIG_MACH_STAR */
//20100730 kyungsik.lee@lge.com [LGE_END]
//20100730 [LGE_END]


typedef enum
@@ -623,26 +622,26 @@ static const NvOdmIoAddress s_lge_KeyPadAddresses[] =
{ NvOdmIoModule_Kbd, 0x01, NvOdmKbcGpioPin_KBCol1, 0 }, // Column 1
};

//LGE_UPDATE_S neo.shin@lge.com 2010-05-024 GPS UART & GPIO Setting
//LGE_UPDATE_S 2010-05-024 GPS UART & GPIO Setting
static const NvOdmIoAddress s_lge_GPSAddresses[] =
{
{ NvOdmIoModule_Uart, 0x3, 0x0, 0 }, //Instance 3 means UART4.
{ NvOdmIoModule_Gpio, 'j' - 'a', 0, 0 }, // GPIO_PJ0- reset
{ NvOdmIoModule_Gpio, 'j' - 'a', 2, 0 }, // GPIO_PJ2 -poweron
{ NvOdmIoModule_Gpio, 'd' - 'a', 0, 0 }, // GPIO_PD0 -External LNA
};
//LGE_UPDATE_E neo.shin@lge.com 2010-05-024 GPS UART & GPIO Setting
//LGE_UPDATE_E 2010-05-024 GPS UART & GPIO Setting


//20100611, cs77.ha@lge.com, Touch LED [START]
//20100611, , Touch LED [START]
static const NvOdmIoAddress s_lge_TouchLEDAddresses[] =
{
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_WHITE_LED, 0 }, //Touch LED
};
//20100611, cs77.ha@lge.com, Touch LED [END]
//20100611, , Touch LED [END]


//20100603, cs77.ha@lge.com, star pmic [START]
//20100603, , star pmic [START]
#ifdef CONFIG_STAR_PMIC
static const NvOdmIoAddress s_lge_AllRailAddresses[] =
{
@@ -668,5 +667,5 @@ static const NvOdmIoAddress s_lge_AllRailAddresses[] =
{ NvOdmIoModule_Vdd, 0x00, Max8907PmuSupply_LDO20, 0 },
};
#endif
//20100603, cs77.ha@lge.com, star pmic [END]
//20100603, , star pmic [END]

65 arch/arm/mach-tegra/suspend.c
View file
@@ -47,7 +47,6 @@
#include <nvrm_memmgr.h>
#include <nvrm_power_private.h>
#include "nvrm/core/common/nvrm_message.h"
#include "nvrm_module.h"

#include "power.h"
#include "board.h"
@@ -69,16 +68,14 @@ struct suspend_context
volatile struct suspend_context tegra_sctx;
bool core_lock_on = false;

unsigned long save_avp_resume_addr = 0;

#ifdef CONFIG_HOTPLUG_CPU
extern void tegra_board_nvodm_suspend(void);
extern void tegra_board_nvodm_resume(void);

static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
static void __iomem *clk_rst = IO_ADDRESS(TEGRA_CLK_RESET_BASE);
static void __iomem *flow_ctrl = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE);
static void __iomem *evp_reset = IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100;
static void __iomem *evp_reset = IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE)+0x100;
static void __iomem *tmrus = IO_ADDRESS(TEGRA_TMRUS_BASE);
#endif

@@ -203,6 +200,7 @@ static void set_power_timers(unsigned long us_on, unsigned long us_off)
* disable periodic IRQs used for DVFS to prevent suspend wakeups
* disable coresight debug interface
*
*
*/
static noinline void restore_cpu_complex(bool wait_plls)
{
@@ -415,46 +413,6 @@ static unsigned int iram_save_size = 0;
static void __iomem *iram_code = IO_ADDRESS(TEGRA_IRAM_CODE_AREA);
static void __iomem *iram_avp_resume = IO_ADDRESS(TEGRA_IRAM_BASE);

#define TEGRA_AVP_RESET_VECTOR_ADDR \
(IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x200)
#define FLOW_CTRL_HALT_COP_EVENTS IO_ADDRESS(TEGRA_FLOW_CTRL_BASE + 0x4)
#define FLOW_MODE_STOP (0x2 << 29)
#define FLOW_MODE_NONE 0x0

int tegra_avp_resume(unsigned long reset_addr)
{
int ret = 0;
unsigned long timeout;

/* stop AVP via flow controller */
writel(FLOW_MODE_STOP, FLOW_CTRL_HALT_COP_EVENTS);

/* program AVP reset vector with resume address */
writel(reset_addr, TEGRA_AVP_RESET_VECTOR_ADDR);

/* reset AVP */
NvRmModuleReset(s_hRmGlobal, NvRmModuleID_Avp);

/* unhalt AVP via flow controller */
writel(FLOW_MODE_NONE, FLOW_CTRL_HALT_COP_EVENTS);

/* the AVP firmware will reprogram its reset vector as the kernel
* starts, so a dead kernel can be detected by polling this value */
timeout = jiffies + msecs_to_jiffies(2000);
while (time_before(jiffies, timeout)) {
if (readl(TEGRA_AVP_RESET_VECTOR_ADDR) != reset_addr)
break;
cpu_relax();
}

/* check if AVP firmware reprogrammed it reset vector or not
* if not notify this error */
if (readl(TEGRA_AVP_RESET_VECTOR_ADDR) == reset_addr)
ret = -EINVAL;

return ret;
}

static void tegra_suspend_dram(bool lp0_ok)
{
static unsigned long cpu_timer_32k = 0;
@@ -498,11 +456,11 @@ static void tegra_suspend_dram(bool lp0_ok)
} else {
NvRmPrivPowerSetState(s_hRmGlobal, NvRmPowerState_LP0);

//20110213, cs77.ha@lge.com, sched_clock mismatch issue after deepsleep [START]
//20110213, , sched_clock mismatch issue after deepsleep [START]
#if defined(CONFIG_MACH_STAR)
tegra_lp0_sched_clock_clear();
#endif
//20110213, cs77.ha@lge.com, sched_clock mismatch issue after deepsleep [END]
//20110213, , sched_clock mismatch issue after deepsleep [END]

mode |= TEGRA_POWER_CPU_PWRREQ_OE;
mode |= TEGRA_POWER_PWRREQ_OE;
@@ -673,21 +631,17 @@ static int tegra_suspend_prepare_late(void)
return -EIO;
}

/* write 0 to PMC_SCRATCH39 so that AVP halts after WB0 resume
* we resume AVP after the basic resume on CPU is done */
writel(0, pmc + PMC_SCRATCH39);
save_avp_resume_addr = *((volatile unsigned int *)iram_avp_resume);
rmb();

/* The AVP stores its resume address in the first word of IRAM
* Write this resume address to SCRATCH39, where the warmboot
* code can later find it */
writel(*(volatile unsigned int *)iram_avp_resume, pmc + PMC_SCRATCH39);
#endif
disable_irq(INT_SYS_STATS_MON);
return tegra_iovmm_suspend();
}

static void tegra_suspend_wake(void)
{
int ret = 0;

tegra_iovmm_resume();
enable_irq(INT_SYS_STATS_MON);

@@ -701,9 +655,6 @@ static void tegra_suspend_wake(void)
}
tegra_board_nvodm_resume();
#endif
ret = tegra_avp_resume(save_avp_resume_addr);
if (ret < 0)
pr_err("%s: AVP failed to resume\n", __func__);
}

extern void __init lp0_suspend_init(void);
36 drivers/input/keyboard/gpio_keys.c
View file
@@ -38,21 +38,6 @@ struct gpio_keys_drvdata {
struct gpio_button_data data[0];
};

// 20110602 rajat.suri/srinivas.mittapalli Safe modepatch
// LGE_CHANGE_S [yehan.ahn@lge.com] 2011-05-24, [P999GB] for enable the saving-mode
int saved_key = 0;

ssize_t get_saved_key(struct device *dev, struct device_attribute *attr, char *buf)
{
sprintf(buf, "%d\n", saved_key);
pr_info("YDK get_saved_key > saved_key =%s\n", buf);
return (ssize_t)(strlen(buf)+1);
}

DEVICE_ATTR(key_saving, 0664, get_saved_key, NULL);
//permission for user is changed only to read from 0666 to 0664 as CTS was failing
// LGE_CHANGE_E [yehan.ahn@lge.com] 2011-05-24

static void gpio_keys_report_event(struct work_struct *work)
{
struct gpio_button_data *bdata =
@@ -61,13 +46,6 @@ static void gpio_keys_report_event(struct work_struct *work)
struct input_dev *input = bdata->input;
unsigned int type = button->type ?: EV_KEY;
int state = (gpio_get_value(button->gpio) ? 1 : 0) ^ button->active_low;
// 20110602 rajat.suri/srinivas.mittapalli Safe modepatch
// LGE_CHANGE_S [yehan.ahn@lge.com] 2011-05-24, [P999GB] for enable the saving-mode
if(button->code == KEY_VOLUMEUP) {
pr_info("YDK gpio_keys_report_event > key_volumeup\n");
saved_key = !!state;
}
// LGE_CHANGE_E [yehan.ahn@lge.com] 2011-05-24

input_event(input, type, button->code, !!state);
input_sync(input);
@@ -194,14 +172,7 @@ static int __devinit gpio_keys_probe(struct platform_device *pdev)
}

device_init_wakeup(&pdev->dev, wakeup);
// 20110602 rajat.suri/srinivas.mittapalli Safe modepatch
// LGE_CHANGE_S [yehan.ahn@lge.com] 2011-05-24, [P999GB] for enable the saving-mode
if(device_create_file(&pdev->dev, &dev_attr_key_saving)){
pr_info("YDK __devinit gpio_keys_probe > Unable to make sys_file for key_volumeup\n");
pr_err("tegra-kbc: Unable to make sys_file\n");
goto fail2;
}
// LGE_CHANGE_E [yehan.ahn@lge.com] 2011-05-24

return 0;

fail2:
@@ -240,11 +211,6 @@ static int __devexit gpio_keys_remove(struct platform_device *pdev)
}

input_unregister_device(input);
// 20110602 rajat.suri/srinivas.mittapalli Safe modepatch
// LGE_CHANGE_S [yehan.ahn@lge.com] 2011-05-24, [P999GB] for enable the saving-mode
device_remove_file(&pdev->dev, &dev_attr_key_saving);
pr_info("YDK __devexit gpio_keys_remove > remove sys_file for key_volumeup\n");
// LGE_CHANGE_E [yehan.ahn@lge.com] 2011-05-24

return 0;
}
439 drivers/spi/spi_mdm6600.c
View file

Large diffs are not rendered by default.

150 drivers/spi/tegra_spi_slave.c
View file
@@ -36,17 +36,7 @@

#include <mach/spi.h>
#include <mach/nvrm_linux.h>


// LGE_UPDATE_S eungbo.shim@lge.com ebs 0707
#include <mach/io.h>
#include <nvrm_spi.h>
#include <nvrm_power.h>
#include <nvrm_power_private.h>
// LGE_UPDATE_E eungbo.shim@lge.com ebs 0707



#include <nvodm_query.h>
#include <nvodm_services.h>
#include <nvodm_query_discovery.h>
@@ -99,19 +89,14 @@ static bool bOnce = 0;
//LGE_TELECA_CR:568_DUAL_SPI END

struct tegra_spi {
NvU32 index; //20100811-1, syblue.lee@lge.com, spi dev id
NvU32 index; //20100811-1, , spi dev id
NvRmSpiHandle rm_spi;
NvU32 pinmux;
NvU32 Mode;
struct list_head msg_queue;
LOCK_T lock;
struct work_struct work;
struct workqueue_struct *queue;
// LGE_UPDATE_S eungbo.shim@lge.com ebs 0707

NvU32 RmPowerClientId;
// LGE_UPDATE_E eungbo.shim@lge.com ebs 0707

};

static int spi_shutdown = 0;
@@ -335,11 +320,11 @@ static int tegra_spi_do_message(struct tegra_spi *spi, struct spi_message *m)
#endif
#endif
if(nvErr != NvSuccess)
{ //20110120-1, syblue.lee@lge.com, Add workaround code for short SCK
//printk("%s[ID:%d] : WaitTimeout error %d\n", __FUNCTION__, spi->index, nvErr);
{ //20110120-1, , Add workaround code for short SCK
printk("%s[ID:%d] : WaitTimeout error %d\n", __FUNCTION__, spi->index, nvErr);
NvRmSpiClose(spi->rm_spi);
nvErr = NvRmSpiOpen(s_hRmGlobal, NvOdmIoModule_Spi, spi->index, 0, &spi->rm_spi);
printk("%s[ID:%d] : Recovery NvRmSpi instance Open %d\n", __FUNCTION__, spi->index, nvErr);
printk("%s[ID:%d] : Restart NvRmSpiOpen %d\n", __FUNCTION__, spi->index, nvErr);
break;
}
#if ENABLE_TX_RX_DUMP
@@ -394,77 +379,19 @@ static int tegra_spi_do_message(struct tegra_spi *spi, struct spi_message *m)
static void tegra_spi_workerthread(struct work_struct *w)
{
struct tegra_spi *spi;
// LGE_UPDATE_S eungbo.shim@lge.com ebs 0707
NvRmDfsBusyHint BusyHints[4];
// LGE_UPDATE_E eungbo.shim@lge.com ebs 0707

spi = container_of(w, struct tegra_spi, work);

SPI_DEBUG_PRINT("tegra_spi_transfer start\n");

// LGE_UPDATE_S eungbo.shim@lge.com ebs 0707

BusyHints[0].ClockId = NvRmDfsClockId_Emc;
BusyHints[0].BoostDurationMs = NV_WAIT_INFINITE;
BusyHints[0].BusyAttribute = NV_TRUE;
BusyHints[0].BoostKHz = 150000; // Emc
#if 0
BusyHints[1].ClockId = NvRmDfsClockId_Ahb;
BusyHints[1].BoostDurationMs = NV_WAIT_INFINITE;
BusyHints[1].BusyAttribute = NV_TRUE;
BusyHints[1].BoostKHz = 150000; // AHB

BusyHints[2].ClockId = NvRmDfsClockId_Apb;
BusyHints[2].BoostDurationMs = NV_WAIT_INFINITE;
BusyHints[2].BusyAttribute = NV_TRUE;
BusyHints[2].BoostKHz = 150000; // APB
#else

BusyHints[1].ClockId = NvRmDfsClockId_Ahb;
BusyHints[1].BoostDurationMs = NV_WAIT_INFINITE;
BusyHints[1].BusyAttribute = NV_TRUE;
BusyHints[1].BoostKHz = 120000; // AHB

BusyHints[2].ClockId = NvRmDfsClockId_Apb;
BusyHints[2].BoostDurationMs = NV_WAIT_INFINITE;
BusyHints[2].BusyAttribute = NV_TRUE;
BusyHints[2].BoostKHz = 120000; // APB


#endif
BusyHints[3].ClockId = NvRmDfsClockId_Cpu;
BusyHints[3].BoostDurationMs = NV_WAIT_INFINITE;
BusyHints[3].BusyAttribute = NV_TRUE;
BusyHints[3].BoostKHz = 800000; // CPU

NvRmPowerBusyHintMulti(s_hRmGlobal, spi->RmPowerClientId,
BusyHints, 4, NvRmDfsBusyHintSyncMode_Async);

if (NvRmDfsRunState_ClosedLoop == NvRmDfsGetState(s_hRmGlobal))
{
int wait_count = 500;
/* Wait for the clcok to stabilize */
while ((NvRmPrivDfsGetCurrentKHz(NvRmDfsClockId_Emc) < 150000) && wait_count--)
msleep(1);

BUG_ON(wait_count <= 0);
}

LOCK(spi->lock);

// LGE_UPDATE_E eungbo.shim@lge.com ebs 0707

while (!list_empty(&spi->msg_queue))
{

while (!list_empty(&spi->msg_queue)) {
struct spi_message *m;
// LGE_UPDATE_S eungbo.shim@lge.com ebs 0707
if (spi_shutdown )
{
printk("tegra_spi_workthread stopped\n");
return;
}
// LGE_UPDATE_E eungbo.shim@lge.com ebs 0707
if (spi_shutdown )
{
printk("tegra_spi_workthread stopped\n");
return;
}

m = container_of(spi->msg_queue.next, struct spi_message, queue);
list_del_init(&m->queue);
@@ -481,20 +408,6 @@ static void tegra_spi_workerthread(struct work_struct *w)
}

UNLOCK(spi->lock);

// LGE_UPDATE_S eungbo.shim@lge.com ebs 0707
// ebs 0707
/* Set the clocks to the low corner */
BusyHints[0].BoostKHz = 0; // Emc
BusyHints[1].BoostKHz = 0; // Ahb
BusyHints[2].BoostKHz = 0; // Apb
BusyHints[3].BoostKHz = 0; // Cpu

NvRmPowerBusyHintMulti(s_hRmGlobal, spi->RmPowerClientId, BusyHints, 4, NvRmDfsBusyHintSyncMode_Async);

// LGE_UPDATE_E eungbo.shim@lge.com ebs 0707


SPI_DEBUG_PRINT("tegra_spi_transfer end\n");
}

@@ -549,10 +462,10 @@ static int __init tegra_spi_probe(struct platform_device *pdev)
return -ENOMEM;
}

//20100711-1, syblue.lee@lge.com, add mode_bits [START]
//20100711-1, , add mode_bits [START]
/* the spi->mode bits understood by this driver: */
master->mode_bits = NV_SUPPORTED_MODE_BITS;
//20100711, syblue.lee@lge.com, add mode_bits [END]
//20100711, , add mode_bits [END]

master->setup = tegra_spi_setup;
master->transfer = tegra_spi_transfer;
@@ -564,7 +477,7 @@ static int __init tegra_spi_probe(struct platform_device *pdev)
spi = spi_master_get_devdata(master);

spi->pinmux = plat->pinmux;
spi->index = pdev->id; //20100811-1, syblue.lee@lge.com, Save spi dev id
spi->index = pdev->id; //20100811-1, , Save spi dev id

SPI_DEBUG_PRINT("tegra_spi_probe : NvRmSpiOpen\n");
if (plat->is_slink) {
@@ -586,19 +499,6 @@ static int __init tegra_spi_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "Failed to create work queue\n");
goto workQueueCreate_failed;
}
// LGE_UPDATE_S eungbo.shim@lge.com ebs 0707

// ebs 0707
spi->RmPowerClientId = NVRM_POWER_CLIENT_TAG('S','P','I','S');
if (NvRmPowerRegister(s_hRmGlobal, NULL, &spi->RmPowerClientId))
{
dev_err(&pdev->dev, "Failed to create power client ID\n");
goto workQueueCreate_failed;
}

// ebs 0707

// LGE_UPDATE_E eungbo.shim@lge.com ebs 0707

INIT_WORK(&spi->work, tegra_spi_workerthread);
//LGE_TELECA_CR:568_DUAL_SPI START
@@ -640,12 +540,6 @@ static int tegra_spi_remove(struct platform_device *pdev)
spi = spi_master_get_devdata(master);

spi_unregister_master(master);

// LGE_UPDATE_S eungbo.shim@lge.com ebs 0707
NvRmPowerUnRegister(s_hRmGlobal, spi->RmPowerClientId);
// LGE_UPDATE_E eungbo.shim@lge.com ebs 0707


NvRmSpiClose(spi->rm_spi);
destroy_workqueue(spi->queue);

@@ -715,7 +609,7 @@ static void star_spi_shutdown(struct platform_device *pdev)
printk("star_spi_shutdown : completed\n");
}

//20100607-1, syblue.lee@lge.com, power management [START]
//20100607-1, , power management [START]
#ifdef CONFIG_PM
static int tegra_spi_suspend(struct platform_device *pdev, pm_message_t msg)
{
@@ -724,7 +618,9 @@ static int tegra_spi_suspend(struct platform_device *pdev, pm_message_t msg)

pSpi = dev_get_drvdata(&pdev->dev);
pShimSpi = spi_master_get_devdata(pSpi);
printk("[EBS] ### tegra_spi_suspend() \n");

printk( "tegra_spi_suspend\n"); //syblue.lee 100602 ; test

return 0;
}

@@ -735,11 +631,13 @@ static int tegra_spi_resume(struct platform_device *pdev)

pSpi = dev_get_drvdata(&pdev->dev);
pShimSpi = spi_master_get_devdata(pSpi);
printk("[EBS] ### tegra_spi_resume() \n");

printk( "tegra_spi_resume\n");

return 0;
}
#endif
//20100607, syblue.lee@lge.com, power management [START]
//20100607, , power management [START]
MODULE_ALIAS("platform:tegra_spi");
static struct platform_driver tegra_spi_driver = {
.probe = tegra_spi_probe,
@@ -749,12 +647,12 @@ static struct platform_driver tegra_spi_driver = {
.name = "tegra_spi",
.owner = THIS_MODULE,
},
//20100607-1, syblue.lee@lge.com, power management [START]
//20100607-1, , power management [START]
#ifdef CONFIG_PM
.suspend = tegra_spi_suspend,
.resume = tegra_spi_resume,
#endif
//20100607, syblue.lee@lge.com, power management [START]
//20100607, , power management [START]
};

static int __init tegra_spi_init(void)
@@ -772,6 +670,6 @@ static void __exit tegra_spi_exit(void)
}
module_exit(tegra_spi_exit);

MODULE_AUTHOR("Sangyun Lee, <syblue.lee@lge.com>");
MODULE_AUTHOR("Sangyun Lee, <>");
MODULE_DESCRIPTION("Tegra SPI slave driver");
MODULE_LICENSE("GPL");
12 kernel/freezer.c
View file
@@ -100,28 +100,18 @@ bool freeze_task(struct task_struct *p, bool sig_only)
if (!sig_only || should_send_signal(p))
set_freeze_flag(p);
else
{
if (!strcmp(p->comm, "nvrm_daemon"))
{
pr_err("%s: %s's sig_only: %d\n", __func__, p->comm, sig_only);
pr_err("%s: Setting freeze flag failed\n", p->comm);
}
return false;
}
}

if (should_send_signal(p)) {
if (!signal_pending(p))
fake_signal_wake_up(p);
} else if (sig_only) {
if (!strcmp(p->comm, "nvrm_daemon"))
{
pr_err("%s: %s has PF_FREEZER_NOSIG cleared\n", __func__, p->comm);
}
return false;
} else {
wake_up_state(p, TASK_INTERRUPTIBLE);
}

return true;
}