{"payload":{"header_redesign_enabled":false,"results":[{"id":"80967941","archived":false,"color":"#b2b7f8","followers":2,"has_funding_file":false,"hl_name":"fede2cr/fpga_playground","hl_trunc_description":"Ejemplos en Icestudio para aprender sobre FPGAs","language":"Verilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":80967941,"name":"fpga_playground","owner_id":20340677,"owner_login":"fede2cr","updated_at":"2017-03-11T01:22:56.212Z","has_issues":true}},"sponsorable":false,"topics":["fpga","verilog","icestudio","fpgawars","icestick"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":59,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Afede2cr%252Ffpga_playground%2B%2Blanguage%253AVerilog","metadata":null,"warn_limited_results":false,"csrf_tokens":{"/fede2cr/fpga_playground/star":{"post":"GKa3wlbTV2YnSq2GbQxgezN_J6r8coln_KTdUC6gIBo7XyhyoSs7ONrimP896oUZdeJ9oP4TpADNC-EtdSEzTA"},"/fede2cr/fpga_playground/unstar":{"post":"GBBY7D4tJ87syJShBxvAn904QwYnE43NMIsTSL_2AD6A__vS2ShvyI9wzhYJw3WXvMnW88aSwlZBwe02ECc7aw"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"JoKfv6Cnm73ysnf6frvIMfOW3H2fjMu5QxtMk0cV2SUrYMFGRKCN1ETJSrLKCCXRukfHK5r-FcyNlHN3hFT1ZQ"}}},"title":"Repository search results"}