From e9945dac18c5e3f59991f3bbe6a169a0f981501d Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Thu, 25 Feb 2021 20:00:52 +0000 Subject: [PATCH] Add strategy to remove -retime flag from Vivado --- .../build/scripts/synth_cl_firesim.tcl | 2 +- .../build/scripts/strategy_BASIC.tcl | 2 +- .../build/scripts/strategy_CONGESTION.tcl | 2 +- .../build/scripts/strategy_DEFAULT.tcl | 2 +- .../build/scripts/strategy_EXPLORE.tcl | 2 +- .../build/scripts/strategy_NORETIMING.tcl | 58 +++++++++++++++++++ .../build/scripts/strategy_TIMING.tcl | 2 +- 7 files changed, 64 insertions(+), 6 deletions(-) create mode 100644 hdk/common/shell_v04261818/build/scripts/strategy_NORETIMING.tcl diff --git a/hdk/cl/developer_designs/cl_firesim/build/scripts/synth_cl_firesim.tcl b/hdk/cl/developer_designs/cl_firesim/build/scripts/synth_cl_firesim.tcl index 9490754f..037ec3dd 100644 --- a/hdk/cl/developer_designs/cl_firesim/build/scripts/synth_cl_firesim.tcl +++ b/hdk/cl/developer_designs/cl_firesim/build/scripts/synth_cl_firesim.tcl @@ -117,7 +117,7 @@ puts "AWS FPGA: ([clock format [clock seconds] -format %T]) Start design synthes update_compile_order -fileset sources_1 puts "\nRunning synth_design for $CL_MODULE $CL_DIR/build/scripts \[[clock format [clock seconds] -format {%a %b %d %H:%M:%S %Y}]\]" -eval [concat synth_design -top $CL_MODULE -verilog_define XSDB_SLV_DIS $VDEFINES -part [DEVICE_TYPE] -mode out_of_context $synth_options -directive $synth_directive -retiming] +eval [concat synth_design -top $CL_MODULE -verilog_define XSDB_SLV_DIS $VDEFINES -part [DEVICE_TYPE] -mode out_of_context $synth_options -directive $synth_directive] set failval [catch {exec grep "FAIL" failfast.csv}] if { $failval==0 } { diff --git a/hdk/common/shell_v04261818/build/scripts/strategy_BASIC.tcl b/hdk/common/shell_v04261818/build/scripts/strategy_BASIC.tcl index 4d5f4b13..3069707e 100644 --- a/hdk/common/shell_v04261818/build/scripts/strategy_BASIC.tcl +++ b/hdk/common/shell_v04261818/build/scripts/strategy_BASIC.tcl @@ -16,7 +16,7 @@ source $HDK_SHELL_DIR/build/scripts/params.tcl source $HDK_SHELL_DIR/build/scripts/uram_options.tcl -set synth_options "-keep_equivalent_registers $synth_uram_option" +set synth_options "-keep_equivalent_registers $synth_uram_option -retiming" set synth_directive "default" #Set psip to 1 to enable Physical Synthesis in Placer diff --git a/hdk/common/shell_v04261818/build/scripts/strategy_CONGESTION.tcl b/hdk/common/shell_v04261818/build/scripts/strategy_CONGESTION.tcl index 09a99acd..d145b480 100644 --- a/hdk/common/shell_v04261818/build/scripts/strategy_CONGESTION.tcl +++ b/hdk/common/shell_v04261818/build/scripts/strategy_CONGESTION.tcl @@ -16,7 +16,7 @@ source $HDK_SHELL_DIR/build/scripts/params.tcl source $HDK_SHELL_DIR/build/scripts/uram_options.tcl -set synth_options "-no_lc -shreg_min_size 10 -control_set_opt_threshold 16 $synth_uram_option" +set synth_options "-no_lc -shreg_min_size 10 -control_set_opt_threshold 16 $synth_uram_option -retiming" set synth_directive "AlternateRoutability" #Set psip to 1 to enable Physical Synthesis in Placer diff --git a/hdk/common/shell_v04261818/build/scripts/strategy_DEFAULT.tcl b/hdk/common/shell_v04261818/build/scripts/strategy_DEFAULT.tcl index f1bd24eb..696d64d1 100644 --- a/hdk/common/shell_v04261818/build/scripts/strategy_DEFAULT.tcl +++ b/hdk/common/shell_v04261818/build/scripts/strategy_DEFAULT.tcl @@ -16,7 +16,7 @@ source $HDK_SHELL_DIR/build/scripts/params.tcl source $HDK_SHELL_DIR/build/scripts/uram_options.tcl -set synth_options "-keep_equivalent_registers -flatten_hierarchy rebuilt $synth_uram_option" +set synth_options "-keep_equivalent_registers -flatten_hierarchy rebuilt $synth_uram_option -retiming" set synth_directive "default" #Set psip to 1 to enable Physical Synthesis in Placer diff --git a/hdk/common/shell_v04261818/build/scripts/strategy_EXPLORE.tcl b/hdk/common/shell_v04261818/build/scripts/strategy_EXPLORE.tcl index 17c54eda..2d0dd1e8 100644 --- a/hdk/common/shell_v04261818/build/scripts/strategy_EXPLORE.tcl +++ b/hdk/common/shell_v04261818/build/scripts/strategy_EXPLORE.tcl @@ -16,7 +16,7 @@ source $HDK_SHELL_DIR/build/scripts/params.tcl source $HDK_SHELL_DIR/build/scripts/uram_options.tcl -set synth_options "-keep_equivalent_registers -flatten_hierarchy rebuilt $synth_uram_option" +set synth_options "-keep_equivalent_registers -flatten_hierarchy rebuilt $synth_uram_option -retiming" set synth_directive "default" #Set psip to 1 to enable Physical Synthesis in Placer diff --git a/hdk/common/shell_v04261818/build/scripts/strategy_NORETIMING.tcl b/hdk/common/shell_v04261818/build/scripts/strategy_NORETIMING.tcl new file mode 100644 index 00000000..dcc09bd2 --- /dev/null +++ b/hdk/common/shell_v04261818/build/scripts/strategy_NORETIMING.tcl @@ -0,0 +1,58 @@ +# Amazon FPGA Hardware Development Kit +# +# Copyright 2016 Amazon.com, Inc. or its affiliates. All Rights Reserved. +# +# Licensed under the Amazon Software License (the "License"). You may not use +# this file except in compliance with the License. A copy of the License is +# located at +# +# http://aws.amazon.com/asl/ +# +# or in the "license" file accompanying this file. This file is distributed on +# an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, express or +# implied. See the License for the specific language governing permissions and +# limitations under the License. + +source $HDK_SHELL_DIR/build/scripts/params.tcl +source $HDK_SHELL_DIR/build/scripts/uram_options.tcl + +set synth_options "-no_lc -shreg_min_size 5 -fsm_extraction one_hot -resource_sharing auto $synth_uram_option" +set synth_directive "default" + +#Set psip to 1 to enable Physical Synthesis in Placer +set psip 0 + +set link 1 + +set opt 1 +set opt_options "" +set opt_directive "Explore" +set opt_preHookTcl "$HDK_SHELL_DIR/build/scripts/check_uram.tcl" +set opt_postHookTcl "$HDK_SHELL_DIR/build/scripts/apply_debug_constraints.tcl" + +set place 1 +set place_options "" +set place_directive "ExtraNetDelay_high" +set place_preHookTcl "" +set place_postHookTcl "" + +set phys_opt 1 +set phys_options "" +set phys_directive "" +set phys_directive "AggressiveExplore" +set phys_preHookTcl "" +set phys_postHookTcl "" + +set route 1 +set route_options "-tns_cleanup" +set route_directive "Explore" +set route_preHookTcl "" +set route_postHookTcl "" + +set route_phys_opt 1 +set post_phys_options "" +set post_phys_directive "AggressiveExplore" +set post_phys_preHookTcl "" +set post_phys_postHookTcl "" + + diff --git a/hdk/common/shell_v04261818/build/scripts/strategy_TIMING.tcl b/hdk/common/shell_v04261818/build/scripts/strategy_TIMING.tcl index dcc09bd2..deb1e56c 100644 --- a/hdk/common/shell_v04261818/build/scripts/strategy_TIMING.tcl +++ b/hdk/common/shell_v04261818/build/scripts/strategy_TIMING.tcl @@ -16,7 +16,7 @@ source $HDK_SHELL_DIR/build/scripts/params.tcl source $HDK_SHELL_DIR/build/scripts/uram_options.tcl -set synth_options "-no_lc -shreg_min_size 5 -fsm_extraction one_hot -resource_sharing auto $synth_uram_option" +set synth_options "-no_lc -shreg_min_size 5 -fsm_extraction one_hot -resource_sharing auto $synth_uram_option -retiming" set synth_directive "default" #Set psip to 1 to enable Physical Synthesis in Placer