Added a bridge registry to own all bridge instances (#1369)

firesim · Jan 24, 2023 · c2204d6 · c2204d6
1 parent 70f8996
commit c2204d6
Show file tree

Hide file tree

Showing 47 changed files with 856 additions and 708 deletions.
diff --git a/.clang-tidy b/.clang-tidy
@@ -11,7 +11,7 @@ Checks: >
         bugprone-copy-constructor-init,
         bugprone-dangling-handle,
         bugprone-dynamic-static-initializers,
-        #bugprone-macro-parentheses,
+        bugprone-macro-parentheses,
         bugprone-macro-repeated-side-effects,
         bugprone-misplaced-widening-cast,
         bugprone-move-forwarding-reference,

diff --git a/docs/Golden-Gate/Bridge-Walkthrough.rst b/docs/Golden-Gate/Bridge-Walkthrough.rst
@@ -132,11 +132,11 @@ Registering the Driver
 ++++++++++++++++++++++
 
 With the Bridge Driver implemented, we now have to register it in the main simulator
-simulator class defined in ``sim/src/main/cc/firesim/firesim_top.cc``. Here, we
+simulator class defined in ``sim/midas/src/main/cc/core/constructor.h``. Here, we
 rely on the C preprocessor macros to instantiate the bridge driver only when
 the corresponding BridgeModule is present:
 
-.. literalinclude:: ../../sim/src/main/cc/firesim/firesim_top.cc
+.. literalinclude:: ../../sim/midas/src/main/cc/core/constructor.h
     :language: c++
     :start-after: DOC include start: Bridge Driver Registration
     :end-before: DOC include end: Bridge Driver Registration

diff --git a/sim/make/cpp-lint.mk b/sim/make/cpp-lint.mk
@@ -20,6 +20,7 @@ clang_tidy_files := $(shell \
 		| grep -v firesim_top \
 		| grep -v generated-src \
 		| grep -v output \
+		| grep -v constructor.h \
 )
 
 clang_tidy_flags :=\

diff --git a/sim/midas/src/main/cc/bridges/cpu_managed_stream.cc b/sim/midas/src/main/cc/bridges/cpu_managed_stream.cc
@@ -1,6 +1,7 @@
 #include "cpu_managed_stream.h"
+#include "core/simif.h"
 
-#include <assert.h>
+#include <cassert>
 #include <iostream>
 
 /**
@@ -87,28 +88,19 @@ size_t CPUManagedStreams::FPGAToCPUDriver::pull(void *dest,
   return bytes_read;
 }
 
-CPUManagedStreamWidget::CPUManagedStreamWidget(CPUManagedStreamIO &io) {
-#ifdef CPUMANAGEDSTREAMENGINE_0_PRESENT
-  for (size_t i = 0; i < CPUMANAGEDSTREAMENGINE_0_from_cpu_stream_count; i++) {
+CPUManagedStreamWidget::CPUManagedStreamWidget(
+    CPUManagedStreamIO &io,
+    std::vector<CPUManagedStreams::StreamParameters> &&from_cpu,
+    std::vector<CPUManagedStreams::StreamParameters> &&to_cpu) {
+  for (auto &&params : from_cpu) {
     cpu_to_fpga_streams.push_back(
-        std::make_unique<CPUManagedStreams::CPUToFPGADriver>(
-            CPUManagedStreams::StreamParameters(
-                std::string(CPUMANAGEDSTREAMENGINE_0_from_cpu_names[i]),
-                CPUMANAGEDSTREAMENGINE_0_from_cpu_dma_addrs[i],
-                CPUMANAGEDSTREAMENGINE_0_from_cpu_count_addrs[i],
-                CPUMANAGEDSTREAMENGINE_0_from_cpu_buffer_sizes[i]),
-            io));
+        std::make_unique<CPUManagedStreams::CPUToFPGADriver>(std::move(params),
+                                                             io));
   }
 
-  for (size_t i = 0; i < CPUMANAGEDSTREAMENGINE_0_to_cpu_stream_count; i++) {
+  for (auto &&params : to_cpu) {
     fpga_to_cpu_streams.push_back(
-        std::make_unique<CPUManagedStreams::FPGAToCPUDriver>(
-            CPUManagedStreams::StreamParameters(
-                std::string(CPUMANAGEDSTREAMENGINE_0_to_cpu_names[i]),
-                CPUMANAGEDSTREAMENGINE_0_to_cpu_dma_addrs[i],
-                CPUMANAGEDSTREAMENGINE_0_to_cpu_count_addrs[i],
-                CPUMANAGEDSTREAMENGINE_0_to_cpu_buffer_sizes[i]),
-            io));
+        std::make_unique<CPUManagedStreams::FPGAToCPUDriver>(std::move(params),
+                                                             io));
   }
-#endif // CPUMANAGEDSTREAMENGINE_0_PRESENT
 }
diff --git a/sim/midas/src/main/cc/bridges/cpu_managed_stream.h b/sim/midas/src/main/cc/bridges/cpu_managed_stream.h
@@ -159,7 +159,10 @@ class CPUManagedStreamWidget final : public StreamEngine {
    *
    * @param io Reference to a functor implementing low-level IO.
    */
-  CPUManagedStreamWidget(CPUManagedStreamIO &io);
+  CPUManagedStreamWidget(
+      CPUManagedStreamIO &io,
+      std::vector<CPUManagedStreams::StreamParameters> &&from_cpu,
+      std::vector<CPUManagedStreams::StreamParameters> &&to_cpu);
 };
 
 #endif // __BRIDGES_CPU_MANAGED_STREAM_H
diff --git a/sim/midas/src/main/cc/bridges/fpga_managed_stream.cc b/sim/midas/src/main/cc/bridges/fpga_managed_stream.cc
@@ -56,30 +56,20 @@ void FPGAManagedStreams::FPGAToCPUDriver::flush() {
   }
 }
 
-FPGAManagedStreamWidget::FPGAManagedStreamWidget(FPGAManagedStreamIO &io) {
-#ifdef FPGAMANAGEDSTREAMENGINE_0_PRESENT
-  char *fpga_address_memory_base = io.get_memory_base();
-  auto offset = 0;
+FPGAManagedStreamWidget::FPGAManagedStreamWidget(
+    FPGAManagedStreamIO &io,
+    std::vector<FPGAManagedStreams::StreamParameters> &&to_cpu) {
 
-  for (size_t i = 0; i < FPGAMANAGEDSTREAMENGINE_0_to_cpu_stream_count; i++) {
-    uint32_t buffer_capacity =
-        FPGAMANAGEDSTREAMENGINE_0_to_cpu_fpgaBufferDepth[i];
+  char *fpga_address_memory_base = io.get_memory_base();
+  uint64_t offset = 0;
+  for (auto &&params : to_cpu) {
+    uint32_t capacity = params.buffer_capacity;
     fpga_to_cpu_streams.push_back(
         std::make_unique<FPGAManagedStreams::FPGAToCPUDriver>(
-            FPGAManagedStreams::StreamParameters(
-                std::string(FPGAMANAGEDSTREAMENGINE_0_to_cpu_names[i]),
-                buffer_capacity,
-                FPGAMANAGEDSTREAMENGINE_0_to_cpu_toHostPhysAddrHighAddrs[i],
-                FPGAMANAGEDSTREAMENGINE_0_to_cpu_toHostPhysAddrLowAddrs[i],
-                FPGAMANAGEDSTREAMENGINE_0_to_cpu_bytesAvailableAddrs[i],
-                FPGAMANAGEDSTREAMENGINE_0_to_cpu_bytesConsumedAddrs[i],
-                FPGAMANAGEDSTREAMENGINE_0_to_cpu_toHostStreamDoneInitAddrs[i],
-                FPGAMANAGEDSTREAMENGINE_0_to_cpu_toHostStreamFlushAddrs[i],
-                FPGAMANAGEDSTREAMENGINE_0_to_cpu_toHostStreamFlushDoneAddrs[i]),
+            std::move(params),
             (void *)(fpga_address_memory_base + offset),
             offset,
             io));
-    offset += buffer_capacity;
+    offset += capacity;
   }
-#endif // FPGAMANAGEDSTREAMENGINE_0_PRESENT
 }
diff --git a/sim/midas/src/main/cc/bridges/fpga_managed_stream.h b/sim/midas/src/main/cc/bridges/fpga_managed_stream.h
@@ -116,7 +116,9 @@ class FPGAManagedStreamWidget final : public StreamEngine {
    *
    * @param io Reference to a functor implementing the low-level IO.
    */
-  FPGAManagedStreamWidget(FPGAManagedStreamIO &io);
+  FPGAManagedStreamWidget(
+      FPGAManagedStreamIO &io,
+      std::vector<FPGAManagedStreams::StreamParameters> &&to_cpu);
 };
 
 #endif // __BRIDGES_FPGA_MANAGED_STREAM_H