EE082-COLORORGAN *SPICE Netlist generated by Advanced Sim server on 5/1/2020 3:41:23 PM *Schematic Netlist: C2_L1_LLPF1 NetC2_L1_LLPF1_1 NetC2_L1_LLPF1_2 0.1UF C2_rf2_LLPF2 NetC2_rf2_LLPF2_1 NetC2_rf2_LLPF2_2 0.1UF C3_L1_LLPF1 LP_L_K NetC3_L1_LLPF1_2 0.1UF C3_rf2_LLPF2 HP_R_K NetC3_rf2_LLPF2_2 0.1UF C4_L1_LLPF1 0 NetC4_L1_LLPF1_2 0.1UF C4_rf2_LLPF2 0 NetC4_rf2_LLPF2_2 0.1UF C5_L1_LLPF1 0 NetC5_L1_LLPF1_2 0.1UF C5_rf2_LLPF2 0 NetC5_rf2_LLPF2_2 0.1UF C6_L1_LLPF1 0 5VCC 0.1UF C6_rf2_LLPF2 0 5VCC 0.1UF C7_L1_LLPF1 5VEE 0 0.1UF C7_rf2_LLPF2 5VEE 0 0.1UF C8_L1_hpf1 LEFT NetC8_L1_hpf1_2 0.047UF C8_rf2_hpf2 RIGHT NetC8_rf2_hpf2_2 0.047UF C9_L1_hpf1 NetC8_L1_hpf1_2 NetC9_L1_hpf1_2 0.047UF C9_rf2_hpf2 NetC8_rf2_hpf2_2 NetC9_rf2_hpf2_2 0.047UF C10_L1_hpf1 NetC10_L1_hpf1_1 NetC10_L1_hpf1_2 0.047UF C10_rf2_hpf2 NetC10_rf2_hpf2_1 NetC10_rf2_hpf2_2 0.047UF C11_L1_hpf1 NetC10_L1_hpf1_2 NetC11_L1_hpf1_2 0.047UF C11_rf2_hpf2 NetC10_rf2_hpf2_2 NetC11_rf2_hpf2_2 0.047UF C12_L1_hpf1 LEFT NetC8_L1_hpf1_2 0.047UF C12_rf2_hpf2 RIGHT NetC8_rf2_hpf2_2 0.047UF C13_L1_hpf1 NetC8_L1_hpf1_2 NetC9_L1_hpf1_2 0.047UF C13_rf2_hpf2 NetC8_rf2_hpf2_2 NetC9_rf2_hpf2_2 0.047UF C14_L1_hpf1 NetC10_L1_hpf1_1 NetC10_L1_hpf1_2 0.047UF C14_rf2_hpf2 NetC10_rf2_hpf2_1 NetC10_rf2_hpf2_2 0.047UF C15_L1_hpf1 NetC10_L1_hpf1_2 NetC11_L1_hpf1_2 0.047UF C15_rf2_hpf2 NetC10_rf2_hpf2_2 NetC11_rf2_hpf2_2 0.047UF C16_L1_hpf1 0 5VCC 0.1UF C16_rf2_hpf2 0 5VCC 0.1UF C17_L1_hpf1 5VEE 0 0.1UF C17_rf2_hpf2 5VEE 0 0.1UF C18_L1_UMMRBF1 NetC18_L1_UMMRBF1_1 NetC18_L1_UMMRBF1_2 0.1UF C18_rf2_UMMRBF2 NetC18_rf2_UMMRBF2_1 NetC18_rf2_UMMRBF2_2 0.1UF C19_L1_UMMRBF1 NetC18_L1_UMMRBF1_1 NetC19_L1_UMMRBF1_2 0.1UF C19_rf2_UMMRBF2 NetC18_rf2_UMMRBF2_1 NetC19_rf2_UMMRBF2_2 0.1UF RNT1 NetNT1_1 LEFT_LINE_IN 0.001 R2_L1_LLPF1 LEFT NetC2_L1_LLPF1_1 10K R2_rf2_LLPF2 RIGHT NetC2_rf2_LLPF2_1 10K R3_L1_LLPF1 NetC2_L1_LLPF1_1 NetC4_L1_LLPF1_2 10K R3_rf2_LLPF2 NetC2_rf2_LLPF2_1 NetC4_rf2_LLPF2_2 10K R4_L1_LLPF1 NetC2_L1_LLPF1_2 NetC3_L1_LLPF1_2 10K R4_rf2_LLPF2 NetC2_rf2_LLPF2_2 NetC3_rf2_LLPF2_2 10K R5_L1_LLPF1 NetC3_L1_LLPF1_2 NetC5_L1_LLPF1_2 10K R5_rf2_LLPF2 NetC3_rf2_LLPF2_2 NetC5_rf2_LLPF2_2 10K R6_L1_hpf1 NetC8_L1_hpf1_2 NetC10_L1_hpf1_1 10K R6_rf2_hpf2 NetC8_rf2_hpf2_2 NetC10_rf2_hpf2_1 10K R7_L1_hpf1 NetC10_L1_hpf1_2 HP_L_K 10K R7_rf2_hpf2 NetC10_rf2_hpf2_2 LP_R_K 10K R8_L1_hpf1 0 NetC9_L1_hpf1_2 10K R8_rf2_hpf2 0 NetC9_rf2_hpf2_2 10K R9_L1_hpf1 0 NetC11_L1_hpf1_2 10K R9_rf2_hpf2 0 NetC11_rf2_hpf2_2 10K R10 0 RIGHT_LINE_IN 1.2K R11 0 RIGHT_LINE_IN 1.2K R12 0 LOUT 5K R13 0 NetR13_2 1K R14 0 0 1K R15_L1_UMMRBF1 LEFT NetC18_L1_UMMRBF1_1 4.7K R15_rf2_UMMRBF2 RIGHT NetC18_rf2_UMMRBF2_1 4.7K R16_L1_UMMRBF1 NetR16_L1_UMMRBF1_1 BP_L_K 10K R16_rf2_UMMRBF2 NetR16_rf2_UMMRBF2_1 BP_R_K 10K R17_L1_UMMRBF1 NetC19_L1_UMMRBF1_2 NetC18_L1_UMMRBF1_2 10K R17_rf2_UMMRBF2 NetC19_rf2_UMMRBF2_2 NetC18_rf2_UMMRBF2_2 10K R18_L1_UMMRBF1 LEFT NetC18_L1_UMMRBF1_1 4.7K R18_rf2_UMMRBF2 RIGHT NetC18_rf2_UMMRBF2_1 4.7K R19_L1_UMMRBF1 NetC18_L1_UMMRBF1_2 NetR16_L1_UMMRBF1_1 10K R19_rf2_UMMRBF2 NetC18_rf2_UMMRBF2_2 NetR16_rf2_UMMRBF2_1 10K R20_L1_UMMRBF1 0 NetC18_L1_UMMRBF1_1 220 R20_rf2_UMMRBF2 0 NetC18_rf2_UMMRBF2_1 220 R21_L1_UMMRBF1 0 NetC18_L1_UMMRBF1_2 100 R21_rf2_UMMRBF2 0 NetC18_rf2_UMMRBF2_2 100 R22_L1_UMMRBF1 0 NetR22_L1_UMMRBF1_2 1K R22_rf2_UMMRBF2 0 NetR22_rf2_UMMRBF2_2 1K R23_L1_UMMRBF1 0 NetR23_L1_UMMRBF1_2 1K R23_rf2_UMMRBF2 0 NetR23_rf2_UMMRBF2_2 1K XRV1 ROUT R_TRIM RIGHT_LINE_IN LOUT L_TRIM LEFT_LINE_IN PTD902-2015K-A503 PARAMS: + TRIM=36.4299k XU1 NetR13_2 L_TRIM 5VCC 5VEE LOUT LM741/NS XU2_L1_LLPF1 NetC4_L1_LLPF1_2 NetC2_L1_LLPF1_2 5VCC 5VEE NetC2_L1_LLPF1_2 LM741/NS XU2_rf2_LLPF2 NetC4_rf2_LLPF2_2 NetC2_rf2_LLPF2_2 5VCC 5VEE NetC2_rf2_LLPF2_2 + LM741/NS XU3_L1_hpf1 NetC9_L1_hpf1_2 NetC10_L1_hpf1_1 5VCC 5VEE NetC10_L1_hpf1_1 LM741/NS XU3_rf2_hpf2 NetC9_rf2_hpf2_2 NetC10_rf2_hpf2_1 5VCC 5VEE NetC10_rf2_hpf2_1 + LM741/NS XU4_L1_LLPF1 NetC5_L1_LLPF1_2 LP_L_K 5VCC 5VEE LP_L_K LM741/NS XU4_rf2_LLPF2 NetC5_rf2_LLPF2_2 HP_R_K 5VCC 5VEE HP_R_K LM741/NS XU5_L1_hpf1 NetC11_L1_hpf1_2 HP_L_K 5VCC 5VEE HP_L_K LM741/NS XU5_rf2_hpf2 NetC11_rf2_hpf2_2 LP_R_K 5VCC 5VEE LP_R_K LM741/NS XU6 LEFT_LINE_IN L_LINE_OUT 5VCC 5VEE L_LINE_OUT LM741/NS XU7 0 R_TRIM 5VCC 5VEE ROUT LM741/NS XU8 RIGHT_LINE_IN R_LINE_OUT 5VCC 5VEE R_LINE_OUT LM741/NS XU9_L1_UMMRBF1 NetR23_L1_UMMRBF1_2 NetC19_L1_UMMRBF1_2 5VCC 5VEE + NetC18_L1_UMMRBF1_2 LM741/NS XU9_rf2_UMMRBF2 NetR23_rf2_UMMRBF2_2 NetC19_rf2_UMMRBF2_2 5VCC 5VEE + NetC18_rf2_UMMRBF2_2 LM741/NS XU10_L1_UMMRBF1 NetR22_L1_UMMRBF1_2 NetR16_L1_UMMRBF1_1 5VCC 5VEE BP_L_K LM741/NS XU10_rf2_UMMRBF2 NetR22_rf2_UMMRBF2_2 NetR16_rf2_UMMRBF2_1 5VCC 5VEE BP_R_K + LM741/NS V1 NetNT1_1 0 DC 0 SIN(0 2 1000 0 0 0) AC 2 0 V2 5VCC 0 5 V3 5VCC_LED 0 5 V4 0 5VEE 5 .SAVE 0 5VCC 5VCC_LED 5VEE BP_L_K BP_R_K HP_L_K HP_R_K L_LINE_OUT L_TRIM LEFT .SAVE LEFT_LINE_IN LOUT LP_L_K LP_R_K NetC10_L1_hpf1_1 NetC10_L1_hpf1_2 .SAVE NetC10_rf2_hpf2_1 NetC10_rf2_hpf2_2 NetC11_L1_hpf1_2 NetC11_rf2_hpf2_2 .SAVE NetC18_L1_UMMRBF1_1 NetC18_L1_UMMRBF1_2 NetC18_rf2_UMMRBF2_1 .SAVE NetC18_rf2_UMMRBF2_2 NetC19_L1_UMMRBF1_2 NetC19_rf2_UMMRBF2_2 NetC2_L1_LLPF1_1 .SAVE NetC2_L1_LLPF1_2 NetC2_rf2_LLPF2_1 NetC2_rf2_LLPF2_2 NetC3_L1_LLPF1_2 .SAVE NetC3_rf2_LLPF2_2 NetC4_L1_LLPF1_2 NetC4_rf2_LLPF2_2 NetC5_L1_LLPF1_2 .SAVE NetC5_rf2_LLPF2_2 NetC8_L1_hpf1_2 NetC8_rf2_hpf2_2 NetC9_L1_hpf1_2 .SAVE NetC9_rf2_hpf2_2 NetNT1_1 NetR13_2 NetR16_L1_UMMRBF1_1 NetR16_rf2_UMMRBF2_1 .SAVE NetR22_L1_UMMRBF1_2 NetR22_rf2_UMMRBF2_2 NetR23_L1_UMMRBF1_2 .SAVE NetR23_rf2_UMMRBF2_2 R_LINE_OUT R_TRIM RIGHT RIGHT_LINE_IN ROUT V1#branch .SAVE V2#branch V3#branch V4#branch @V1[z] @V2[z] @V3[z] @V4[z] @C10_L1_hpf1[i] .SAVE @C10_rf2_hpf2[i] @C11_L1_hpf1[i] @C11_rf2_hpf2[i] @C12_L1_hpf1[i] .SAVE @C12_rf2_hpf2[i] @C13_L1_hpf1[i] @C13_rf2_hpf2[i] @C14_L1_hpf1[i] .SAVE @C14_rf2_hpf2[i] @C15_L1_hpf1[i] @C15_rf2_hpf2[i] @C16_L1_hpf1[i] .SAVE @C16_rf2_hpf2[i] @C17_L1_hpf1[i] @C17_rf2_hpf2[i] @C18_L1_UMMRBF1[i] .SAVE @C18_rf2_UMMRBF2[i] @C19_L1_UMMRBF1[i] @C19_rf2_UMMRBF2[i] @C2_L1_LLPF1[i] .SAVE @C2_rf2_LLPF2[i] @C3_L1_LLPF1[i] @C3_rf2_LLPF2[i] @C4_L1_LLPF1[i] .SAVE @C4_rf2_LLPF2[i] @C5_L1_LLPF1[i] @C5_rf2_LLPF2[i] @C6_L1_LLPF1[i] .SAVE @C6_rf2_LLPF2[i] @C7_L1_LLPF1[i] @C7_rf2_LLPF2[i] @C8_L1_hpf1[i] @C8_rf2_hpf2[i] .SAVE @C9_L1_hpf1[i] @C9_rf2_hpf2[i] @R10[i] @R11[i] @R12[i] @R13[i] @R14[i] .SAVE @R15_L1_UMMRBF1[i] @R15_rf2_UMMRBF2[i] @R16_L1_UMMRBF1[i] @R16_rf2_UMMRBF2[i] .SAVE @R17_L1_UMMRBF1[i] @R17_rf2_UMMRBF2[i] @R18_L1_UMMRBF1[i] @R18_rf2_UMMRBF2[i] .SAVE @R19_L1_UMMRBF1[i] @R19_rf2_UMMRBF2[i] @R2_L1_LLPF1[i] @R2_rf2_LLPF2[i] .SAVE @R20_L1_UMMRBF1[i] @R20_rf2_UMMRBF2[i] @R21_L1_UMMRBF1[i] @R21_rf2_UMMRBF2[i] .SAVE @R22_L1_UMMRBF1[i] @R22_rf2_UMMRBF2[i] @R23_L1_UMMRBF1[i] @R23_rf2_UMMRBF2[i] .SAVE @R3_L1_LLPF1[i] @R3_rf2_LLPF2[i] @R4_L1_LLPF1[i] @R4_rf2_LLPF2[i] .SAVE @R5_L1_LLPF1[i] @R5_rf2_LLPF2[i] @R6_L1_hpf1[i] @R6_rf2_hpf2[i] @R7_L1_hpf1[i] .SAVE @R7_rf2_hpf2[i] @R8_L1_hpf1[i] @R8_rf2_hpf2[i] @R9_L1_hpf1[i] @R9_rf2_hpf2[i] .SAVE @RNT1[i] @C10_L1_hpf1[p] @C10_rf2_hpf2[p] @C11_L1_hpf1[p] @C11_rf2_hpf2[p] .SAVE @C12_L1_hpf1[p] @C12_rf2_hpf2[p] @C13_L1_hpf1[p] @C13_rf2_hpf2[p] .SAVE @C14_L1_hpf1[p] @C14_rf2_hpf2[p] @C15_L1_hpf1[p] @C15_rf2_hpf2[p] .SAVE @C16_L1_hpf1[p] @C16_rf2_hpf2[p] @C17_L1_hpf1[p] @C17_rf2_hpf2[p] .SAVE @C18_L1_UMMRBF1[p] @C18_rf2_UMMRBF2[p] @C19_L1_UMMRBF1[p] @C19_rf2_UMMRBF2[p] .SAVE @C2_L1_LLPF1[p] @C2_rf2_LLPF2[p] @C3_L1_LLPF1[p] @C3_rf2_LLPF2[p] .SAVE @C4_L1_LLPF1[p] @C4_rf2_LLPF2[p] @C5_L1_LLPF1[p] @C5_rf2_LLPF2[p] .SAVE @C6_L1_LLPF1[p] @C6_rf2_LLPF2[p] @C7_L1_LLPF1[p] @C7_rf2_LLPF2[p] @C8_L1_hpf1[p] .SAVE @C8_rf2_hpf2[p] @C9_L1_hpf1[p] @C9_rf2_hpf2[p] @R10[p] @R11[p] @R12[p] @R13[p] .SAVE @R14[p] @R15_L1_UMMRBF1[p] @R15_rf2_UMMRBF2[p] @R16_L1_UMMRBF1[p] .SAVE @R16_rf2_UMMRBF2[p] @R17_L1_UMMRBF1[p] @R17_rf2_UMMRBF2[p] @R18_L1_UMMRBF1[p] .SAVE @R18_rf2_UMMRBF2[p] @R19_L1_UMMRBF1[p] @R19_rf2_UMMRBF2[p] @R2_L1_LLPF1[p] .SAVE @R2_rf2_LLPF2[p] @R20_L1_UMMRBF1[p] @R20_rf2_UMMRBF2[p] @R21_L1_UMMRBF1[p] .SAVE @R21_rf2_UMMRBF2[p] @R22_L1_UMMRBF1[p] @R22_rf2_UMMRBF2[p] @R23_L1_UMMRBF1[p] .SAVE @R23_rf2_UMMRBF2[p] @R3_L1_LLPF1[p] @R3_rf2_LLPF2[p] @R4_L1_LLPF1[p] .SAVE @R4_rf2_LLPF2[p] @R5_L1_LLPF1[p] @R5_rf2_LLPF2[p] @R6_L1_hpf1[p] @R6_rf2_hpf2[p] .SAVE @R7_L1_hpf1[p] @R7_rf2_hpf2[p] @R8_L1_hpf1[p] @R8_rf2_hpf2[p] @R9_L1_hpf1[p] .SAVE @R9_rf2_hpf2[p] @RNT1[p] @V1[p] @V2[p] @V3[p] @V4[p] R_IN MID_rf LOW_L L_IN .SAVE LOW_rf MID_L HIGH_rf HIGH_L .PROBE AC ROUT R_IN RIGHT R_TRIM NetC18_rf2_UMMRBF2_2 NetC18_L1_UMMRBF1_2 .PROBE AC NetC10_rf2_hpf2_1 NetC10_L1_hpf1_1 NetC2_rf2_LLPF2_2 NetC2_L1_LLPF1_2 .PROBE AC MID_rf LOW_L L_IN LEFT LOW_rf MID_L HIGH_rf HIGH_L .PROBE OP ROUT R_IN RIGHT R_TRIM NetC18_rf2_UMMRBF2_2 NetC18_L1_UMMRBF1_2 .PROBE OP NetC10_rf2_hpf2_1 NetC10_L1_hpf1_1 NetC2_rf2_LLPF2_2 NetC2_L1_LLPF1_2 .PROBE OP MID_rf LOW_L L_IN LEFT LOW_rf MID_L HIGH_rf HIGH_L .OPTION KeepLastSetup=False *Selected Circuit Analyses: .AC LIN 100 1 3E4 .OP *Models and Subcircuits: .subckt PTD902-2015K-A503 1 2 3 4 5 6 params: trim=5e3 r1 1 2 {trim} r2 2 3 {50e3-trim} r3 4 5 {trim} r4 5 6 {50e3-trim} .ENDS PTD902-2015K-A503 .SUBCKT LM741/NS 1 2 99 50 28 *Features: *Improved performance over industry standards *Plug-in replacement for LM709,LM201,MC1439,748 *Input and output overload protection ****************INPUT STAGE************** IOS 2 1 20N *^Input offset current R1 1 3 250K R2 3 2 250K I1 4 50 100U R3 5 99 517 R4 6 99 517 Q1 5 2 4 QX Q2 6 7 4 QX *Fp2=2.55 MHz C4 5 6 60.3614P ***********COMMON MODE EFFECT*********** I2 99 50 1.6MA *^Quiescent supply current EOS 7 1 POLY(1) 16 49 1E-3 1 *Input offset voltage.^ R8 99 49 40K R9 49 50 40K *********OUTPUT VOLTAGE LIMITING******** V2 99 8 1.63 D1 9 8 DX D2 10 9 DX V3 10 50 1.63 **************SECOND STAGE************** EH 99 98 99 49 1 G1 98 9 5 6 2.1E-3 *Fp1=5 Hz R5 98 9 95.493MEG C3 98 9 333.33P ***************POLE STAGE*************** *Fp=30 MHz G3 98 15 9 49 1E-6 R12 98 15 1MEG C5 98 15 5.3052E-15 *********COMMON-MODE ZERO STAGE********* *Fpcm=300 Hz G4 98 16 3 49 3.1623E-8 L2 98 17 530.5M R13 17 16 1K **************OUTPUT STAGE************** F6 50 99 POLY(1) V6 450U 1 E1 99 23 99 15 1 R16 24 23 25 D5 26 24 DX V6 26 22 0.65V R17 23 25 25 D6 25 27 DX V7 22 27 0.65V V5 22 21 0.18V D4 21 15 DX V4 20 22 0.18V D3 15 20 DX L3 22 28 100P RL3 22 28 100K ***************MODELS USED************** .MODEL DX D(IS=1E-15) .MODEL QX NPN(BF=625) .ENDS LM741/NS .END