Permalink
Browse files

added port addressing

Signed-off-by: Joseph Moschini <jmos@iprimus.com.au>
  • Loading branch information...
Joseph Moschini
Joseph Moschini committed Apr 26, 2012
1 parent 495b514 commit 3e389c5463376bc1ddaa923cf8d71a09a3a09dad
Showing with 33 additions and 0 deletions.
  1. +33 −0 emulator/emulator.factor
View
@@ -16,6 +16,39 @@ USING:
IN: 6805.emulator
+! PORTA $0000 Port A
+! PORTB $0001 Port B
+! PORTC $0002 Port C
+! PORTD $0003 Port D
+! DDRA $0004 Data Direction Register A
+! DDRB $0005 Data Direction Register B
+! DDRC $0006 Data Direction Register C
+! DDRD $0007 Data Direction Register D
+! $0008
+! $0009
+! SPCR $000A SPI Control Register
+! SPSR $000B SPI Status Register
+! SPDR $000C SPI Data Register
+! BAUD $000D SCI Baud Rate Register
+! SCCR1 $000E SCI Control Register 1
+! SCCR2 $000F SCI Control Register 2
+! SCSR $0010 SCI Status Register
+! SCDR $0011 SCI Data Register
+! TCR $0012 Timer Control Register
+! TSR $0013 Timer Status Register
+! ICRH $0014 Input Capture Register High
+! ICRL $0015 Input Capture Register Low
+! OCRH $0016 Output Compare Register High
+! OCRL $0017 Output Compare Register Low
+! TRH $0018 Timer Register High
+! TRL $0019 Timer Register Low
+! ATRH $001A Alternate Timer Register High
+! ATRL $001B Alternate Timer Register Low
+! EPR $001C EPROM Porgramming
+! COPRST $001D COP Reset Register
+! COPCR $001E COP Control Register
+
+
CONSTANT: MEMSTART 0
CONSTANT: MEMSIZE HEX: FFFF

0 comments on commit 3e389c5

Please sign in to comment.