fix redefinitions

frank-w · Oct 17, 2021 · e84067c6d3f46b8ebf5c80dec567909c8e3874ee · e84067c
1 parent 7f134b3
commit e84067c6d3f46b8ebf5c80dec567909c8e3874ee
Showing 1 changed file with 0 additions and 119 deletions.
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -120,54 +120,6 @@ static const struct vop_scl_extension rk3288_win_full_scl_ext = {
 	.lb_mode = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 5),
 };
 
-static const struct vop_scl_regs rk3036_win0_scl = {
-	.scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
-	.scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
-	.scale_cbcr_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
-	.scale_cbcr_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
-};
-
-static const struct vop_scl_regs rk3036_win1_scl = {
-	.scale_yrgb_x = VOP_REG(RK3036_WIN1_SCL_FACTOR_YRGB, 0xffff, 0x0),
-	.scale_yrgb_y = VOP_REG(RK3036_WIN1_SCL_FACTOR_YRGB, 0xffff, 16),
-};
-
-static const struct vop_win_phy rk3036_win0_data = {
-	.scl = &rk3036_win0_scl,
-	.data_formats = formats_win_full,
-	.nformats = ARRAY_SIZE(formats_win_full),
-	.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 0),
-	.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 3),
-	.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 15),
-	.act_info = VOP_REG(RK3036_WIN0_ACT_INFO, 0x1fff1fff, 0),
-	.dsp_info = VOP_REG(RK3036_WIN0_DSP_INFO, 0x0fff0fff, 0),
-	.dsp_st = VOP_REG(RK3036_WIN0_DSP_ST, 0x1fff1fff, 0),
-	.yrgb_mst = VOP_REG(RK3036_WIN0_YRGB_MST, 0xffffffff, 0),
-	.uv_mst = VOP_REG(RK3036_WIN0_CBR_MST, 0xffffffff, 0),
-	.yrgb_vir = VOP_REG(RK3036_WIN0_VIR, 0xffff, 0),
-	.uv_vir = VOP_REG(RK3036_WIN0_VIR, 0x1fff, 16),
-	.alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 18),
-	.alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 0),
-	.alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),
-};
-
-static const struct vop_win_phy rk3036_win1_data = {
-	.scl = &rk3036_win1_scl,
-	.data_formats = formats_win_lite,
-	.nformats = ARRAY_SIZE(formats_win_lite),
-	.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),
-	.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),
-	.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),
-	.act_info = VOP_REG(RK3036_WIN1_ACT_INFO, 0x1fff1fff, 0),
-	.dsp_info = VOP_REG(RK3036_WIN1_DSP_INFO, 0x0fff0fff, 0),
-	.dsp_st = VOP_REG(RK3036_WIN1_DSP_ST, 0x1fff1fff, 0),
-	.yrgb_mst = VOP_REG(RK3036_WIN1_MST, 0xffffffff, 0),
-	.yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),
-	.alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
-	.alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1),
-	.alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),
-};
-
 static const struct vop_scl_regs rk3288_win_full_scl = {
 	.ext = &rk3288_win_full_scl_ext,
 	.scale_yrgb_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
@@ -383,21 +335,6 @@ static const struct vop_intr rk3288_vop_intr = {
 	.clear = VOP_REG(RK3288_INTR_CTRL0, 0xf, 8),
 };
 
-static const struct vop_win_phy rk3126_win1_data = {
-	.data_formats = formats_win_lite,
-	.nformats = ARRAY_SIZE(formats_win_lite),
-	.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),
-	.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),
-	.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),
-	.dsp_info = VOP_REG(RK3126_WIN1_DSP_INFO, 0x0fff0fff, 0),
-	.dsp_st = VOP_REG(RK3126_WIN1_DSP_ST, 0x1fff1fff, 0),
-	.yrgb_mst = VOP_REG(RK3126_WIN1_MST, 0xffffffff, 0),
-	.yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),
-	.alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),
-	.alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1),
-	.alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),
-};
-
 static const struct vop_grf_ctrl rk3288_vop_big_grf_ctrl = {
 	.grf_dclk_inv = VOP_REG(RK3288_GRF_SOC_CON15, 0x1, 13),
 };
@@ -546,62 +483,6 @@ static const struct vop_intr rk3366_vop_intr = {
 	.clear = VOP_REG_MASK(RK3366_INTR_CLEAR0, 0xffff, 0),
 };
 
-static const struct vop_scl_regs rk3066_win_scl = {
-	.scale_yrgb_x = VOP_REG(RK3066_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),
-	.scale_yrgb_y = VOP_REG(RK3066_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),
-	.scale_cbcr_x = VOP_REG(RK3066_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),
-	.scale_cbcr_y = VOP_REG(RK3066_WIN0_SCL_FACTOR_CBR, 0xffff, 16),
-};
-
-static const struct vop_win_phy rk3066_win0_data = {
-	.scl = &rk3066_win_scl,
-	.data_formats = formats_win_full,
-	.nformats = ARRAY_SIZE(formats_win_full),
-	.enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 0),
-	.format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 4),
-	.rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 19),
-	.act_info = VOP_REG(RK3066_WIN0_ACT_INFO, 0x1fff1fff, 0),
-	.dsp_info = VOP_REG(RK3066_WIN0_DSP_INFO, 0x0fff0fff, 0),
-	.dsp_st = VOP_REG(RK3066_WIN0_DSP_ST, 0x1fff1fff, 0),
-	.yrgb_mst = VOP_REG(RK3066_WIN0_YRGB_MST0, 0xffffffff, 0),
-	.uv_mst = VOP_REG(RK3066_WIN0_CBR_MST0, 0xffffffff, 0),
-	.yrgb_vir = VOP_REG(RK3066_WIN0_VIR, 0xffff, 0),
-	.uv_vir = VOP_REG(RK3066_WIN0_VIR, 0x1fff, 16),
-	.alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 21),
-	.alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 0),
-};
-
-static const struct vop_win_phy rk3066_win1_data = {
-	.data_formats = formats_win_full,
-	.nformats = ARRAY_SIZE(formats_win_full),
-	.enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 1),
-	.format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 7),
-	.rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 23),
-	.act_info = VOP_REG(RK3066_WIN1_ACT_INFO, 0x1fff1fff, 0),
-	.dsp_info = VOP_REG(RK3066_WIN1_DSP_INFO, 0x0fff0fff, 0),
-	.dsp_st = VOP_REG(RK3066_WIN1_DSP_ST, 0x1fff1fff, 0),
-	.yrgb_mst = VOP_REG(RK3066_WIN1_YRGB_MST, 0xffffffff, 0),
-	.uv_mst = VOP_REG(RK3066_WIN1_CBR_MST, 0xffffffff, 0),
-	.yrgb_vir = VOP_REG(RK3066_WIN1_VIR, 0xffff, 0),
-	.uv_vir = VOP_REG(RK3066_WIN1_VIR, 0x1fff, 16),
-	.alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 22),
-	.alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 1),
-};
-
-static const struct vop_win_phy rk3066_win2_data = {
-	.data_formats = formats_win_lite,
-	.nformats = ARRAY_SIZE(formats_win_lite),
-	.enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 2),
-	.format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 10),
-	.rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 27),
-	.dsp_info = VOP_REG(RK3066_WIN2_DSP_INFO, 0x0fff0fff, 0),
-	.dsp_st = VOP_REG(RK3066_WIN2_DSP_ST, 0x1fff1fff, 0),
-	.yrgb_mst = VOP_REG(RK3066_WIN2_MST, 0xffffffff, 0),
-	.yrgb_vir = VOP_REG(RK3066_WIN2_VIR, 0xffff, 0),
-	.alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 23),
-	.alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 2),
-};
-
 static const struct vop_grf_ctrl rk3368_vop_grf_ctrl = {
 	.grf_dclk_inv = VOP_REG(RK3368_GRF_SOC_CON6, 0x1, 5),
 };