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net: dsa: rtl8367: add basic init for CHIP_RTL8367C
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@frank-w
frank-w committed Nov 13, 2021
1 parent 1f067e9 commit fb5ff9592d60bcaaac8322ffd96b90bcf30d1f79
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Showing 2 changed files with 438 additions and 69 deletions.
325 drivers/net/dsa/rtl8367s_mdio.c
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@@ -41,10 +41,7 @@ struct rtk_gsw {

static struct rtk_gsw *_gsw;

extern int gsw_debug_proc_init(void);
extern void gsw_debug_proc_exit(void);


// ====================== Protocol functions (mdio,smi,asic) ====================================
/*mii_mgr_read/mii_mgr_write is the callback API for rtl8367 driver*/
unsigned int mii_mgr_read(unsigned int phy_addr,unsigned int phy_register,unsigned int *read_data)
{
@@ -132,26 +129,9 @@ rtk_int32 smi_write(rtk_uint32 mAddrs, rtk_uint32 rData)
//rtlglue_drvMutexUnlock();

return RT_ERR_OK;

}



/* Function Name:
* rtl8367c_setAsicReg
* Description:
* Set content of asic register
* Input:
* reg - register's address
* value - Value setting to register
* Output:
* None
* Return:
* RT_ERR_OK - Success
* RT_ERR_SMI - SMI access error
* Note:
* The value will be set to ASIC mapping address only and it is always return RT_ERR_OK while setting un-mapping address registers
*/
/* rtl8367c_{get,set}AsicReg Get/Set content of asic register */
ret_t rtl8367c_setAsicReg(rtk_uint32 reg, rtk_uint32 value)
{
ret_t retVal;
@@ -162,21 +142,7 @@ ret_t rtl8367c_setAsicReg(rtk_uint32 reg, rtk_uint32 value)

return RT_ERR_OK;
}
/* Function Name:
* rtl8367c_getAsicReg
* Description:
* Get content of asic register
* Input:
* reg - register's address
* value - Value setting to register
* Output:
* None
* Return:
* RT_ERR_OK - Success
* RT_ERR_SMI - SMI access error
* Note:
* Value 0x0000 will be returned for ASIC un-mapping address
*/

ret_t rtl8367c_getAsicReg(rtk_uint32 reg, rtk_uint32 *pValue)
{

@@ -192,21 +158,250 @@ ret_t rtl8367c_getAsicReg(rtk_uint32 reg, rtk_uint32 *pValue)
return RT_ERR_OK;
}

/* rtl8367c_{get,set} AsicRegBit Get/Set a bit value of a specified register */
ret_t rtl8367c_setAsicRegBit(rtk_uint32 reg, rtk_uint32 bit, rtk_uint32 value)
{
rtk_uint32 regData;
ret_t retVal;

if(bit >= RTL8367C_REGBITLENGTH)
return RT_ERR_INPUT;

retVal = smi_read(reg, &regData);
if(retVal != RT_ERR_OK)
return RT_ERR_SMI;

if(value)
regData = regData | (1 << bit);
else
regData = regData & (~(1 << bit));

retVal = smi_write(reg, regData);
if(retVal != RT_ERR_OK)
return RT_ERR_SMI;

return RT_ERR_OK;
}

ret_t rtl8367c_getAsicRegBit(rtk_uint32 reg, rtk_uint32 bit, rtk_uint32 *pValue)
{
rtk_uint32 regData;
ret_t retVal;

retVal = smi_read(reg, &regData);
if(retVal != RT_ERR_OK)
return RT_ERR_SMI;

*pValue = (regData & (0x1 << bit)) >> bit;

return RT_ERR_OK;
}

/* rtl8367c_{get,set}AsicRegBits Get/Set bits value of a specified register */
ret_t rtl8367c_getAsicRegBits(rtk_uint32 reg, rtk_uint32 bits, rtk_uint32 *pValue)
{

rtk_uint32 regData;
ret_t retVal;
rtk_uint32 bitsShift;

if(bits>= (1<<RTL8367C_REGBITLENGTH) )
return RT_ERR_INPUT;

bitsShift = 0;
while(!(bits & (1 << bitsShift)))
{
bitsShift++;
if(bitsShift >= RTL8367C_REGBITLENGTH)
return RT_ERR_INPUT;
}

retVal = smi_read(reg, &regData);
if(retVal != RT_ERR_OK) return RT_ERR_SMI;

*pValue = (regData & bits) >> bitsShift;

return RT_ERR_OK;
}

ret_t rtl8367c_setAsicRegBits(rtk_uint32 reg, rtk_uint32 bits, rtk_uint32 value)
{
rtk_uint32 regData;
ret_t retVal;
rtk_uint32 bitsShift;
rtk_uint32 valueShifted;

if(bits >= (1 << RTL8367C_REGBITLENGTH) )
return RT_ERR_INPUT;

bitsShift = 0;
while(!(bits & (1 << bitsShift)))
{
bitsShift++;
if(bitsShift >= RTL8367C_REGBITLENGTH)
return RT_ERR_INPUT;
}
valueShifted = value << bitsShift;

if(valueShifted > RTL8367C_REGDATAMAX)
return RT_ERR_INPUT;

retVal = smi_read(reg, &regData);
if(retVal != RT_ERR_OK)
return RT_ERR_SMI;

regData = regData & (~bits);
regData = regData | (valueShifted & bits);

retVal = smi_write(reg, regData);
if(retVal != RT_ERR_OK)
return RT_ERR_SMI;

return RT_ERR_OK;
}

/* rtl8367c_{get,set}AsicPHYOCPReg Get/Set PHY OCP registers */
ret_t rtl8367c_setAsicPHYOCPReg(rtk_uint32 phyNo, rtk_uint32 ocpAddr, rtk_uint32 ocpData )
{
ret_t retVal;
rtk_uint32 regAddr;
rtk_uint32 ocpAddrPrefix, ocpAddr9_6, ocpAddr5_1;

/* OCP prefix */
ocpAddrPrefix = ((ocpAddr & 0xFC00) >> 10);
if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_GPHY_OCP_MSB_0, RTL8367C_CFG_CPU_OCPADR_MSB_MASK, ocpAddrPrefix)) != RT_ERR_OK)
return retVal;

/*prepare access address*/
ocpAddr9_6 = ((ocpAddr >> 6) & 0x000F);
ocpAddr5_1 = ((ocpAddr >> 1) & 0x001F);
regAddr = RTL8367C_PHY_BASE | (ocpAddr9_6 << 8) | (phyNo << RTL8367C_PHY_OFFSET) | ocpAddr5_1;
if((retVal = rtl8367c_setAsicReg(regAddr, ocpData)) != RT_ERR_OK)
return retVal;

return RT_ERR_OK;
}

ret_t rtl8367c_getAsicPHYOCPReg(rtk_uint32 phyNo, rtk_uint32 ocpAddr, rtk_uint32 *pRegData )
{
ret_t retVal;
rtk_uint32 regAddr;
rtk_uint32 ocpAddrPrefix, ocpAddr9_6, ocpAddr5_1;
/* OCP prefix */
ocpAddrPrefix = ((ocpAddr & 0xFC00) >> 10);
if((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_GPHY_OCP_MSB_0, RTL8367C_CFG_CPU_OCPADR_MSB_MASK, ocpAddrPrefix)) != RT_ERR_OK)
return retVal;

/*prepare access address*/
ocpAddr9_6 = ((ocpAddr >> 6) & 0x000F);
ocpAddr5_1 = ((ocpAddr >> 1) & 0x001F);
regAddr = RTL8367C_PHY_BASE | (ocpAddr9_6 << 8) | (phyNo << RTL8367C_PHY_OFFSET) | ocpAddr5_1;
if((retVal = rtl8367c_getAsicReg(regAddr, pRegData)) != RT_ERR_OK)
return retVal;

return RT_ERR_OK;
}

//====================== Init functions ===============================================
static rtk_api_ret_t _rtk_switch_init_8367c(void)
{
rtk_port_t port;
rtk_uint32 retVal;
rtk_uint32 regData;
rtk_uint32 regValue;

if( (retVal = rtl8367c_setAsicReg(0x13c2, 0x0249)) != RT_ERR_OK)
return retVal;

if( (retVal = rtl8367c_getAsicReg(0x1301, &regValue)) != RT_ERR_OK)
return retVal;

if( (retVal = rtl8367c_setAsicReg(0x13c2, 0x0000)) != RT_ERR_OK)
return retVal;

RTK_SCAN_ALL_LOG_PORT(port)
{
if(rtk_switch_isUtpPort(port) == RT_ERR_OK)
{
/*if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_PORT0_EEECFG + (0x20 * port), RTL8367C_PORT0_EEECFG_EEE_100M_OFFSET, 1)) != RT_ERR_OK)
return retVal;
if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_PORT0_EEECFG + (0x20 * port), RTL8367C_PORT0_EEECFG_EEE_GIGA_500M_OFFSET, 1)) != RT_ERR_OK)
return retVal;
if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_PORT0_EEECFG + (0x20 * port), RTL8367C_PORT0_EEECFG_EEE_TX_OFFSET, 1)) != RT_ERR_OK)
return retVal;
if((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_PORT0_EEECFG + (0x20 * port), RTL8367C_PORT0_EEECFG_EEE_RX_OFFSET, 1)) != RT_ERR_OK)
return retVal;*/

if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xA428, &regData)) != RT_ERR_OK)
return retVal;

regData &= ~(0x0200);
if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xA428, regData)) != RT_ERR_OK)
return retVal;

if((regValue & 0x00F0) == 0x00A0)
{
if((retVal = rtl8367c_getAsicPHYOCPReg(port, 0xA5D0, &regData)) != RT_ERR_OK)
return retVal;

regData |= 0x0006;
if((retVal = rtl8367c_setAsicPHYOCPReg(port, 0xA5D0, regData)) != RT_ERR_OK)
return retVal;
}
}
}

if((retVal = rtl8367c_setAsicReg(RTL8367C_REG_UTP_FIB_DET, 0x15BB)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicReg(0x1303, 0x06D6)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicReg(0x1304, 0x0700)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicReg(0x13E2, 0x003F)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicReg(0x13F9, 0x0090)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicReg(0x121e, 0x03CA)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicReg(0x1233, 0x0352)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicReg(0x1237, 0x00a0)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicReg(0x123a, 0x0030)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicReg(0x1239, 0x0084)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicReg(0x0301, 0x1000)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicReg(0x1349, 0x001F)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicRegBit(0x18e0, 0, 0)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicRegBit(0x122b, 14, 1)) != RT_ERR_OK)
return retVal;

if((retVal = rtl8367c_setAsicRegBits(0x1305, 0xC000, 3)) != RT_ERR_OK)
return retVal;

return RT_ERR_OK;
}

/* Function Name:
* rtk_switch_probe
* Description:
* Probe switch
* Input:
* None
* Output:
* None
* Return:
* RT_ERR_OK - Switch probed
* RT_ERR_FAILED - Switch Unprobed.
* Note:
*
*/
rtk_api_ret_t rtk_switch_probe(switch_chip_t *pSwitchChip)
{
rtk_uint32 retVal;
@@ -232,6 +427,7 @@ rtk_api_ret_t rtk_switch_probe(switch_chip_t *pSwitchChip)
case 0x0597:
case 0x6367:
*pSwitchChip = CHIP_RTL8367C;
halCtrl = &rtl8367c_hal_Ctrl;
break;
case 0x0652:
case 0x6368:
@@ -255,6 +451,15 @@ rtk_api_ret_t rtk_switch_probe(switch_chip_t *pSwitchChip)
return RT_ERR_OK;
}

rtk_api_ret_t rtk_switch_initialState_set(init_state_t state)
{
if(state >= INIT_STATE_END)
return RT_ERR_FAILED;

init_state = state;
return RT_ERR_OK;
}

rtk_api_ret_t rtk_switch_init(void)
{
rtk_uint32 retVal;
@@ -265,7 +470,23 @@ rtk_api_ret_t rtk_switch_init(void)
if ((retVal = rtk_switch_probe(&switchChip)) != RT_ERR_OK)
return retVal;

//some more missing here...
/* Set initial state */

if((retVal = rtk_switch_initialState_set(INIT_COMPLETED)) != RT_ERR_OK)
return retVal;

/* Initial */
switch(switchChip)
{
case CHIP_RTL8367C:
if((retVal = _rtk_switch_init_8367c()) != RT_ERR_OK)
return retVal;
break;
default:
return RT_ERR_CHIP_NOT_FOUND;
}

//some more missing here

return 0;
}

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