From f83cae78aa10ebb98b96f08281b03df9964d6faa Mon Sep 17 00:00:00 2001 From: Frank Wunderlich Date: Fri, 8 Feb 2019 17:40:22 +0100 Subject: [PATCH] [lora] adding changes for bpi-r2 --- arch/arm/configs/mt7623n_evb_fwu_defconfig | 4 +++ utils/lora/overlay/Makefile | 4 +-- .../lora/overlay/bpi-r2-lora-spi-overlay.dts | 34 +++++++++++++++++++ 3 files changed, 40 insertions(+), 2 deletions(-) create mode 100644 utils/lora/overlay/bpi-r2-lora-spi-overlay.dts diff --git a/arch/arm/configs/mt7623n_evb_fwu_defconfig b/arch/arm/configs/mt7623n_evb_fwu_defconfig index 6ec6625102b35..954c7e2d31f4f 100644 --- a/arch/arm/configs/mt7623n_evb_fwu_defconfig +++ b/arch/arm/configs/mt7623n_evb_fwu_defconfig @@ -705,3 +705,7 @@ CONFIG_COMMON_CLK_MT2701_IMGSYS=y CONFIG_COMMON_CLK_MT2701_VDECSYS=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_DRM_FBDEV_EMULATION=y + +#options needed for LoRa +CONFIG_IEEE802154=m +CONFIG_MAC802154=m diff --git a/utils/lora/overlay/Makefile b/utils/lora/overlay/Makefile index 1dbfcb05b8adc..d1592e6111e5a 100644 --- a/utils/lora/overlay/Makefile +++ b/utils/lora/overlay/Makefile @@ -1,5 +1,5 @@ -OVERLAY_SRC=rpi-lora-spi-overlay.dts -OVERLAY_DST=rpi-lora-spi.dtbo +OVERLAY_SRC=bpi-r2-lora-spi-overlay.dts +OVERLAY_DST=bpi-r2-lora-spi.dtbo all: dtc -I dts -O dtb -@ -o $(OVERLAY_DST) $(OVERLAY_SRC) diff --git a/utils/lora/overlay/bpi-r2-lora-spi-overlay.dts b/utils/lora/overlay/bpi-r2-lora-spi-overlay.dts new file mode 100644 index 0000000000000..3827d2d884884 --- /dev/null +++ b/utils/lora/overlay/bpi-r2-lora-spi-overlay.dts @@ -0,0 +1,34 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + sx1278@0 { + compatible = "sx1278"; + reg = <0>; + status = "okay"; + spi-max-frequency = <0x3b60>; + center-carrier-frq = <434000000>; + clock-frequency = <32000000>; + minimal-RF-channel = /bits/ 8 <11>; + maximum-RF-channel = /bits/ 8 <11>; + }; + + sx1278@1 { + compatible = "sx1278"; + reg = <1>; + status = "okay"; + spi-max-frequency = <0x3b60>; + center-carrier-frq = <434000000>; + clock-frequency = <32000000>; + minimal-RF-channel = /bits/ 8 <11>; + maximum-RF-channel = /bits/ 8 <11>; + }; + }; + }; +};