From 479d88eb2982cc3786d7970c8476fb1b21e7b42a Mon Sep 17 00:00:00 2001 From: coderJeff Date: Sun, 18 Jun 2023 13:02:21 -0400 Subject: [PATCH] fbc: internal: add IR_EMITOPT to control backend options from AST/IR This commit adds some internal changes for tracking specific emit options in AST/IR that can then be passed on to the backend / EMIT. This will potentially provide a generic way to extend AST options to the backend. - add 'enum IR_EMITOPT' for options relating to EMIT options - add 'AST_OPOPT.AST_OPOPT_DOINVERSE' for relational operators to indicate that the AST expression needs to be inverted. This allows AST to preserve the user's original expression and pass it on to the backend to solve. - add 'IR_EMITOPT.IR_EMITOPT_REL_DOINVERSE' to indicate the option to the backend - add 'EMIT_NODE.options' to track options emit options - Update `EMIT_RELCB` to accept an options parameter - For procedures handling relational operators in IR/EMIT, add parameters to the internal functions to accept 'options as IR_EMITOPT'. This will then control how the backend handles code generation. --- changelog.txt | 1 + src/compiler/ast-node-bop.bas | 10 ++++- src/compiler/ast-node-check.bas | 4 +- src/compiler/ast.bi | 1 + src/compiler/emit.bas | 61 ++++++++++++++++------------- src/compiler/emit.bi | 23 +++++++---- src/compiler/emit_SSE.bas | 30 ++++++++++++--- src/compiler/emit_x86.bas | 68 ++++++++++++++++++++++++--------- src/compiler/ir-gas64.bas | 14 ++++++- src/compiler/ir-hlc.bas | 5 ++- src/compiler/ir-llvm.bas | 19 +++++---- src/compiler/ir-tac.bas | 27 +++++++------ src/compiler/ir.bi | 11 ++++-- 13 files changed, 189 insertions(+), 85 deletions(-) diff --git a/changelog.txt b/changelog.txt index 27757294ec..e2db7ed3b8 100644 --- a/changelog.txt +++ b/changelog.txt @@ -1,6 +1,7 @@ Version 1.20.0 [changed] +- internal: (WIP) changes to all backends gcc/llvm/gas64/gas/gas+SSE for floating point comparison handling [added] diff --git a/src/compiler/ast-node-bop.bas b/src/compiler/ast-node-bop.bas index 0131e8d13f..c8aadc3e05 100644 --- a/src/compiler/ast-node-bop.bas +++ b/src/compiler/ast-node-bop.bas @@ -1687,7 +1687,10 @@ function astLoadBOP( byval n as ASTNODE ptr ) as IRVREG ptr '' ex=label? Then this is an optimized conditional branch if( n->op.ex <> NULL ) then vr = NULL - irEmitBOP( op, v1, v2, NULL, n->op.ex ) + irEmitBOP( op, v1, v2, NULL, n->op.ex, _ + iif( n->op.options and AST_OPOPT_DOINVERSE, _ + IR_EMITOPT_REL_DOINVERSE, _ + IR_EMITOPT_NONE ) ) else if( (n->op.options and AST_OPOPT_ALLOCRES) <> 0 ) then '' Self-BOPs: Always re-use the lhs vreg to store the result, @@ -1702,7 +1705,10 @@ function astLoadBOP( byval n as ASTNODE ptr ) as IRVREG ptr v1->vector = n->vector end if - irEmitBOP( op, v1, v2, vr, NULL ) + irEmitBOP( op, v1, v2, vr, NULL, _ + iif( n->op.options and AST_OPOPT_DOINVERSE, _ + IR_EMITOPT_REL_DOINVERSE, _ + IR_EMITOPT_NONE ) ) '' Return vr to parent even for self-BOPs - this is probably useless at the moment though, '' because FB self-BOPs can only be used as statements, not in expressions... diff --git a/src/compiler/ast-node-check.bas b/src/compiler/ast-node-check.bas index d19b76f75b..6e7352e9f2 100644 --- a/src/compiler/ast-node-check.bas +++ b/src/compiler/ast-node-check.bas @@ -102,7 +102,7 @@ function astLoadBOUNDCHK _ vr, _ irAllocVRIMM( FB_DATATYPE_INTEGER, NULL, 0 ), _ NULL, _ - label ) + label, IR_EMITOPT_NONE ) irEmitJUMPPTR( vr ) irEmitLABELNF( label ) end if @@ -195,7 +195,7 @@ function astLoadPTRCHK _ vr, _ irAllocVRIMM( FB_DATATYPE_INTEGER, NULL, 0 ), _ NULL, _ - label ) + label, IR_EMITOPT_NONE ) irEmitJUMPPTR( vr ) irEmitLABELNF( label ) end if diff --git a/src/compiler/ast.bi b/src/compiler/ast.bi index 526b91d8df..f9d3ac9206 100644 --- a/src/compiler/ast.bi +++ b/src/compiler/ast.bi @@ -85,6 +85,7 @@ enum AST_OPOPT AST_OPOPT_DONTCHKPTR = &h00000010 AST_OPOPT_DONTCHKOPOVL = &h00000020 AST_OPOPT_ISINI = &h00000040 + AST_OPOPT_DOINVERSE = &h00000080 '' indicates that logic needs to be inverted by the backend (i.e. branching) AST_OPOPT_DOPTRARITH = AST_OPOPT_LPTRARITH or AST_OPOPT_RPTRARITH diff --git a/src/compiler/emit.bas b/src/compiler/emit.bas index 03019e9b9f..947d90af75 100644 --- a/src/compiler/emit.bas +++ b/src/compiler/emit.bas @@ -179,7 +179,8 @@ sub emitFlush( ) n->rel.rvreg, _ n->rel.label, _ n->rel.dvreg, _ - n->rel.svreg ) + n->rel.svreg, _ + n->options ) case EMIT_NODECLASS_STK cast( EMIT_STKCB, emit.opFnTb[n->stk.op] )( _ @@ -356,7 +357,8 @@ private function hNewREL _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr static dim as EMIT_NODE ptr n @@ -368,6 +370,7 @@ private function hNewREL _ n->rel.label = label n->rel.dvreg = hNewVR( dvreg ) n->rel.svreg = hNewVR( svreg ) + n->options = options function = n @@ -982,20 +985,21 @@ function emitGT _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr static select case typeGetSizeType( dvreg->dtype ) '' longint? case FB_SIZETYPE_INT64, FB_SIZETYPE_UINT64 - function = hNewREL( EMIT_OP_CGTL, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CGTL, rvreg, label, dvreg, svreg, options ) '' float? case FB_SIZETYPE_FLOAT32, FB_SIZETYPE_FLOAT64 - function = hNewREL( EMIT_OP_CGTF, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CGTF, rvreg, label, dvreg, svreg, options ) case else - function = hNewREL( EMIT_OP_CGTI, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CGTI, rvreg, label, dvreg, svreg, options ) end select end function @@ -1006,20 +1010,21 @@ function emitLT _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr static select case typeGetSizeType( dvreg->dtype ) '' longint? case FB_SIZETYPE_INT64, FB_SIZETYPE_UINT64 - function = hNewREL( EMIT_OP_CLTL, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CLTL, rvreg, label, dvreg, svreg, options ) '' float? case FB_SIZETYPE_FLOAT32, FB_SIZETYPE_FLOAT64 - function = hNewREL( EMIT_OP_CLTF, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CLTF, rvreg, label, dvreg, svreg, options ) case else - function = hNewREL( EMIT_OP_CLTI, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CLTI, rvreg, label, dvreg, svreg, options ) end select end function @@ -1030,20 +1035,21 @@ function emitEQ _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr static select case typeGetSizeType( dvreg->dtype ) '' longint? case FB_SIZETYPE_INT64, FB_SIZETYPE_UINT64 - function = hNewREL( EMIT_OP_CEQL, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CEQL, rvreg, label, dvreg, svreg, options ) '' float? case FB_SIZETYPE_FLOAT32, FB_SIZETYPE_FLOAT64 - function = hNewREL( EMIT_OP_CEQF, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CEQF, rvreg, label, dvreg, svreg, options ) case else - function = hNewREL( EMIT_OP_CEQI, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CEQI, rvreg, label, dvreg, svreg, options ) end select end function @@ -1054,20 +1060,21 @@ function emitNE _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr static select case typeGetSizeType( dvreg->dtype ) '' longint? case FB_SIZETYPE_INT64, FB_SIZETYPE_UINT64 - function = hNewREL( EMIT_OP_CNEL, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CNEL, rvreg, label, dvreg, svreg, options ) '' float? case FB_SIZETYPE_FLOAT32, FB_SIZETYPE_FLOAT64 - function = hNewREL( EMIT_OP_CNEF, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CNEF, rvreg, label, dvreg, svreg, options ) case else - function = hNewREL( EMIT_OP_CNEI, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CNEI, rvreg, label, dvreg, svreg, options ) end select end function @@ -1078,20 +1085,21 @@ function emitGE _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr static select case typeGetSizeType( dvreg->dtype ) '' longint? case FB_SIZETYPE_INT64, FB_SIZETYPE_UINT64 - function = hNewREL( EMIT_OP_CGEL, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CGEL, rvreg, label, dvreg, svreg, options ) '' float? case FB_SIZETYPE_FLOAT32, FB_SIZETYPE_FLOAT64 - function = hNewREL( EMIT_OP_CGEF, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CGEF, rvreg, label, dvreg, svreg, options ) case else - function = hNewREL( EMIT_OP_CGEI, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CGEI, rvreg, label, dvreg, svreg, options ) end select end function @@ -1102,20 +1110,21 @@ function emitLE _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr static select case typeGetSizeType( dvreg->dtype ) '' longint? case FB_SIZETYPE_INT64, FB_SIZETYPE_UINT64 - function = hNewREL( EMIT_OP_CLEL, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CLEL, rvreg, label, dvreg, svreg, options ) '' float? case FB_SIZETYPE_FLOAT32, FB_SIZETYPE_FLOAT64 - function = hNewREL( EMIT_OP_CLEF, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CLEF, rvreg, label, dvreg, svreg, options ) case else - function = hNewREL( EMIT_OP_CLEI, rvreg, label, dvreg, svreg ) + function = hNewREL( EMIT_OP_CLEI, rvreg, label, dvreg, svreg, options ) end select end function diff --git a/src/compiler/emit.bi b/src/compiler/emit.bi index b21dcb55bf..06d80e82b8 100644 --- a/src/compiler/emit.bi +++ b/src/compiler/emit.bi @@ -206,6 +206,8 @@ end type type EMIT_NODE class as EMIT_NODECLASS_ENUM + options as IR_EMITOPT + union bop as EMIT_BOPNODE uop as EMIT_UOPNODE @@ -242,7 +244,8 @@ type EMIT_RELCB as sub _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) type EMIT_STKCB as sub _ @@ -624,7 +627,8 @@ declare function emitGT _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr declare function emitLT _ @@ -632,7 +636,8 @@ declare function emitLT _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr declare function emitEQ _ @@ -640,7 +645,8 @@ declare function emitEQ _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr declare function emitNE _ @@ -648,7 +654,8 @@ declare function emitNE _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr declare function emitLE _ @@ -656,7 +663,8 @@ declare function emitLE _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr declare function emitGE _ @@ -664,7 +672,8 @@ declare function emitGE _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) as EMIT_NODE ptr declare function emitATN2 _ diff --git a/src/compiler/emit_SSE.bas b/src/compiler/emit_SSE.bas index 18e606350e..74338f7840 100644 --- a/src/compiler/emit_SSE.bas +++ b/src/compiler/emit_SSE.bas @@ -1630,11 +1630,14 @@ private sub _emitCGTF_SSE _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + hCMPF_SSE( rvreg, label, "a", "", dvreg, svreg ) end sub @@ -1645,11 +1648,14 @@ private sub _emitCLTF_SSE _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + hCMPF_SSE( rvreg, label, "b", "", dvreg, svreg ) end sub @@ -1660,11 +1666,14 @@ private sub _emitCEQF_SSE _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + hCMPF_SSE( rvreg, label, "e", "", dvreg, svreg ) end sub @@ -1675,11 +1684,14 @@ private sub _emitCNEF_SSE _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + hCMPF_SSE( rvreg, label, "ne", "", dvreg, svreg ) end sub @@ -1690,11 +1702,14 @@ private sub _emitCLEF_SSE _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + hCMPF_SSE( rvreg, label, "be", "", dvreg, svreg ) end sub @@ -1705,11 +1720,14 @@ private sub _emitCGEF_SSE _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + hCMPF_SSE( rvreg, label, "ae", "", dvreg, svreg ) end sub diff --git a/src/compiler/emit_x86.bas b/src/compiler/emit_x86.bas index 21d6c1c1d6..0aa663753d 100644 --- a/src/compiler/emit_x86.bas +++ b/src/compiler/emit_x86.bas @@ -4410,6 +4410,8 @@ private sub hCMPF _ byval svreg as IRVREG ptr _ ) static + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + dim as string rname, rname8, dst, src, ostr, lname dim as integer iseaxfree, isedxfree @@ -4531,7 +4533,8 @@ private sub _emitCGTL _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) @@ -4556,7 +4559,8 @@ private sub _emitCGTI _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) @@ -4579,11 +4583,14 @@ private sub _emitCGTF _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + if( env.clopt.cputype >= FB_CPUTYPE_686 ) then hCMPF( rvreg, label, "b", "", dvreg, svreg ) else @@ -4597,7 +4604,8 @@ private sub _emitCLTL _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) @@ -4622,7 +4630,8 @@ private sub _emitCLTI _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) @@ -4645,11 +4654,14 @@ private sub _emitCLTF _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + if( env.clopt.cputype >= FB_CPUTYPE_686 ) then hCMPF( rvreg, label, "a", "", dvreg, svreg ) else @@ -4664,7 +4676,8 @@ private sub _emitCEQL _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) @@ -4679,7 +4692,8 @@ private sub _emitCEQI _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) @@ -4694,11 +4708,14 @@ private sub _emitCEQF _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + if( env.clopt.cputype >= FB_CPUTYPE_686 ) then hCMPF( rvreg, label, "z", "", dvreg, svreg ) else @@ -4713,7 +4730,8 @@ private sub _emitCNEL _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) @@ -4728,7 +4746,8 @@ private sub _emitCNEI _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) @@ -4743,11 +4762,14 @@ private sub _emitCNEF _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + if( env.clopt.cputype >= FB_CPUTYPE_686 ) then hCMPF( rvreg, label, "nz", "", dvreg, svreg ) else @@ -4762,7 +4784,8 @@ private sub _emitCLEL _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) @@ -4787,7 +4810,8 @@ private sub _emitCLEI _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) @@ -4810,11 +4834,14 @@ private sub _emitCLEF _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + if( env.clopt.cputype >= FB_CPUTYPE_686 ) then hCMPF( rvreg, label, "ae", "", dvreg, svreg ) else @@ -4829,7 +4856,8 @@ private sub _emitCGEL _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) @@ -4854,7 +4882,8 @@ private sub _emitCGEI _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) @@ -4877,11 +4906,14 @@ private sub _emitCGEF _ byval rvreg as IRVREG ptr, _ byval label as FBSYMBOL ptr, _ byval dvreg as IRVREG ptr, _ - byval svreg as IRVREG ptr _ + byval svreg as IRVREG ptr, _ + byval options as IR_EMITOPT _ ) static ASSERT_PROC_DECL( EMIT_RELCB ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + if( env.clopt.cputype >= FB_CPUTYPE_686 ) then hCMPF( rvreg, label, "be", "", dvreg, svreg ) else diff --git a/src/compiler/ir-gas64.bas b/src/compiler/ir-gas64.bas index da0143a5da..7bec71d6bd 100644 --- a/src/compiler/ir-gas64.bas +++ b/src/compiler/ir-gas64.bas @@ -3844,12 +3844,22 @@ private sub hloadoperandsandwritebop(byval op as integer,byval v1 as IRVREG ptr, end select end sub -private sub _emitbop(byval op as integer,byval v1 as IRVREG ptr,byval v2 as IRVREG ptr,byval vr as IRVREG ptr,byval label as FBSYMBOL ptr) +private sub _emitbop _ + ( _ + byval op as integer, _ + byval v1 as IRVREG ptr, _ + byval v2 as IRVREG ptr, _ + byval vr as IRVREG ptr, _ + byval label as FBSYMBOL ptr, _ + byval options as IR_EMITOPT _ + ) dim as FB_DATATYPE dtype #ifdef __GAS64_DEBUG__ var bopdump = vregPretty( v1 ) + " " + astdumpopToStr( op ) + " " + vregPretty( v2 ) #endif + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + if( label ) then asm_info("branchbop " + bopdump +" "+*symbGetMangledName( label )) elseif( vr = NULL ) then @@ -7032,7 +7042,7 @@ private sub _emitMacro( byval op as integer,byval v1 as IRVREG ptr, byval v2 as reghandle(savereg)=v1->reg end if tempo1=irhlAllocVrImm(FB_DATATYPE_INTEGER,0,8) - _emitbop(AST_OP_ADD,v1,tempo1,0,0)''add 8 for next arg + _emitbop(AST_OP_ADD,v1,tempo1,0,0,IR_EMITOPT_NONE)''add 8 for next arg else vr->reg=v1->reg end if diff --git a/src/compiler/ir-hlc.bas b/src/compiler/ir-hlc.bas index ac58d01438..2eeb17ba77 100644 --- a/src/compiler/ir-hlc.bas +++ b/src/compiler/ir-hlc.bas @@ -2860,9 +2860,12 @@ private sub _emitBop _ byval v1 as IRVREG ptr, _ byval v2 as IRVREG ptr, _ byval vr as IRVREG ptr, _ - byval label as FBSYMBOL ptr _ + byval label as FBSYMBOL ptr, _ + byval options as IR_EMITOPT _ ) +'' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + dim as EXPRNODE ptr l = any, r = any l = exprNewVREG( v1 ) diff --git a/src/compiler/ir-llvm.bas b/src/compiler/ir-llvm.bas index 219da1f1cb..bde5dae189 100644 --- a/src/compiler/ir-llvm.bas +++ b/src/compiler/ir-llvm.bas @@ -197,7 +197,8 @@ declare sub hEmitBop _ byval v1 as IRVREG ptr, _ byval v2 as IRVREG ptr, _ byval vr as IRVREG ptr, _ - byval label as FBSYMBOL ptr _ + byval label as FBSYMBOL ptr, _ + byval options as IR_EMITOPT _ ) '' globals @@ -1085,7 +1086,7 @@ private sub hAddOffset _ '' can't do self-BOPs on REGs) var vimmoffset = irhlAllocVrImm( FB_DATATYPE_INTEGER, NULL, ofs ) var vnewoffset = irhlAllocVreg( FB_DATATYPE_INTEGER, NULL ) - hEmitBop( AST_OP_ADD, voffset, vimmoffset, vnewoffset, NULL ) + hEmitBop( AST_OP_ADD, voffset, vimmoffset, vnewoffset, NULL, IR_EMITOPT_NONE ) voffset = vnewoffset end if @@ -1463,9 +1464,12 @@ private sub hEmitBop _ byval v1 as IRVREG ptr, _ byval v2 as IRVREG ptr, _ byval vr as IRVREG ptr, _ - byval label as FBSYMBOL ptr _ + byval label as FBSYMBOL ptr, _ + byval options as IR_EMITOPT _ ) + '' !!!TODO!!! handle ((options and IR_EMITOPT_REL_DOINVERSE)<>0) + '' Conditional branch? if( label ) then assert( vr = NULL ) @@ -1538,7 +1542,8 @@ private sub _emitBop _ byval v1 as IRVREG ptr, _ byval v2 as IRVREG ptr, _ byval vr as IRVREG ptr, _ - byval label as FBSYMBOL ptr _ + byval label as FBSYMBOL ptr, _ + byval options as IR_EMITOPT _ ) var bopdump = vregPretty( v1 ) + " " + astDumpOpToStr( op ) + " " + vregPretty( v2 ) @@ -1550,7 +1555,7 @@ private sub _emitBop _ hAstCommand( "bop " + bopdump ) end if - hEmitBop( op, v1, v2, vr, label ) + hEmitBop( op, v1, v2, vr, label, options ) end sub @@ -1645,7 +1650,7 @@ private sub _emitUop _ end if var zero = irhlAllocVrImm( FB_DATATYPE_INTEGER, NULL, 0 ) - hEmitBop( AST_OP_SUB, zero, v1, vr, NULL ) + hEmitBop( AST_OP_SUB, zero, v1, vr, NULL, IR_EMITOPT_NONE ) if( isself ) then hEmitStore( @v1orig, vr ) @@ -1657,7 +1662,7 @@ private sub _emitUop _ '' Just pass on as BOP. Works even for self-UOPs, as v1 will be '' the lhs of the self-BOP as expected by hEmitBop(). var minusone = irhlAllocVrImm( FB_DATATYPE_INTEGER, NULL, -1 ) - hEmitBop( AST_OP_XOR, v1, minusone, vr, NULL ) + hEmitBop( AST_OP_XOR, v1, minusone, vr, NULL, IR_EMITOPT_NONE ) case else hBuiltInUop( op, v1, vr ) diff --git a/src/compiler/ir-tac.bas b/src/compiler/ir-tac.bas index fa27cc5200..12550efe6b 100644 --- a/src/compiler/ir-tac.bas +++ b/src/compiler/ir-tac.bas @@ -40,7 +40,8 @@ declare sub hFlushCOMP _ byval v1 as IRVREG ptr, _ byval v2 as IRVREG ptr, _ byval vr as IRVREG ptr, _ - byval label as FBSYMBOL ptr _ + byval label as FBSYMBOL ptr, _ + byval options as IR_EMITOPT _ ) declare sub hFlushSTORE _ @@ -483,10 +484,11 @@ private sub _emitBop _ byval v1 as IRVREG ptr, _ byval v2 as IRVREG ptr, _ byval vr as IRVREG ptr, _ - byval label as FBSYMBOL ptr _ + byval label as FBSYMBOL ptr, _ + byval options as IR_EMITOPT _ ) - _emit( op, v1, v2, vr, label ) + _emit( op, v1, v2, vr, label, options ) end sub @@ -1394,7 +1396,9 @@ private sub _flush static hFlushBOP( op, v1, v2, vr ) case AST_NODECLASS_COMP - hFlushCOMP( op, v1, v2, vr, t->ex1 ) + '' t->ex1 = NULL or label + '' t->ex2 = 0 | IR_EMITOPT_REL_DOINVERSE + hFlushCOMP( op, v1, v2, vr, t->ex1, t->ex2 ) case AST_NODECLASS_ASSIGN hFlushSTORE( op, v1, v2 ) @@ -2035,7 +2039,8 @@ private sub hFlushCOMP _ byval v1 as IRVREG ptr, _ byval v2 as IRVREG ptr, _ byval vr as IRVREG ptr, _ - byval label as FBSYMBOL ptr _ + byval label as FBSYMBOL ptr, _ + byval options as IR_EMITOPT _ ) static dim as string lname @@ -2116,17 +2121,17 @@ private sub hFlushCOMP _ '' select case as const op case AST_OP_EQ - emitEQ( vr, label, v1, v2 ) + emitEQ( vr, label, v1, v2, options ) case AST_OP_NE - emitNE( vr, label, v1, v2 ) + emitNE( vr, label, v1, v2, options ) case AST_OP_GT - emitGT( vr, label, v1, v2 ) + emitGT( vr, label, v1, v2, options ) case AST_OP_LT - emitLT( vr, label, v1, v2 ) + emitLT( vr, label, v1, v2, options ) case AST_OP_LE - emitLE( vr, label, v1, v2 ) + emitLE( vr, label, v1, v2, options ) case AST_OP_GE - emitGE( vr, label, v1, v2 ) + emitGE( vr, label, v1, v2, options ) end select '' diff --git a/src/compiler/ir.bi b/src/compiler/ir.bi index dd1ee8f8d3..433a293dc6 100644 --- a/src/compiler/ir.bi +++ b/src/compiler/ir.bi @@ -37,9 +37,13 @@ enum IR_REGFAMILY end enum enum IR_OPTIONVALUE - IR_OPTIONVALUE_MAXMEMBLOCKLEN = 1 + IR_OPTIONVALUE_MAXMEMBLOCKLEN = 1 end enum +enum IR_EMITOPT + IR_EMITOPT_NONE = 0 + IR_EMITOPT_REL_DOINVERSE = 1 '' Relational, backend needs to invert the logic +end enum '' type IRVREG_ as IRVREG @@ -221,7 +225,8 @@ type IR_VTBL byval v1 as IRVREG ptr, _ byval v2 as IRVREG ptr, _ byval vr as IRVREG ptr, _ - byval label as FBSYMBOL ptr _ + byval label as FBSYMBOL ptr, _ + byval options as IR_EMITOPT _ ) emitUop as sub _ @@ -575,7 +580,7 @@ declare sub vregDump( byval v as IRVREG ptr ) #define irXchgTOS(reg) ir.vtbl.xchgTOS( reg ) -#define irEmitBOP( op, v1, v2, vr, label ) ir.vtbl.emitBop( op, v1, v2, vr, label ) +#define irEmitBOP( op, v1, v2, vr, label, options ) ir.vtbl.emitBop( op, v1, v2, vr, label, options ) #define irEmitUOP(op, v1, vr) ir.vtbl.emitUop( op, v1, vr )