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Ground fill adds a short across the power supply #4254

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Description

@vanepp

Current Behaviour

more information in this Fritzing forum thread (although it is getting very long!)

https://forum.fritzing.org/t/mp3-player-project-pcb/29203

On Fritzing 1.0.5 this sketch

MP3_ESP32_done-no-ground-fill.fzz.zip

when ground filled, causes a short across the 3.3V supply. Running DRC on the ground filled sketch still claims that the sketch is ready for production (although it now has a short across the power supply.)

Image

C5 should look like C6 as it is in parallel with C6. Here is the layout pre copper fill

Image

Run DRC (with the setting changed from 0.01in to 0.007in due to the fpc connector being 05mm pitch and thus won't pass standard DRC setting), DRC passes.

Image

unfortunately running DRC after the copper fill still passes even though there is now a short to ground from the 3.3V net due to the copper fill.

Image

Going back to Fritzing 1.0.4 by default the same error occurs (because it is using the new copper fill code by default)

Image

however changing to the old code

Image

and not selecting fill here (which will use the new code) but rather the old code

Image

appears to work correctly (although I have not done a full check of the gerbers yet!)

Image

I just had the horrible thought that the fpc may be blocking the ground fill on the top layer, but there is a clear path on the bottom layer so the top layer will be ground through the capacitor through hole path.

Build:

Version 1.0.5
(CD-2185-0-b9add9ea 2025-04-02) 64 [Qt 6.5.3]

Operating System:

Windows 10

Steps to reproduce:

See

Current Behaviour

(which incidentally is misspelled!)

Expected Behaviour

The ground fill should work as the old code does in 1.0.4 and preferably DRC should detect and complain about the short (as it is not at all obvious if you don't check the gerbers and know what you are looking for!)

Activity

  1. KjellMorgenstern commented on Jun 17, 2025

    @KjellMorgenstern
    Member

    Isolating the issue. The seems to be a geometry related bug.
    The issue appears when the connectors of C1 are completely surrounded by a copper field. Under the additional condition, that the copper field is separate from the main copper area.

    No problem:
    Image

    Broken:
    Image

  2. vanepp commented on Jun 17, 2025

    @vanepp
    ContributorAuthor

    While I'm far out of my depth here, your example still seems to have a problem. The right side of C1 should connect to the right side of C2 on the bottom layer and be isolated on the top. To me (which may be incorrect) this seems to have still shorted C1 which shouldn't happen as it (in the original case) will short the power supply. To me the no problem and broken cases look identical (broken) as C1 is shorted in both cases unless I am missing something.

  3. KjellMorgenstern commented on Jun 17, 2025

    @KjellMorgenstern
    Member

    Here is the bottom layer view of the the "no problem" example, maybe it is clearer to see that C1 is not shorted in this case?

    Image

    I routed the wire very close to C1 (DRC will complain), but it is not a short.

    isolated_fill1.fzz.zip

    Two more variations. As soon as the copper fill is not isolated, it will respect the connector(s):

    Image

    Not isolated:
    Image

    The layer doesn't play a role here, for example with copper fill only using the top layer, we get the same issue:

    Image

  4. added this to the 1.0.6 milestone on Jun 17, 2025
  5. KjellMorgenstern commented on Jun 17, 2025

    @KjellMorgenstern
    Member

    Fritzing tries to add a connector to ground fills. I am not sure what the use case for these connectors is, since there not much you can use them for after the ground fill was added. Anyway, if there is not enough space for the connector, the complete fragment is turned into a connector. This is was caused this bug. The solution seems to be to simply don't turn the fragment into a connector. It wasn't used as such anyways. I also checked that the solution doesn't affect the heat bridge capapility of the ground fill. Adding a jumper wire also behaves the same:

    Fixed behavior:
    Image

    C1 pin1 is set as ground fill seed, and a jumper was added:
    Image

  6. vanepp commented on Jun 17, 2025

    @vanepp
    ContributorAuthor

    If I understand correctly, I think this should do what I want. That I need is for the ground fill to connect to the left of the isolated capacitor with the right pin isolated as it is now and connected on the bottom layer.

    Image

    so in this image which is the output of your sketch in gerbv, the ground fill would connect to the cap circled in blue on the left and leave the right cap pin isolated and connected to 3.3V on the bottom layer. Is that correct?

  7. KjellMorgenstern commented on Jun 17, 2025

    @KjellMorgenstern
    Member

    I think yes. Most importantly, the pins of the capacitor or any other item will not be connected to the ground fill, unless of course the pin is marked as ground fill seed.

    Since there is no unintended connection in the grebv you posted, there will be no changes, it will look exactly the same after the bugfix.

    In this scenario, the capacitor is only encircled in the top layer, so the bug would not have been triggered for the bottom layer at all. If the cap circled in blue is set as ground fill seed, it would connect to the ground fill fragment (without much effect though, since the fragment has no way to connect to the rest of the copper plane). Any wire to 3.3V on the bottom layer or elsewhere should behave has usual.

  8. vanepp commented on Jun 17, 2025

    @vanepp
    ContributorAuthor

    Excellent, then this should fix the issue (and very quickly too!)

  9. added a commit that references this issue on Jul 20, 2025
    f3e7b35
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