diff --git a/benchmarks/single-core/richards_quick.c b/benchmarks/single-core/richards_quick.c index 246a085..7ee571f 100644 --- a/benchmarks/single-core/richards_quick.c +++ b/benchmarks/single-core/richards_quick.c @@ -375,7 +375,7 @@ void append(struct packet *pkt, struct packet *ptr) int main(void) { - int reps = 25; /* FIXME: 500 */ + int reps = 2; /* FIXME: 500 */ struct packet *wkq = 0; struct task *tasks[NUM_TASKS]; struct packet *pkts[NUM_PKTS]; diff --git a/benchmarks/single-core/richards_quick.elf b/benchmarks/single-core/richards_quick.elf index 35a057c..f837e34 100755 Binary files a/benchmarks/single-core/richards_quick.elf and b/benchmarks/single-core/richards_quick.elf differ diff --git a/revelation/machine.py b/revelation/machine.py index 90a552d..401d1d6 100644 --- a/revelation/machine.py +++ b/revelation/machine.py @@ -61,7 +61,7 @@ def set_first_core(self, value): @property def pc(self): - return self.mem.iread(LOCAL_PC_ADDRESS, 4, from_core=self.coreid) + return self.mem.read(LOCAL_PC_ADDRESS, 4, from_core=self.coreid) @pc.setter def pc(self, value): @@ -69,7 +69,7 @@ def pc(self, value): def fetch_pc(self): # Override method from base class. Needed by Pydgin. - return self.mem.iread(LOCAL_PC_ADDRESS, 4, from_core=self.coreid) + return self.mem.read(LOCAL_PC_ADDRESS, 4, from_core=self.coreid) def get_pending_interrupt(self): ipend_highest_bit = -1 diff --git a/revelation/sim.py b/revelation/sim.py index fe205ea..761a2b1 100644 --- a/revelation/sim.py +++ b/revelation/sim.py @@ -136,7 +136,7 @@ def run(self): sim=self, state=state,) # Fetch next instruction. - opcode = state.mem.iread(pc, 4, from_core=state.coreid) + opcode = state.mem.idempotent_read(pc, 4, from_core=state.coreid) try: # Decode instruction. mnemonic, function = decode(opcode) diff --git a/revelation/storage.py b/revelation/storage.py index 2a5e950..b8de8f7 100644 --- a/revelation/storage.py +++ b/revelation/storage.py @@ -29,7 +29,7 @@ def read(self, start_addr, num_bytes): value = value | ord(self.data[start_addr + i]) return value - def iread(self, start_addr, num_bytes): + def idempotent_read(self, start_addr, num_bytes): """This is instruction read, which is otherwise identical to read. The only difference is the elidable annotation, which we assume the instructions are not modified (no side effects, assumes the addresses @@ -70,7 +70,7 @@ def get_block_mem(self, block_addr): block_mem = self.block_dict[block_addr] return block_mem - def iread(self, start_addr, num_bytes, from_core=0x808): + def idempotent_read(self, start_addr, num_bytes, from_core=0x808): if is_local_address(start_addr): start_addr |= (from_core << 20) end_addr = start_addr + num_bytes - 1 @@ -82,15 +82,15 @@ def iread(self, start_addr, num_bytes, from_core=0x808): # for it. block_end_addr = self.block_mask & end_addr if block_addr == block_end_addr: - value = block_mem.iread(start_addr & self.addr_mask, num_bytes) + value = block_mem.idempotent_read(start_addr & self.addr_mask, num_bytes) else: num_bytes1 = min(self.block_size - (start_addr & self.addr_mask), num_bytes) num_bytes2 = num_bytes - num_bytes1 block_mem1 = block_mem block_mem2 = self.get_block_mem(block_end_addr) - value1 = block_mem1.iread(start_addr & self.addr_mask, num_bytes1) - value2 = block_mem2.iread(0, num_bytes2) + value1 = block_mem1.idempotent_read(start_addr & self.addr_mask, num_bytes1) + value2 = block_mem2.idempotent_read(0, num_bytes2) value = value1 | (value2 << (num_bytes1 * 8)) return value @@ -175,7 +175,7 @@ def __init__(self, memory, coreid, logger): def __getitem__(self, index): address, bitsize, _ = reg_memory_map[index] mask = (1 << bitsize) - 1 - value = self.memory.iread(address, 4, from_core=self.coreid) & mask + value = self.memory.read(address, 4, from_core=self.coreid) & mask if (self.debug.enabled('rf') and self.logger and index < 64 and self.is_first_core): self.logger.log(' :: RD.RF[%s] = %s' % (pad('%d' % index, 2),