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Normalize the sign bit of +nan.0 to negative in the C code generated,…

… regardless of the platform used to compile
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1 parent f46c7c0 commit 46386c4d34bade75204ac273024a601e5c5085d3 @feeley feeley committed Oct 20, 2011
Showing with 7 additions and 5 deletions.
  1. +7 −5 gsc/_t-c-3.scm
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12 gsc/_t-c-3.scm
@@ -1,8 +1,8 @@
;;;============================================================================
-;;; File: "_t-c-3.scm", Time-stamp: <2010-01-14 19:40:19 feeley>
+;;; File: "_t-c-3.scm"
-;;; Copyright (c) 1994-2010 by Marc Feeley, All Rights Reserved.
+;;; Copyright (c) 1994-2011 by Marc Feeley, All Rights Reserved.
(include "generic.scm")
@@ -201,11 +201,13 @@
(e-bits (if f64? 11 8)))
(let ((y (vector-ref z 0)))
- (if (not (< y targ-inexact-+2)) ; +inf.0 or +nan.0?
+ (if (not (< y targ-inexact-+2)) ;; +inf.0 or +nan.0?
(begin
(if (< targ-inexact-+0 y)
- (vector-set! z 0 (expt 2 m-bits)) ; +inf.0
- (vector-set! z 0 (- (* (expt 2 m-bits) 2) 1))) ; +nan.0
+ (vector-set! z 0 (expt 2 m-bits)) ;; +inf.0
+ (begin
+ (vector-set! z 2 -1) ;; normalize sign bit to negative
+ (vector-set! z 0 (- (* (expt 2 m-bits) 2) 1)))) ;; +nan.0
(vector-set! z 1 (expt 2 (- e-bits 1))))
(vector-set! z 0
(truncate

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