diff --git a/src/Audio.md b/src/Audio.md index abbf43bf..74ae7a7f 100644 --- a/src/Audio.md +++ b/src/Audio.md @@ -45,7 +45,7 @@ Thus, durations will be expressed from their frequencies: for example, a "256 Hz The length of APU ticks is not affected by [CGB double speed](<#FF4D — KEY1 (CGB Mode only): Prepare speed switch>), so the APU works just the same regardless of CPU speed. -:::warning +:::warning Terminology The Game Boy's APU is actually full of tricky details; this chapter will mostly describe the intended / common behavior, and often paper over bugs & quirks. Readers wishing to learn more should read the [APU details](<#Audio Details>) chapter. diff --git a/src/Power_Up_Sequence.md b/src/Power_Up_Sequence.md index 1a75a642..92f1c1e7 100644 --- a/src/Power_Up_Sequence.md +++ b/src/Power_Up_Sequence.md @@ -133,7 +133,7 @@ The boot ROM picks a compatibility palette using an ID computed using the follow The resulting palettes ID is used to pick 3 palettes out of a table via a fairly complex mechanism. The user can override this choice using certain button combinations during the logo animation; some of these manual choices are identical to auto-colorizations, [but others are unique](https://tcrf.net/Notes:Game_Boy_Color_Bootstrap_ROM#Manual_Select_Palette_Configurations). -::: tip Available palettes +:::tip Available palettes A table of checksums (and tie-breaker fourth letters when applicable) and the corresponding palettes can be found [on TCRF](https://tcrf.net/Notes:Game_Boy_Color_Bootstrap_ROM#Assigned_Palette_Configurations). diff --git a/src/Timer_and_Divider_Registers.md b/src/Timer_and_Divider_Registers.md index f6eee341..0b0c45a9 100644 --- a/src/Timer_and_Divider_Registers.md +++ b/src/Timer_and_Divider_Registers.md @@ -2,7 +2,7 @@ :::tip NOTE -The Timer described below is the built-in timer in the gameboy. It has +The Timer described below is the built-in timer in the Game Boy. It has nothing to do with the MBC3s battery buffered Real Time Clock - that\'s a completely different thing, described in [Memory Bank Controllers](#MBCs).