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Sign upFix _Unwind_Backtrace() for SEH #48
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…rtin Storsjö <martin@martin.st>
jwakely
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Sep 21, 2020
This patch modifies the MVE scalar shift RTL patterns. The current patterns
have wrong constraints and predicates due to which the values returned from
MVE scalar shift instructions are overwritten in the code-gen.
example:
$ cat x.c
int32_t foo(int64_t acc, int shift)
{
return sqrshrl_sat48 (acc, shift);
}
Code-gen before applying this patch:
$ arm-none-eabi-gcc -march=armv8.1-m.main+mve -mfloat-abi=hard -O2 -S
$ cat x.s
foo:
push {r4, r5}
sqrshrl r0, r1, gcc-mirror#48, r2 ----> (a)
mov r0, r4 ----> (b)
pop {r4, r5}
bx lr
Code-gen after applying this patch:
foo:
sqrshrl r0, r1, gcc-mirror#48, r2
bx lr
In the current compiler the return value (r0) from sqrshrl (a) is getting
overwritten by the mov statement (b).
This patch fixes above issue.
2020-06-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
gcc/
* config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
and constraint of all the operands.
(mve_sqrshrl_sat<supf>_di): Likewise.
(mve_uqrshl_si): Likewise.
(mve_sqrshr_si): Likewise.
(mve_uqshll_di): Likewise.
(mve_urshrl_di): Likewise.
(mve_uqshl_si): Likewise.
(mve_urshr_si): Likewise.
(mve_sqshl_si): Likewise.
(mve_srshr_si): Likewise.
(mve_srshrl_di): Likewise.
(mve_sqshll_di): Likewise.
* config/arm/predicates.md (arm_low_register_operand): Define.
gcc/testsuite/
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts1.c: New test.
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts2.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts3.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts4.c: Likewise.
(cherry picked from commit 6af5987)
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Applies cleanly to GCC 8.3.0, perhaps also much earlier.