Drivers like SD-Card, platform, AHCI, and framebuffer are specified as Exynos5 compliant. But they are at least not compliant with Odroid-XU although this is Exynos5. Thus, prevent tests that rely on such drivers when building for hw_odoid_xu. Furthermore, make previous Arndale regulator/consts.h, uart_defs.h, and some Board_base enums available to all Exynos5 builds to enable at least building the drivers. Fixes #1419
With the new run tool, there is no more is_qemu_available function. However, some scripts still try to use it because only frequently used scripts were updated by now. The commit replaces the function calls with the new 'have_include power_on/qemu' check. Ref #1419
The wifi_drv now provides two reports. The first one contains all accesspoints that were found while scanning the supported frequencies. The second one reports the state of the driver, i.e., if it is conntected to an accesspoint or not. In addition to that, the driver now gets its configuration via a ROM session. More detailed information are available in 'repos/dde_linux/README'. Issue #1415.
* enables world-switch using ARM virtualization extensions * split TrustZone and virtualization extensions hardly from platforms, where it is not used * extend 'Vm_session' interface to enable configuration of guest-physical memory * introduce VM destruction syscall * add virtual machine monitor for hw_arndale that emulates a simplified version of ARM's Versatile Express Cortex A15 board for a Linux guest OS Fixes #1405
To enable support of hardware virtualization for ARM on the Arndale board, the cpu needs to be prepared to enter the non-secure mode, as long as it does not already run in it. Therefore, especially the interrupt controller and some TrustZone specific system registers need to be prepared. Moreover, the exception vector for the hypervisor needs to be set up properly, before booting normally in the supervisor mode of the non-secure world. Ref #1405
The generalization of interrupt objects in the kernel and the use of C++ polymorphism instead of explicitely checking for special interrupts within generic code (Cpu_job::_interrupt) enables the registration of additional interrupts used by the kernel, which are needed for specific aspects added to the kernel, like ARM hardware virtualization interrupts. * Introduce generic base class for interrupt objects handled by the kernel * Derive an interrupt class for those handled by the user-land * Implement IPI-specific interrupt class * Implement timer interrupts using the new generic base class Ref #1405
Until now, one distinct software generated IRQ per cpu was used to send signals between cpus. As ARM's GIC has 16 software generated IRQs only, and they need to be partitioned between secure/non-secure TrustZone world as well as virtual and non-virtual worlds, we should save them. Ref #1405
* name irq controller memory mapped I/O regions consistently in board descriptions * move irq controller and timer memory mapped I/O region descriptions from cpu class to board class * eliminate artificial distinction between flavors of ARM's GIC * factor cpu local initialization out of ARM's GIC interface description, which is needed if the GIC is initialized differently e.g. for TrustZone Ref #1405