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b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
1
2 -- | An architecture independent description of a register.
3 -- This needs to stay architecture independent because it is used
4 -- by NCGMonad and the register allocators, which are shared
5 -- by all architectures.
6 --
1df1986 @igfoo Use -fwarn-tabs when validating
igfoo authored Nov 4, 2011
7
8 {-# OPTIONS -fno-warn-tabs #-}
9 -- The above warning supression flag is a temporary kludge.
10 -- While working on this module you are encouraged to remove it and
11 -- detab the module (please do the detabbing in a separate patch). See
12 -- http://hackage.haskell.org/trac/ghc/wiki/Commentary/CodingStyle#TabsvsSpaces
13 -- for details
14
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
15 module Reg (
16 RegNo,
17 Reg(..),
f928808 Split Reg into vreg/hreg and add register pairs
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18 regPair,
19 regSingle,
20 isRealReg, takeRealReg,
21 isVirtualReg, takeVirtualReg,
22
23 VirtualReg(..),
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
24 renameVirtualReg,
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
25 classOfVirtualReg,
26 getHiVirtualRegFromLo,
27 getHiVRegFromLo,
28
29 RealReg(..),
30 regNosOfRealReg,
31 realRegsAlias,
32
33 liftPatchFnToRegReg
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
34 )
35
36 where
37
38 import Outputable
39 import Unique
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
40 import RegClass
41 import Data.List
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
42
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
43 -- | An identifier for a primitive real machine register.
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
44 type RegNo
45 = Int
46
47 -- VirtualRegs are virtual registers. The register allocator will
48 -- eventually have to map them into RealRegs, or into spill slots.
49 --
50 -- VirtualRegs are allocated on the fly, usually to represent a single
51 -- value in the abstract assembly code (i.e. dynamic registers are
52 -- usually single assignment).
53 --
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
54 -- The single assignment restriction isn't necessary to get correct code,
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
55 -- although a better register allocation will result if single
56 -- assignment is used -- because the allocator maps a VirtualReg into
57 -- a single RealReg, even if the VirtualReg has multiple live ranges.
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
58 --
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
59 -- Virtual regs can be of either class, so that info is attached.
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
60 --
61 data VirtualReg
62 = VirtualRegI {-# UNPACK #-} !Unique
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
63 | VirtualRegHi {-# UNPACK #-} !Unique -- High part of 2-word register
64 | VirtualRegF {-# UNPACK #-} !Unique
65 | VirtualRegD {-# UNPACK #-} !Unique
335b9f3 @simonmar Implement SSE2 floating-point support in the x86 native code generato…
simonmar authored Feb 4, 2010
66 | VirtualRegSSE {-# UNPACK #-} !Unique
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
67 deriving (Eq, Show, Ord)
b04a210 NCG: Split up the native code generator into arch specific modules
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68
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
69 instance Uniquable VirtualReg where
70 getUnique reg
71 = case reg of
72 VirtualRegI u -> u
73 VirtualRegHi u -> u
74 VirtualRegF u -> u
75 VirtualRegD u -> u
335b9f3 @simonmar Implement SSE2 floating-point support in the x86 native code generato…
simonmar authored Feb 4, 2010
76 VirtualRegSSE u -> u
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
77
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Ben.Lippmeier@anu.edu.au authored May 18, 2009
78 instance Outputable VirtualReg where
b04a210 NCG: Split up the native code generator into arch specific modules
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79 ppr reg
80 = case reg of
81 VirtualRegI u -> text "%vI_" <> pprUnique u
82 VirtualRegHi u -> text "%vHi_" <> pprUnique u
83 VirtualRegF u -> text "%vF_" <> pprUnique u
84 VirtualRegD u -> text "%vD_" <> pprUnique u
335b9f3 @simonmar Implement SSE2 floating-point support in the x86 native code generato…
simonmar authored Feb 4, 2010
85 VirtualRegSSE u -> text "%vSSE_" <> pprUnique u
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
86
87
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
88 renameVirtualReg :: Unique -> VirtualReg -> VirtualReg
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
89 renameVirtualReg u r
90 = case r of
91 VirtualRegI _ -> VirtualRegI u
92 VirtualRegHi _ -> VirtualRegHi u
93 VirtualRegF _ -> VirtualRegF u
94 VirtualRegD _ -> VirtualRegD u
335b9f3 @simonmar Implement SSE2 floating-point support in the x86 native code generato…
simonmar authored Feb 4, 2010
95 VirtualRegSSE _ -> VirtualRegSSE u
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
96
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97
98 classOfVirtualReg :: VirtualReg -> RegClass
99 classOfVirtualReg vr
100 = case vr of
101 VirtualRegI{} -> RcInteger
102 VirtualRegHi{} -> RcInteger
103 VirtualRegF{} -> RcFloat
104 VirtualRegD{} -> RcDouble
335b9f3 @simonmar Implement SSE2 floating-point support in the x86 native code generato…
simonmar authored Feb 4, 2010
105 VirtualRegSSE{} -> RcDoubleSSE
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
106
107
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
108 -- Determine the upper-half vreg for a 64-bit quantity on a 32-bit platform
109 -- when supplied with the vreg for the lower-half of the quantity.
110 -- (NB. Not reversible).
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
111 getHiVirtualRegFromLo :: VirtualReg -> VirtualReg
112 getHiVirtualRegFromLo reg
113 = case reg of
114 -- makes a pseudo-unique with tag 'H'
115 VirtualRegI u -> VirtualRegHi (newTagUnique u 'H')
116 _ -> panic "Reg.getHiVirtualRegFromLo"
117
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
118 getHiVRegFromLo :: Reg -> Reg
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
119 getHiVRegFromLo reg
120 = case reg of
121 RegVirtual vr -> RegVirtual (getHiVirtualRegFromLo vr)
122 RegReal _ -> panic "Reg.getHiVRegFromLo"
123
124
125 ------------------------------------------------------------------------------------
126 -- | RealRegs are machine regs which are available for allocation, in
127 -- the usual way. We know what class they are, because that's part of
128 -- the processor's architecture.
129 --
130 -- RealRegPairs are pairs of real registers that are allocated together
131 -- to hold a larger value, such as with Double regs on SPARC.
132 --
133 data RealReg
134 = RealRegSingle {-# UNPACK #-} !RegNo
135 | RealRegPair {-# UNPACK #-} !RegNo {-# UNPACK #-} !RegNo
136 deriving (Eq, Show, Ord)
137
138 instance Uniquable RealReg where
139 getUnique reg
140 = case reg of
388e335 Fix Trac #959: a long-standing bug in instantiating otherwise-unbound…
simonpj@microsoft.com authored Oct 15, 2009
141 RealRegSingle i -> mkRegSingleUnique i
142 RealRegPair r1 r2 -> mkRegPairUnique (r1 * 65536 + r2)
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
143
144 instance Outputable RealReg where
145 ppr reg
146 = case reg of
147 RealRegSingle i -> text "%r" <> int i
148 RealRegPair r1 r2 -> text "%r(" <> int r1 <> text "|" <> int r2 <> text ")"
149
150 regNosOfRealReg :: RealReg -> [RegNo]
151 regNosOfRealReg rr
152 = case rr of
153 RealRegSingle r1 -> [r1]
154 RealRegPair r1 r2 -> [r1, r2]
155
156
157 realRegsAlias :: RealReg -> RealReg -> Bool
158 realRegsAlias rr1 rr2
159 = not $ null $ intersect (regNosOfRealReg rr1) (regNosOfRealReg rr2)
160
161 --------------------------------------------------------------------------------
162 -- | A register, either virtual or real
163 data Reg
0ebb776 Remove useless UNPACK pragmas
simonpj@microsoft.com authored May 6, 2010
164 = RegVirtual !VirtualReg
165 | RegReal !RealReg
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
166 deriving (Eq, Ord)
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
167
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
168 regSingle :: RegNo -> Reg
169 regSingle regNo = RegReal $ RealRegSingle regNo
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
170
f928808 Split Reg into vreg/hreg and add register pairs
Ben.Lippmeier@anu.edu.au authored May 18, 2009
171 regPair :: RegNo -> RegNo -> Reg
172 regPair regNo1 regNo2 = RegReal $ RealRegPair regNo1 regNo2
173
174
175 -- We like to have Uniques for Reg so that we can make UniqFM and UniqSets
176 -- in the register allocator.
177 instance Uniquable Reg where
178 getUnique reg
179 = case reg of
180 RegVirtual vr -> getUnique vr
181 RegReal rr -> getUnique rr
182
183 -- | Print a reg in a generic manner
184 -- If you want the architecture specific names, then use the pprReg
185 -- function from the appropriate Ppr module.
186 instance Outputable Reg where
187 ppr reg
188 = case reg of
189 RegVirtual vr -> ppr vr
190 RegReal rr -> ppr rr
191
192
193 isRealReg :: Reg -> Bool
194 isRealReg reg
195 = case reg of
196 RegReal _ -> True
197 RegVirtual _ -> False
198
199 takeRealReg :: Reg -> Maybe RealReg
200 takeRealReg reg
201 = case reg of
202 RegReal rr -> Just rr
203 _ -> Nothing
204
205
206 isVirtualReg :: Reg -> Bool
207 isVirtualReg reg
208 = case reg of
209 RegReal _ -> False
210 RegVirtual _ -> True
211
212 takeVirtualReg :: Reg -> Maybe VirtualReg
213 takeVirtualReg reg
214 = case reg of
215 RegReal _ -> Nothing
216 RegVirtual vr -> Just vr
217
218
219 -- | The patch function supplied by the allocator maps VirtualReg to RealReg
220 -- regs, but sometimes we want to apply it to plain old Reg.
221 --
222 liftPatchFnToRegReg :: (VirtualReg -> RealReg) -> (Reg -> Reg)
223 liftPatchFnToRegReg patchF reg
224 = case reg of
225 RegVirtual vr -> RegReal (patchF vr)
226 RegReal _ -> reg
227
b04a210 NCG: Split up the native code generator into arch specific modules
Ben.Lippmeier@anu.edu.au authored Feb 15, 2009
228
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