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Fix warning: use clause for package has no effect
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With gcc 8.1 the following message appears:
  warning: use clause for package "*" has no effect
  gnatmake: "*.adb" compilation error
This patch fixes it.
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vicencb authored and tgingold committed May 3, 2018
1 parent b709733 commit 252a916
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Showing 19 changed files with 4 additions and 49 deletions.
2 changes: 0 additions & 2 deletions src/ghdldrv/ghdldrv.adb
Expand Up @@ -1432,8 +1432,6 @@ package body Ghdldrv is

function Missing_Object_File (Design_File : Iir_Design_File) return Boolean
is
use Files_Map;

Name : constant Name_Id := Get_Design_File_Filename (Design_File);
Obj_Pathname : constant String := Get_Object_Filename (Design_File);
Stamp : OS_Time;
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4 changes: 1 addition & 3 deletions src/ghdldrv/ghdllocal.adb
Expand Up @@ -16,7 +16,7 @@
-- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-- 02111-1307, USA.
with Ada.Text_IO; use Ada.Text_IO;
with Ada.Command_Line; use Ada.Command_Line;
with Ada.Command_Line;
with GNAT.Directory_Operations;
with Types; use Types;
with Libraries;
Expand Down Expand Up @@ -1506,8 +1506,6 @@ package body Ghdllocal is
-- Convert NAME to lower cases, unless it is an extended identifier.
function Convert_Name (Name : String_Access) return String_Access
is
use Name_Table;

function Is_Bad_Unit_Name return Boolean is
begin
if Name'Length = 0 then
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4 changes: 0 additions & 4 deletions src/ghdldrv/ghdlprint.adb
Expand Up @@ -1183,10 +1183,6 @@ package body Ghdlprint is
Files : Argument_List)
is
pragma Unreferenced (Cmd);
use Scanner;
use Tokens;
use Files_Map;
use Ada.Characters.Latin_1;

Id : Name_Id;
Fe : Source_File_Entry;
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1 change: 0 additions & 1 deletion src/libraries.adb
Expand Up @@ -1523,7 +1523,6 @@ package body Libraries is
-- FIXME: It may fail if they aren't on the same filesystem, but we
-- could assume it doesn't happen (humm...)
declare
use Files_Map;
File_Name: constant String := Image (Work_Directory)
& Library_To_File_Name (Library) & ASCII.NUL;
Delete_Success : Boolean;
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4 changes: 2 additions & 2 deletions src/options.adb
Expand Up @@ -15,7 +15,7 @@
-- along with GHDL; see the file COPYING. If not, write to the Free
-- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-- 02111-1307, USA.
with Ada.Text_IO; use Ada.Text_IO;
with Ada.Text_IO;
with Name_Table;
with Errorout; use Errorout;
with Libraries;
Expand Down Expand Up @@ -236,7 +236,7 @@ package body Options is
-- Disp help about these options.
procedure Disp_Options_Help
is
procedure P (S : String) renames Put_Line;
procedure P (S : String) renames Ada.Text_IO.Put_Line;
begin
P ("Main options:");
P (" --work=LIB use LIB as work library");
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3 changes: 0 additions & 3 deletions src/vhdl/canon.adb
Expand Up @@ -1722,7 +1722,6 @@ package body Canon is
-- Size the NFA and extract clock sensitivity.
procedure Canon_Psl_Clocked_NFA (Stmt : Iir)
is
use PSL.Nodes;
Fa : constant PSL_NFA := Get_PSL_NFA (Stmt);
Num : Natural;
List : Iir_List;
Expand Down Expand Up @@ -2083,7 +2082,6 @@ package body Canon is

when Iir_Kind_Psl_Assert_Statement =>
declare
use PSL.Nodes;
Prop : PSL_Node;
Fa : PSL_NFA;
begin
Expand All @@ -2100,7 +2098,6 @@ package body Canon is

when Iir_Kind_Psl_Cover_Statement =>
declare
use PSL.Nodes;
Seq : PSL_Node;
Fa : PSL_NFA;
begin
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1 change: 0 additions & 1 deletion src/vhdl/disp_vhdl.adb
Expand Up @@ -3157,7 +3157,6 @@ package body Disp_Vhdl is
procedure Disp_PSL_NFA (N : PSL.Nodes.NFA)
is
use PSL.NFAs;
use PSL.Nodes;

procedure Disp_State (S : NFA_State) is
Str : constant String := Int32'Image (Get_State_Label (S));
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7 changes: 0 additions & 7 deletions src/vhdl/ieee-vital_timing.adb
Expand Up @@ -357,8 +357,6 @@ package body Ieee.Vital_Timing is
-- Checks the port is an input port.
function Check_Input_Port return Iir
is
use Name_Table;

Res : Iir;
begin
Res := Check_Port;
Expand All @@ -380,8 +378,6 @@ package body Ieee.Vital_Timing is
-- Checks the port is an output port.
function Check_Output_Port return Iir
is
use Name_Table;

Res : Iir;
begin
Res := Check_Port;
Expand Down Expand Up @@ -413,8 +409,6 @@ package body Ieee.Vital_Timing is

function Get_Next_Suffix_Kind return Suffixes_Kind
is
use Name_Table;

Len : Natural;
P : constant Natural := Gen_Name_Pos;
C : Character;
Expand Down Expand Up @@ -792,7 +786,6 @@ package body Ieee.Vital_Timing is
(Decl : Iir_Interface_Constant_Declaration; Prefix_Length : Natural)
return Boolean
is
use Name_Table;
begin
-- IEEE 1076.4 4.3.1
-- It is an error for a model to use a timing generic prefix to begin
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1 change: 0 additions & 1 deletion src/vhdl/parse.adb
Expand Up @@ -4936,7 +4936,6 @@ package body Parse is
-- Simply create the node for a bit string.
function Parse_Bit_String return Iir
is
use Str_Table;
Res : Iir;
B : Number_Base_Type;
begin
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1 change: 0 additions & 1 deletion src/vhdl/scanner.adb
Expand Up @@ -1332,7 +1332,6 @@ package body Scanner is
Error_Msg_Option ("8 bits characters not allowed in vhdl87");
end Error_8bit;

use Name_Table;
C : Character;
subtype Id_Subtype is String (1 .. Str'Length);
Id : Id_Subtype renames Str;
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1 change: 0 additions & 1 deletion src/vhdl/sem_decls.adb
Expand Up @@ -2633,7 +2633,6 @@ package body Sem_Decls is

function Sem_Alias_Declaration (Alias : Iir) return Iir
is
use Std_Names;
Name : Iir;
Sig : Iir_Signature;
N_Entity : Iir;
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1 change: 0 additions & 1 deletion src/vhdl/sem_psl.adb
Expand Up @@ -524,7 +524,6 @@ package body Sem_Psl is

procedure Sem_Psl_Endpoint_Declaration (Stmt : Iir)
is
use Sem_Scopes;
Decl : constant Node := Get_Psl_Declaration (Stmt);
Prop : Node;
begin
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2 changes: 0 additions & 2 deletions src/vhdl/sem_scopes.adb
Expand Up @@ -1493,7 +1493,6 @@ package body Sem_Scopes is
procedure Disp_Detailed_Interpretations (Ident : Name_Id)
is
use Ada.Text_IO;
use Name_Table;

Inter: Name_Interpretation_Type;
Decl : Iir;
Expand Down Expand Up @@ -1559,7 +1558,6 @@ package body Sem_Scopes is
procedure Dump_Interpretation (Inter : Name_Interpretation_Type)
is
use Ada.Text_IO;
use Name_Table;

Decl : Iir;
begin
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1 change: 0 additions & 1 deletion src/vhdl/std_package.adb
Expand Up @@ -402,7 +402,6 @@ package body Std_Package is
Set_Design_File_Filename (Std_Standard_File, Std_Filename);

declare
use Str_Table;
Std_Time_Stamp : constant Time_Stamp_String :=
"20020601000000.000";
Id : Time_Stamp_Id;
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2 changes: 1 addition & 1 deletion src/vhdl/translate/ortho_front.adb
Expand Up @@ -18,7 +18,7 @@
with Types; use Types;
with Name_Table;
with Iirs; use Iirs;
with Libraries; use Libraries;
with Libraries;
with Iirs_Utils; use Iirs_Utils;
with Std_Package;
with Flags;
Expand Down
4 changes: 0 additions & 4 deletions src/vhdl/translate/trans-chap12.adb
Expand Up @@ -424,10 +424,7 @@ package body Trans.Chap12 is
-- Write to file FILELIST all the files that are needed to link the design.
procedure Gen_Stubs
is
use Interfaces.C_Streams;
use System;
use Configuration;
use Name_Table;

-- Add all dependences of UNIT.
-- UNIT is not used, but added during link.
Expand Down Expand Up @@ -595,7 +592,6 @@ package body Trans.Chap12 is
Filelist : String;
Whole : Boolean)
is
use Name_Table;
use Configuration;

Unit : Iir_Design_Unit;
Expand Down
10 changes: 0 additions & 10 deletions src/vhdl/translate/trans-chap7.adb
Expand Up @@ -168,8 +168,6 @@ package body Trans.Chap7 is
Str : Iir;
El_Type : Iir)
is
use Name_Table;

Literal_List : constant Iir_Flist :=
Get_Enumeration_Literal_List (Get_Base_Type (El_Type));
Len : constant Nat32 := Get_String_Length (Str);
Expand Down Expand Up @@ -272,8 +270,6 @@ package body Trans.Chap7 is

function Translate_Static_String_Literal8 (Str : Iir) return O_Cnode
is
use Name_Table;

Lit_Type : constant Iir := Get_Type (Str);
Element_Type : constant Iir := Get_Element_Subtype (Lit_Type);
Arr_Type : O_Tnode;
Expand All @@ -297,8 +293,6 @@ package body Trans.Chap7 is
function Create_String_Literal_Var_Inner
(Str : Iir; Element_Type : Iir; Str_Type : O_Tnode) return Var_Type
is
use Name_Table;

Val_Aggr : O_Array_Aggr_List;
Res : O_Cnode;
begin
Expand All @@ -319,8 +313,6 @@ package body Trans.Chap7 is
-- Create a variable (constant) for string or bit string literal STR.
function Create_String_Literal_Var (Str : Iir) return Var_Type
is
use Name_Table;

Str_Type : constant Iir := Get_Type (Str);
Arr_Type : O_Tnode;
begin
Expand All @@ -339,8 +331,6 @@ package body Trans.Chap7 is
-- because it is not so in VHDL!
function Translate_Non_Static_String_Literal (Str : Iir) return O_Enode
is
use Name_Table;

Len : constant Nat32 := Get_String_Length (Str);
Lit_Type : constant Iir := Get_Type (Str);
Type_Info : constant Type_Info_Acc := Get_Info (Lit_Type);
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3 changes: 0 additions & 3 deletions src/vhdl/translate/trans-chap9.adb
Expand Up @@ -326,9 +326,6 @@ package body Trans.Chap9 is

procedure Translate_Psl_Directive_Declarations (Stmt : Iir)
is
use PSL.Nodes;
use PSL.NFAs;

Mark : Id_Mark_Type;
Info : Ortho_Info_Acc;
begin
Expand Down
1 change: 0 additions & 1 deletion src/vhdl/translate/translation.adb
Expand Up @@ -105,7 +105,6 @@ package body Translation is

function Translate_Foreign_Id (Decl : Iir) return Foreign_Info_Type
is
use Name_Table;
-- Look for 'FOREIGN.
Attr : constant Iir_Attribute_Value :=
Sem_Specs.Find_Attribute_Value (Decl, Std_Names.Name_Foreign);
Expand Down

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