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gokhankici committed May 9, 2019
1 parent 6af2e85 commit 9a0137c7db017cf75b2642f911f7bcd84d8069fd
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  2. +5 −2 iverilog-parser/README.md
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# Benchmarks

1. [MIPS Pipeline](472-mips-pipelined)


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# Verilog -> Prolog IR
# Verilog -> Iodine IR

Transforms Verilog into Iodine intermediate representation. The implementation
is based on [Icarus Verilog](https://github.com/steveicarus/iverilog).

## Dependencies

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* bison
* zsh

Tested on Xubuntu 17.04, *might work* on a Mac.
Tested on Ubuntu 18.10, *might work* on a Mac.

## Instructions

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