Skip to content
Branch: master
Find file History
Fetching latest commit…
Cannot retrieve the latest commit at this time.

Files

Permalink
Type Name Latest commit message Commit time
..
Failed to load latest commit information.
ivlpp
.gitignore
AStatement.cc
AStatement.h
Attrib.cc
Attrib.h
COPYING
COPYING.lesser
ExprVisitor.h
HName.cc
HName.h
INSTALL
LineInfo.cc
LineInfo.h
Makefile
Module.cc
Module.h
PClass.cc
PClass.h
PDelays.cc
PDelays.h
PEvent.cc
PEvent.h
PExpr.cc
PExpr.h
PFunction.cc
PGate.cc
PGate.h
PGenerate.cc
PGenerate.h
PModport.cc
PModport.h
PPackage.cc
PPackage.h
PScope.cc
PScope.h
PSpec.cc
PSpec.h
PTask.cc
PTask.h
PUdp.cc
PUdp.h
PWire.cc
PWire.h
PrologExporter.cc
PrologExporter.h
README.md
Statement.cc
Statement.h
StringHeap.cc
StringHeap.h
Visitor.h
_pli_types.h
acc_user.h
async.cc
check.conf
compiler.h
config.h
cprop.cc
design_dump.cc
discipline.cc
discipline.h
dup_expr.cc
elab_expr.cc
elab_lval.cc
elab_net.cc
elab_scope.cc
elab_sig.cc
elab_sig_analog.cc
elab_type.cc
elaborate.cc
elaborate_analog.cc
emit.cc
eval.cc
eval_attrib.cc
eval_tree.cc
expr_synth.cc
functor.cc
functor.h
ivl.sh
ivl_alloc.h
ivl_assert.h
ivl_target.h
ivl_target_priv.h
lexor.cc
lexor.lex
lexor_keyword.cc
lexor_keyword.gperf
lexor_keyword.h
link_const.cc
load_module.cc
main.cc
named.h
net_analog.cc
net_assign.cc
net_design.cc
net_event.cc
net_expr.cc
net_func.cc
net_func_eval.cc
net_link.cc
net_modulo.cc
net_nex_input.cc
net_nex_output.cc
net_proc.cc
net_scope.cc
net_tran.cc
net_udp.cc
netclass.cc
netclass.h
netdarray.cc
netdarray.h
netenum.cc
netenum.h
netlist.cc
netlist.h
netmisc.cc
netmisc.h
netparray.cc
netparray.h
netqueue.cc
netqueue.h
netscalar.cc
netscalar.h
netstruct.cc
netstruct.h
nettypes.cc
nettypes.h
netvector.cc
netvector.h
nodangle.cc
pad_to_width.cc
parse.cc
parse.h
parse.y
parse_api.h
parse_misc.cc
parse_misc.h
pform.cc
pform.h
pform_analog.cc
pform_class_type.cc
pform_disciplines.cc
pform_dump.cc
pform_package.cc
pform_pclass.cc
pform_string_type.cc
pform_struct_type.cc
pform_types.cc
pform_types.h
property_qual.h
sv_vpi_user.h
svector.h
symbol_search.cc
syn-rules.cc
syn-rules.y
sync.cc
synth.cc
synth2.cc
sys_funcs.cc
t-dll-analog.cc
t-dll-api.cc
t-dll-expr.cc
t-dll-proc.cc
t-dll.cc
t-dll.h
target.cc
target.h
util.h
verinum.cc
verinum.h
verireal.cc
verireal.h
veriuser.h
version.c
version_base.h
version_tag.h
vpi_user.h

README.md

Verilog -> Iodine IR

Transforms Verilog into Iodine intermediate representation. The implementation is based on Icarus Verilog.

Dependencies

  • g++
  • make
  • flex
  • bison
  • zsh

Tested on Ubuntu 18.10, might work on a Mac.

Instructions

$> make
$> ./ivl.sh [args to ivl ... ] <verilog file>
You can’t perform that action at this time.