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exynos4: Disable SW downclock in cpuidle

The Samsung 3.0.x source includes a new exynos4 feature:
reducing CPU clock when in idle.  However, this seems
pointless as the CPU clock gets gated in this state anyway.

Also, the logic for doing this seems to sometimes hang,
as there are occasional cases of the RCU stall detector
going off due to CPU1 getting stuck in exynos4_enter_idle()

This issue seems to go away when disabling the SW downclock
feature with not much negative effect on battery, so disable
it for now until it can be revisited.

Signed-off-by: Andrew Dodd <>
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1 parent 9057195 commit 1972c07dffa391d191e6a3b5288757d8b02b8d14 @Entropy512 Entropy512 committed with Apr 4, 2012
Showing with 2 additions and 0 deletions.
  1. +2 −0 arch/arm/mach-exynos/cpuidle-exynos4.c
@@ -678,6 +678,7 @@ static int exynos4_enter_idle(struct cpuidle_device *dev,
+#if 0
if (use_clock_down == SW_CLK_DWN) {
/* USE SW Clock Down */
cpu = get_cpu();
@@ -717,6 +718,7 @@ static int exynos4_enter_idle(struct cpuidle_device *dev,
} else

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