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cmd/compile: generate MOVZX instead of AND where applicable #15105
I noticed that for uint&0xFF go tip on amd64 generates e.g.:
0x001d 00029 (main.go:10) MOVQ "".u+8(FP), DX
It might be possible to make these a zero latency MOV that does not require an ALU by using MOVZX for the applicable AND values or it might be possible to change the previous load to be MOVZX.
0x0022 00034 (main.go:10) MOVBQZX DL, DX
See "Intel 64 and IA-32 Architectures Optimization Reference Manual" Section: "18.104.22.168 Zero-Latency MOV Instructions"
pushed a commit
Apr 6, 2016
So we are now rewriting the AND to a MOVZX.
Alexandru is right, combining the extension with the load in
The LoadReg case reminds me a lot of #15300.
I know you have serious reservations about a post-regalloc peep pass, Keith, but it does seem like it might be the right way to handle this small, specific class of optimizations. And perhaps with docs and code review we could keep it from growing past the bare minimum necessary.