The SSA compiler currently generates MOVOstore instructions to optimize 16 bytes moves on AMD64 architecture.
These instructions were added in CL 16174.
See AMD64.rules:322 and AMD64.rules:351
However, we can't use the MOVOstore instruction on Plan 9, because floating point operations are not allowed in the note handler.
We should disable use of MOVOstore instruction on Plan 9, using the useSSE flag (disabled on Plan 9).
The SSA compiler currently generates MOVOstore instructions to optimize 16 bytes moves on AMD64 architecture.
These instructions were added in CL 16174.
See AMD64.rules:322 and AMD64.rules:351
However, we can't use the MOVOstore instruction on Plan 9, because floating point operations are not allowed in the note handler.
We should disable use of MOVOstore instruction on Plan 9, using the useSSE flag (disabled on Plan 9).