CL 98695 (commit 080187f) adds OpAMD64CMOV{Q,L,W}EQF. The generated assembly looks like:
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// MOV SRC,AX |
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// CMOV*NE DST,AX |
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// CMOV*PC AX,DST |
That is, it uses AX as a scratch register so that it can check both equality and NAN-ness. (I think.) The problem is, regalloc doesn't know about this:
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{name: "CMOVLEQF", argLength: 3, reg: gp21, asm: "CMOVLNE", resultInArg0: true}, |
gp21 doesn't have
clobbers:ax.
I don't have a public repro, but given the below assembly I'm pretty sure I'm in the neighborhood of the problem. The three MOVLs clearly don't make sense.
v677 00341 (287) UCOMISD X1, X0
v292 00342 (287) MOVL $2, AX
v287 00343 (287) MOVL $1, CX
v456 00344 (287) MOVL CX, AX
v456 00345 (287) CMOVLNE AX, AX
v456 00346 (287) CMOVLPC AX, AX
v460 00347 (287) MOVL AX, "".~r2+24(SP)
b196 00348 (35) RET
cc @randall77 @TocarIP @rasky
This is Google-internal b/110810807.
CL 98695 (commit 080187f) adds OpAMD64CMOV{Q,L,W}EQF. The generated assembly looks like:
go/src/cmd/compile/internal/amd64/ssa.go
Lines 461 to 463 in d144dd7
That is, it uses AX as a scratch register so that it can check both equality and NAN-ness. (I think.) The problem is, regalloc doesn't know about this:
go/src/cmd/compile/internal/ssa/gen/AMD64Ops.go
Line 400 in d144dd7
gp21doesn't haveclobbers:ax.I don't have a public repro, but given the below assembly I'm pretty sure I'm in the neighborhood of the problem. The three MOVLs clearly don't make sense.
cc @randall77 @TocarIP @rasky
This is Google-internal b/110810807.