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x/arch/x86/x86asm: missing Control-flow Enforcement instructions; e.g. ENDBR64 #35865

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mewmew opened this issue Nov 27, 2019 · 1 comment
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@mewmew
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@mewmew mewmew commented Nov 27, 2019

As a follow-up of #18665, instructions related to Control-flow Enforcement are currently not recognized by the x/arch/x86 disassembler.

Example link at play.golang.org: https://play.golang.org/p/xz6V8cSREWF

package main

import (
	"fmt"

	"golang.org/x/arch/x86/x86asm"
)

func main() {
	// ref: Section 7.1: ENDBR64 of "Control-flow Enforcement Technology Specification"
	//
	// https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
	text := []byte{0xF3, 0x0F, 0x1E, 0xFA} // endbr64
	inst, err := x86asm.Decode(text[:], 64)
	if err != nil {
		panic(err)
	}
	fmt.Println("inst:", inst)
	// Expected: ENDBR64
	// Got:      REP Op(0)
}

At rev golang/arch@368ea8f, the ENDBR64 instruction is incorrectly recognized as REP Op(0) without reporting any error from decode. The ENDBR64 instruction has the byte sequence 0xF3, 0x0F, 0x1E, 0xFA and was introduced as part of the Control-flow Enforcement Technology Specification: https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf

/cc: @rsc @minux

@TACIXAT
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@TACIXAT TACIXAT commented May 17, 2021

This affects me too.

Happy to give fixing it a shot if someone provides points on where the code that needs to be changed is. Thanks!

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4 participants