cmd/compile: AMD64 AVX-512 register allocation is limited to lower 16 ZMM registers

[Eyalcfish]

I've tried to benchmark an ssa optimization ive written for turning normal avx512 boolean operations to optimized VPTERNLOG instructions, after benchmarking and comparing to several other compilers, it seems that the go compiler is limited to using 16 zmm registers at a time(for my example it was 15 registers and 14 spills), I've discussed with @Jorropo who entered the code to check the theory and found that infact something is not 100% right in there. here are links

go/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

Lines 1349 to 1350 in a1e7a41

	{name: "VMOVDQUload512", argLength: 2, reg: fpload, asm: "VMOVDQU64", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"}, // load from arg0+auxint+aux, arg1 = mem
	{name: "VMOVDQUstore512", argLength: 3, reg: fpstore, asm: "VMOVDQU64", aux: "SymOff", faultOnNilArg0: true, symEffect: "Write"}, // store, *(arg0+auxint+aux) = arg1, arg2 = mem

go/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

Lines 1364 to 1371 in a1e7a41

	{name: "VPMASK8load512", argLength: 3, reg: vloadk, asm: "VMOVDQU8", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"}, // load from arg0+auxint+aux, arg1=k mask, arg2 = mem
	{name: "VPMASK8store512", argLength: 4, reg: vstorek, asm: "VMOVDQU8", aux: "SymOff", faultOnNilArg0: true, symEffect: "Write"}, // store, *(arg0+auxint+aux) = arg2, arg1=k mask, arg3 = mem
	{name: "VPMASK16load512", argLength: 3, reg: vloadk, asm: "VMOVDQU16", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"}, // load from arg0+auxint+aux, arg1=k mask, arg2 = mem
	{name: "VPMASK16store512", argLength: 4, reg: vstorek, asm: "VMOVDQU16", aux: "SymOff", faultOnNilArg0: true, symEffect: "Write"}, // store, *(arg0+auxint+aux) = arg2, arg1=k mask, arg3 = mem
	{name: "VPMASK32load512", argLength: 3, reg: vloadk, asm: "VMOVDQU32", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"}, // load from arg0+auxint+aux, arg1=k mask, arg2 = mem
	{name: "VPMASK32store512", argLength: 4, reg: vstorek, asm: "VMOVDQU32", aux: "SymOff", faultOnNilArg0: true, symEffect: "Write"}, // store, *(arg0+auxint+aux) = arg2, arg1=k mask, arg3 = mem
	{name: "VPMASK64load512", argLength: 3, reg: vloadk, asm: "VMOVDQU64", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"}, // load from arg0+auxint+aux, arg1=k mask, arg2 = mem
	{name: "VPMASK64store512", argLength: 4, reg: vstorek, asm: "VMOVDQU64", aux: "SymOff", faultOnNilArg0: true, symEffect: "Write"}, // store, *(arg0+auxint+aux) = arg2, arg1=k mask, arg3 = mem

it's using v... like vloadk (the first 16-1 registers) instead of w... like wloadk (32-1 registers)

[gabyhelp]

Related Issues

• simd/archsimd: AVX instructions do not make use of memory operands #78159
• x/arch/x86/x86asm: add AVX-256 and AVX-512 registers and instructions #47307
• cmd/compile: register allocation of rematerializable ops ignores the op output register constraints. #70451 (closed)
• simd/archsimd: Generated code doesn't use Y15 but spills register to stack #76969 (closed)
• cmd/compile/internal/ssa: regalloc handles arguments poorly #14597 (closed)
• cmd/compile: don't move/copy rematerializeable op when allocating registers #55039 (closed)
• cmd/internal/obj/x86: AVX512 design #22779 (closed)

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[gopherbot]

Change https://go.dev/cl/767380 mentions this issue: cmd/compile/internal/ssa use all 32 zmm registers if using GOAMD64=v4 or higher

[gopherbot]

Change https://go.dev/cl/768262 mentions this issue: [dev.simd] cmd/compile: make X/Y/Z16-31 allocatable