From 820e83cec046c101ffe6234be407f298009ff9d6 Mon Sep 17 00:00:00 2001
From: Graham Edgecombe <gpe@grahamedgecombe.com>
Date: Sun, 30 Dec 2018 20:40:10 +0000
Subject: [PATCH] Increase RAM size to 32 KiB on ECP5 devices

---
 Makefile                                  |  2 +-
 arch/ecp5-flash.lds                       | 42 +++++++++++++++++++++++
 arch/ecp5-ram.lds                         | 35 +++++++++++++++++++
 progmem-flash.lds => arch/ice40-flash.lds |  0
 progmem-ram.lds => arch/ice40-ram.lds     |  0
 icicle.sv                                 | 10 +++++-
 6 files changed, 87 insertions(+), 2 deletions(-)
 create mode 100644 arch/ecp5-flash.lds
 create mode 100644 arch/ecp5-ram.lds
 rename progmem-flash.lds => arch/ice40-flash.lds (100%)
 rename progmem-ram.lds => arch/ice40-ram.lds (100%)

diff --git a/Makefile b/Makefile
index 67cd2e6..9b97ff4 100644
--- a/Makefile
+++ b/Makefile
@@ -59,7 +59,7 @@ defines.sv: boards/$(BOARD)-defines.sv
 start.s: start-$(PROGMEM).s
 	cp $< $@
 
-progmem.lds: progmem-$(PROGMEM).lds
+progmem.lds: arch/$(ARCH)-$(PROGMEM).lds
 	cp $< $@
 
 time: $(TIME_RPT)
diff --git a/arch/ecp5-flash.lds b/arch/ecp5-flash.lds
new file mode 100644
index 0000000..9a9034b
--- /dev/null
+++ b/arch/ecp5-flash.lds
@@ -0,0 +1,42 @@
+ENTRY(start)
+
+MEMORY {
+    bram (rwx) : ORIGIN = 0x00000000, LENGTH = 32K
+    flash (rx) : ORIGIN = 0x01100000, LENGTH = 3M
+}
+
+SECTIONS {
+    .text : {
+        start.o(.text);
+        *(.text);
+        *(.text.*);
+    } > flash
+
+    .data : ALIGN(4) {
+        *(.data);
+        *(.data.*);
+
+        . = ALIGN(4);
+    } > bram AT> flash
+
+    .rodata : {
+        *(.rodata);
+        *(.rodata.*);
+    } > flash
+
+    .bss : ALIGN(4) {
+        *(.bss);
+        *(.bss.*);
+
+        . = ALIGN(4);
+    } > bram
+
+    bss_start = ADDR(.bss);
+    bss_end = bss_start + SIZEOF(.bss);
+
+    data_flash_start = LOADADDR(.data);
+    data_start = ADDR(.data);
+    data_end = data_start + SIZEOF(.data);
+
+    stack_top = ORIGIN(bram) + LENGTH(bram);
+}
diff --git a/arch/ecp5-ram.lds b/arch/ecp5-ram.lds
new file mode 100644
index 0000000..f5973ac
--- /dev/null
+++ b/arch/ecp5-ram.lds
@@ -0,0 +1,35 @@
+ENTRY(start)
+
+MEMORY {
+    bram (rwx) : ORIGIN = 0x00000000, LENGTH = 32K
+}
+
+SECTIONS {
+    .text : {
+        start.o(.text);
+        *(.text);
+        *(.text.*);
+    } > bram
+
+    .data : {
+        *(.data);
+        *(.data.*);
+    } > bram
+
+    .rodata : {
+        *(.rodata);
+        *(.rodata.*);
+    } > bram
+
+    .bss : ALIGN(4) {
+        *(.bss);
+        *(.bss.*);
+
+        . = ALIGN(4);
+    } > bram
+
+    bss_start = ADDR(.bss);
+    bss_end = bss_start + SIZEOF(.bss);
+
+    stack_top = ORIGIN(bram) + LENGTH(bram);
+}
diff --git a/progmem-flash.lds b/arch/ice40-flash.lds
similarity index 100%
rename from progmem-flash.lds
rename to arch/ice40-flash.lds
diff --git a/progmem-ram.lds b/arch/ice40-ram.lds
similarity index 100%
rename from progmem-ram.lds
rename to arch/ice40-ram.lds
diff --git a/icicle.sv b/icicle.sv
index 360ba08..bda3441 100644
--- a/icicle.sv
+++ b/icicle.sv
@@ -5,6 +5,12 @@
 `include "timer.sv"
 `include "uart.sv"
 
+`ifdef ECP5
+`define RAM_SIZE 8192
+`else
+`define RAM_SIZE 2048
+`endif
+
 `ifdef SPI_FLASH
 `define RESET_VECTOR 32'h01100000
 `else
@@ -154,7 +160,9 @@ module icicle (
     logic [31:0] ram_read_value;
     logic ram_ready;
 
-    ram ram (
+    ram #(
+        .SIZE(`RAM_SIZE)
+    ) ram (
         .clk(clk),
         .reset(reset),