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0c4490c @gregkh initial 4.40 import
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1 /**************************************************************************
2 * Copyright (c) 2007, Intel Corporation.
3 * All Rights Reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
19 * develop this driver.
20 *
21 **************************************************************************/
22 /*
23 * Authors: Thomas Hellstrom <thomas-at-tungstengraphics.com>
24 */
25
26 #ifndef _PSB_SCHEDULE_H_
27 #define _PSB_SCHEDULE_H_
28
29 #include "drmP.h"
30
31 enum psb_task_type {
32 psb_ta_midscene_task,
33 psb_ta_task,
34 psb_raster_task,
35 psb_freescene_task
36 };
37
38 #define PSB_MAX_TA_CMDS 60
39 #define PSB_MAX_RASTER_CMDS 60
40 #define PSB_MAX_OOM_CMDS 6
41
42 struct psb_xhw_buf {
43 struct list_head head;
44 int copy_back;
45 atomic_t done;
46 struct drm_psb_xhw_arg arg;
47
48 };
49
50 struct psb_feedback_info {
51 struct drm_buffer_object *bo;
52 struct page *page;
53 uint32_t offset;
54 };
55
56 struct psb_task {
57 struct list_head head;
58 struct psb_scene *scene;
59 struct psb_feedback_info feedback;
60 enum psb_task_type task_type;
61 uint32_t engine;
62 uint32_t sequence;
63 uint32_t ta_cmds[PSB_MAX_TA_CMDS];
64 uint32_t raster_cmds[PSB_MAX_RASTER_CMDS];
65 uint32_t oom_cmds[PSB_MAX_OOM_CMDS];
66 uint32_t ta_cmd_size;
67 uint32_t raster_cmd_size;
68 uint32_t oom_cmd_size;
69 uint32_t feedback_offset;
70 uint32_t ta_complete_action;
71 uint32_t raster_complete_action;
72 uint32_t hw_cookie;
73 uint32_t flags;
74 uint32_t reply_flags;
75 uint32_t aborting;
76 struct psb_xhw_buf buf;
77
78 #ifdef PSB_DETEAR
79 uint32_t bVideoFlag;
80 uint32_t x, y, w, h;
81 uint32_t pFBBOHandle;
82 void *pFBVirtAddr;
83 #endif
84 };
85
86 struct psb_hw_scene {
87 struct list_head head;
88 uint32_t context_number;
89
90 /*
91 * This pointer does not refcount the last_scene_buffer,
92 * so we must make sure it is set to NULL before destroying
93 * the corresponding task.
94 */
95
96 struct psb_scene *last_scene;
97 };
98
99 struct psb_scene;
100 struct drm_psb_private;
101
102 struct psb_scheduler_seq {
103 uint32_t sequence;
104 int reported;
105 };
106
107 struct psb_scheduler {
108 struct drm_device *dev;
109 struct psb_scheduler_seq seq[_PSB_ENGINE_TA_FENCE_TYPES];
110 struct psb_hw_scene hs[PSB_NUM_HW_SCENES];
111 struct mutex task_wq_mutex;
112 spinlock_t lock;
113 struct list_head hw_scenes;
114 struct list_head ta_queue;
115 struct list_head raster_queue;
116 struct list_head hp_raster_queue;
117 struct list_head task_done_queue;
118 struct psb_task *current_task[PSB_SCENE_NUM_ENGINES];
119 struct psb_task *feedback_task;
120 int ta_state;
121 struct psb_hw_scene *pending_hw_scene;
122 uint32_t pending_hw_scene_seq;
123 struct delayed_work wq;
124 struct psb_scene_pool *pool;
125 uint32_t idle_count;
126 int idle;
127 wait_queue_head_t idle_queue;
128 unsigned long ta_end_jiffies;
129 unsigned long raster_end_jiffies;
130 unsigned long total_raster_jiffies;
131 };
132
133 #define PSB_RF_FIRE_TA (1 << 0)
134 #define PSB_RF_OOM (1 << 1)
135 #define PSB_RF_OOM_REPLY (1 << 2)
136 #define PSB_RF_TERMINATE (1 << 3)
137 #define PSB_RF_TA_DONE (1 << 4)
138 #define PSB_RF_FIRE_RASTER (1 << 5)
139 #define PSB_RF_RASTER_DONE (1 << 6)
140 #define PSB_RF_DEALLOC (1 << 7)
141
142 extern struct psb_scene_pool *psb_alloc_scene_pool(struct drm_file *priv,
143 int shareable, uint32_t w,
144 uint32_t h);
145 extern uint32_t psb_scene_handle(struct psb_scene *scene);
146 extern int psb_scheduler_init(struct drm_device *dev,
147 struct psb_scheduler *scheduler);
148 extern void psb_scheduler_takedown(struct psb_scheduler *scheduler);
149 extern int psb_cmdbuf_ta(struct drm_file *priv,
150 struct drm_psb_cmdbuf_arg *arg,
151 struct drm_buffer_object *cmd_buffer,
152 struct drm_buffer_object *ta_buffer,
153 struct drm_buffer_object *oom_buffer,
154 struct psb_scene *scene,
155 struct psb_feedback_info *feedback,
156 struct drm_fence_arg *fence_arg);
157 extern int psb_cmdbuf_raster(struct drm_file *priv,
158 struct drm_psb_cmdbuf_arg *arg,
159 struct drm_buffer_object *cmd_buffer,
160 struct drm_fence_arg *fence_arg);
161 extern void psb_scheduler_handler(struct drm_psb_private *dev_priv,
162 uint32_t status);
163 extern void psb_scheduler_pause(struct drm_psb_private *dev_priv);
164 extern void psb_scheduler_restart(struct drm_psb_private *dev_priv);
165 extern int psb_scheduler_idle(struct drm_psb_private *dev_priv);
166 extern int psb_scheduler_finished(struct drm_psb_private *dev_priv);
167
168 extern void psb_scheduler_lockup(struct drm_psb_private *dev_priv,
169 int *lockup, int *idle);
170 extern void psb_scheduler_reset(struct drm_psb_private *dev_priv,
171 int error_condition);
172 extern int psb_forced_user_interrupt(struct drm_psb_private *dev_priv);
173 extern void psb_scheduler_remove_scene_refs(struct psb_scene *scene);
174 extern void psb_scheduler_ta_mem_check(struct drm_psb_private *dev_priv);
175 extern int psb_extend_raster_timeout(struct drm_psb_private *dev_priv);
176
177 #endif
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