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remove some files not needed

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commit c4ad47e54d77f7b2790b6ca3f43f7a947427826e 1 parent 4c1b7e4
@gregkh authored
View
170 Module.symvers
@@ -1,170 +0,0 @@
-0xec0b9aa7 drm_agp_enable /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x19a5d416 drm_fence_buffer_objects /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xcbd39421 drm_mm_takedown /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x4aed9e34 drm_bo_mem_space /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x4523014f drm_bo_same_page /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xd346e65f drm_bind_ttm /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xaf066e03 drm_unlocked_ioctl /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xe01a1623 drm_core_get_reg_ofs /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xbf50424d drm_output_create /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xdf5dde71 drm_agp_unbind /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x7367e1e7 drm_bo_wait /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xfd6a08de drm_pci_free /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xad526b53 drm_idlelock_release /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x47036576 drm_mode_detachmode_crtc /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xc0269560 drm_get_acpi_edid /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x51934f2d drm_fence_reference_unlocked /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x5af91530 drm_agp_bind /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xe507d04a drm_ddc_read /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x084c7461 psbfb_remove /root/Build/d2b25/psb-kmd/psb EXPORT_SYMBOL
-0x0da56f3e drm_idlelock_take /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x3b56ff17 drm_init /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x617cb177 drm_mode_config_init /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x8239076d drm_lookup_buffer_object /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x231c9e75 drm_remove_ref_object /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x945ef06f drm_mode_config_cleanup /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x0ac697a0 drm_fence_add_user_object /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x416b0d64 drm_vbl_send_signals /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x77bc9429 drm_init_mode /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x117d47f0 drm_irq_uninstall /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x4398f2be drm_exit /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xcc2bf129 drm_mode_equal /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x554a8bfb drm_framebuffer_create /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x55edfaa0 drm_core_ioremapfree /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL_GPL
-0x4b8082b9 drm_mm_put_block /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x51e14fa8 drm_get_dev /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x34c04f63 drm_mode_remove /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xd08773ff drm_ioctl /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x8b14a555 drm_mode_duplicate /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x5dd678b5 drm_mem_reg_ioremap /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x6f2550f0 drm_output_destroy /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x851ce484 drm_initial_config /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x7d55b161 drm_agp_init_ttm /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xd3028e75 drm_sman_set_manager /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xfdfbad19 drm_sman_alloc /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xe2cd7729 drm_get_resource_start /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x21451ac4 drm_sman_owner_cleanup /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x7b070d44 drm_irq_install /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xb3567652 drm_bo_read_unlock /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x82c7ee40 drm_fence_usage_deref_unlocked /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xf9f3bf78 drm_crtc_create /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xa77cf4be drm_crtc_destroy /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x7d1e4685 drm_regs_add /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xaa04a2a0 drm_init_pat /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xbfae7e71 drm_bo_vm_nopfn /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xdbf5e280 drm_mode_validate_clocks /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xd2264a86 drm_rmmap_locked /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x5e5735b8 drm_add_user_object /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x28f4d102 drm_pick_crtcs /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x6ab3fc42 drm_get_edid /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x9c126f4a drm_mode_attachmode_crtc /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x2916bf63 drm_sman_cleanup /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xbb22b903 drm_fasync /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x81c4b9f7 drm_bo_driver_finish /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xb3a6456b drm_psb_debug /root/Build/d2b25/psb-kmd/psb EXPORT_SYMBOL
-0xd863a675 drm_crtc_in_use /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xf6267b74 drm_bo_kmap /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x0836695c drm_sman_takedown /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xfc220376 drm_poll /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x8be23752 drm_regs_init /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xb1d461d6 drm_bo_move_accel_cleanup /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x2eb43a03 drm_i_have_hw_lock /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xc6624b31 drm_mmap /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x1f9ed8fb drm_bo_move_memcpy /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x3bf23318 drm_agp_alloc /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xb5d363e6 drm_bo_usage_deref_unlocked /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x2eb2f903 drm_sman_free_key /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xc9e81314 drm_sg_alloc /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x6c4c14f2 drm_fence_object_wait /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x5ec27103 drm_fence_object_emit /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x4c0d75d9 ati_pcigart_init_ttm /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x20645642 drm_debug /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x012fe778 drm_find_matching_map /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x0db9ca13 drm_ati_pcigart_init /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xce080d24 drm_property_add_enum /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xba576ed3 drm_mode_width /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xa00af865 drm_fence_usage_deref_locked /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x63c1e5b2 drm_ati_pcigart_cleanup /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x44738548 drm_bo_clean_mm /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xdef0fe05 drm_addbufs_fb /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x46446ca7 drm_property_destroy /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x43344383 drm_fence_object_signaled /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xb575fa2c drm_property_create /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x37c910f2 drm_getsarea /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x7bbbb4cb drm_addbufs_pci /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x85432ef1 drm_addbufs_agp /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x6a337ba3 drm_calloc /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x23dc7de1 drm_core_get_map_ofs /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x2a3dcba5 drm_regs_fence /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xb144fa7d drm_bo_move_ttm /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x7c5c9812 drm_buffer_object_create /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xdd8fe54b drm_free_memctl /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x3074f033 drm_order /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x4e69ab10 drm_regs_free /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xa4af8c57 drm_bo_kunmap /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xf0bac70e drm_bo_usage_deref_locked /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x3d8035a3 drm_core_ioremap /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL_GPL
-0x4e532b3c drm_fence_wait_polling /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x8ed5692e drm_mode_rmmode /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xe919dd5c drm_sman_owner_clean /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x12f5bc5a drm_agp_flush_chipset /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xd1e720d4 drm_bo_do_validate /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xd87cd9b5 drm_get_resource_len /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x0db1d8db drm_lookup_ref_object /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x5ec84b3c drm_bo_read_lock /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x9863a7db drm_crtc_probe_output_modes /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xfb257ce7 drm_release /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xde6fcefc drm_mode_validate_size /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x8873dc30 drm_mm_init /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x042c619d drm_fence_fill_arg /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x57791493 drm_disable_unused_functions /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x8a0e441a drm_cleanup_pci /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x369d0823 drm_putback_buffer_objects /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x684a513c drm_framebuffer_destroy /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xa05a1e5a drm_addmap /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x05827463 drm_mode_create /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x2dc3a89d drm_mode_destroy /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xb879fb62 drm_bo_offset_end /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x20a7cf27 drm_add_edid_modes /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x55f060ee drm_sman_set_range /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x78340834 drm_rmmap /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xdcd13b3b drm_get_drawable_info /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xc58e8a30 drm_agp_free /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x9ca2024f drm_agp_bind_memory /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x8df8309d drm_bo_driver_init /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x3bc28c4f psbfb_probe /root/Build/d2b25/psb-kmd/psb EXPORT_SYMBOL
-0x971cce93 drm_regs_alloc /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x7833a227 drm_lookup_user_object /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xef1b982d drm_mode_probed_add /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xd4216dce drm_mode_height /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xbe0fda7f drm_agp_release /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x61c4e9b4 drm_fence_object_create /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x8417be5d drm_mem_reg_iounmap /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xc7a8183d drm_pci_alloc /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x1f58f22f drm_fence_handler /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x3bc8d807 drm_bo_handle_validate /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x25526986 drm_bo_init_mm /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x7e3cd7d5 drm_bo_fill_rep_arg /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xaaa2266b drm_open /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xfa82ab99 drm_sg_cleanup /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x42be2aac drm_output_rename /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x59a23695 drm_mode_set_name /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x06a86096 drm_locked_tasklet /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xc9f106c4 drm_fence_object_flush /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xff79e18d drm_mode_debug_printmodeline /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x311ebcb8 drm_init_xres /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x0c7e9508 drm_init_yres /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xd6847ec4 drm_agp_acquire /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x69b33c77 drm_core_reclaim_buffers /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xf6bd2837 drm_query_memctl /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x21e23420 drm_fence_flush_old /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x6b78ff20 drm_agp_info /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x282fad09 drm_mode_vrefresh /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x61fc5864 drm_mode_set_crtcinfo /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xd3bd3554 drm_mem_reg_is_pci /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xf35a2622 drm_crtc_set_mode /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xb0fd752a drm_mode_addmode /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x8f616f11 drm_output_attach_property /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x945e2f21 drm_ttm_cache_flush /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0xaf29788e drm_sman_init /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
-0x6a345333 drm_ttm_get_page /root/Build/d2b25/psb-kmd/drm EXPORT_SYMBOL
View
286 i915_buffer.c
@@ -1,286 +0,0 @@
-/**************************************************************************
- *
- * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- *
- **************************************************************************/
-/*
- * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
- */
-
-#include "drmP.h"
-#include "i915_drm.h"
-#include "i915_drv.h"
-
-struct drm_ttm_backend *i915_create_ttm_backend_entry(struct drm_device *dev)
-{
- return drm_agp_init_ttm(dev);
-}
-
-int i915_fence_types(struct drm_buffer_object *bo,
- uint32_t *fclass,
- uint32_t *type)
-{
- if (bo->mem.mask & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
- *type = 3;
- else
- *type = 1;
- return 0;
-}
-
-int i915_invalidate_caches(struct drm_device *dev, uint64_t flags)
-{
- /*
- * FIXME: Only emit once per batchbuffer submission.
- */
-
- uint32_t flush_cmd = MI_NO_WRITE_FLUSH;
-
- if (flags & DRM_BO_FLAG_READ)
- flush_cmd |= MI_READ_FLUSH;
- if (flags & DRM_BO_FLAG_EXE)
- flush_cmd |= MI_EXE_FLUSH;
-
- return i915_emit_mi_flush(dev, flush_cmd);
-}
-
-int i915_init_mem_type(struct drm_device *dev, uint32_t type,
- struct drm_mem_type_manager *man)
-{
- switch (type) {
- case DRM_BO_MEM_LOCAL:
- man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
- _DRM_FLAG_MEMTYPE_CACHED;
- man->drm_bus_maptype = 0;
- man->gpu_offset = 0;
- break;
- case DRM_BO_MEM_TT:
- if (!(drm_core_has_AGP(dev) && dev->agp)) {
- DRM_ERROR("AGP is not enabled for memory type %u\n",
- (unsigned)type);
- return -EINVAL;
- }
- man->io_offset = dev->agp->agp_info.aper_base;
- man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
- man->io_addr = NULL;
- man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
- _DRM_FLAG_MEMTYPE_CSELECT | _DRM_FLAG_NEEDS_IOREMAP;
- man->drm_bus_maptype = _DRM_AGP;
- man->gpu_offset = 0;
- break;
- case DRM_BO_MEM_VRAM:
- if (!(drm_core_has_AGP(dev) && dev->agp)) {
- DRM_ERROR("AGP is not enabled for memory type %u\n",
- (unsigned)type);
- return -EINVAL;
- }
- man->io_offset = dev->agp->agp_info.aper_base;
- man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
- man->io_addr = NULL;
- man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
- _DRM_FLAG_MEMTYPE_FIXED | _DRM_FLAG_NEEDS_IOREMAP;
- man->drm_bus_maptype = _DRM_AGP;
- man->gpu_offset = 0;
- break;
- case DRM_BO_MEM_PRIV0: /* for OS preallocated space */
- DRM_ERROR("PRIV0 not used yet.\n");
- break;
- default:
- DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
- return -EINVAL;
- }
- return 0;
-}
-
-uint32_t i915_evict_mask(struct drm_buffer_object *bo)
-{
- switch (bo->mem.mem_type) {
- case DRM_BO_MEM_LOCAL:
- case DRM_BO_MEM_TT:
- return DRM_BO_FLAG_MEM_LOCAL;
- default:
- return DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_CACHED;
- }
-}
-
-#if 0 /* See comment below */
-
-static void i915_emit_copy_blit(struct drm_device * dev,
- uint32_t src_offset,
- uint32_t dst_offset,
- uint32_t pages, int direction)
-{
- uint32_t cur_pages;
- uint32_t stride = PAGE_SIZE;
- struct drm_i915_private *dev_priv = dev->dev_private;
- RING_LOCALS;
-
- if (!dev_priv)
- return;
-
- i915_kernel_lost_context(dev);
- while (pages > 0) {
- cur_pages = pages;
- if (cur_pages > 2048)
- cur_pages = 2048;
- pages -= cur_pages;
-
- BEGIN_LP_RING(6);
- OUT_RING(SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
- XY_SRC_COPY_BLT_WRITE_RGB);
- OUT_RING((stride & 0xffff) | (0xcc << 16) | (1 << 24) |
- (1 << 25) | (direction ? (1 << 30) : 0));
- OUT_RING((cur_pages << 16) | PAGE_SIZE);
- OUT_RING(dst_offset);
- OUT_RING(stride & 0xffff);
- OUT_RING(src_offset);
- ADVANCE_LP_RING();
- }
- return;
-}
-
-static int i915_move_blit(struct drm_buffer_object * bo,
- int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
-{
- struct drm_bo_mem_reg *old_mem = &bo->mem;
- int dir = 0;
-
- if ((old_mem->mem_type == new_mem->mem_type) &&
- (new_mem->mm_node->start <
- old_mem->mm_node->start + old_mem->mm_node->size)) {
- dir = 1;
- }
-
- i915_emit_copy_blit(bo->dev,
- old_mem->mm_node->start << PAGE_SHIFT,
- new_mem->mm_node->start << PAGE_SHIFT,
- new_mem->num_pages, dir);
-
- i915_emit_mi_flush(bo->dev, MI_READ_FLUSH | MI_EXE_FLUSH);
-
- return drm_bo_move_accel_cleanup(bo, evict, no_wait, 0,
- DRM_FENCE_TYPE_EXE |
- DRM_I915_FENCE_TYPE_RW,
- DRM_I915_FENCE_FLAG_FLUSHED, new_mem);
-}
-
-/*
- * Flip destination ttm into cached-coherent AGP,
- * then blit and subsequently move out again.
- */
-
-static int i915_move_flip(struct drm_buffer_object * bo,
- int evict, int no_wait, struct drm_bo_mem_reg * new_mem)
-{
- struct drm_device *dev = bo->dev;
- struct drm_bo_mem_reg tmp_mem;
- int ret;
-
- tmp_mem = *new_mem;
- tmp_mem.mm_node = NULL;
- tmp_mem.mask = DRM_BO_FLAG_MEM_TT |
- DRM_BO_FLAG_CACHED | DRM_BO_FLAG_FORCE_CACHING;
-
- ret = drm_bo_mem_space(bo, &tmp_mem, no_wait);
- if (ret)
- return ret;
-
- ret = drm_bind_ttm(bo->ttm, &tmp_mem);
- if (ret)
- goto out_cleanup;
-
- ret = i915_move_blit(bo, 1, no_wait, &tmp_mem);
- if (ret)
- goto out_cleanup;
-
- ret = drm_bo_move_ttm(bo, evict, no_wait, new_mem);
-out_cleanup:
- if (tmp_mem.mm_node) {
- mutex_lock(&dev->struct_mutex);
- if (tmp_mem.mm_node != bo->pinned_node)
- drm_mm_put_block(tmp_mem.mm_node);
- tmp_mem.mm_node = NULL;
- mutex_unlock(&dev->struct_mutex);
- }
- return ret;
-}
-
-#endif
-
-/*
- * Disable i915_move_flip for now, since we can't guarantee that the hardware
- * lock is held here. To re-enable we need to make sure either
- * a) The X server is using DRM to submit commands to the ring, or
- * b) DRM can use the HP ring for these blits. This means i915 needs to
- * implement a new ring submission mechanism and fence class.
- */
-int i915_move(struct drm_buffer_object *bo,
- int evict, int no_wait, struct drm_bo_mem_reg *new_mem)
-{
- struct drm_bo_mem_reg *old_mem = &bo->mem;
-
- if (old_mem->mem_type == DRM_BO_MEM_LOCAL) {
- return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
- } else if (new_mem->mem_type == DRM_BO_MEM_LOCAL) {
- if (0) /*i915_move_flip(bo, evict, no_wait, new_mem)*/
- return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
- } else {
- if (0) /*i915_move_blit(bo, evict, no_wait, new_mem)*/
- return drm_bo_move_memcpy(bo, evict, no_wait, new_mem);
- }
- return 0;
-}
-
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24))
-static inline void clflush(volatile void *__p)
-{
- asm volatile("clflush %0" : "+m" (*(char __force *)__p));
-}
-#endif
-
-static inline void drm_cache_flush_addr(void *virt)
-{
- int i;
-
- for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
- clflush(virt+i);
-}
-
-static inline void drm_cache_flush_page(struct page *p)
-{
- drm_cache_flush_addr(page_address(p));
-}
-
-void i915_flush_ttm(struct drm_ttm *ttm)
-{
- int i;
-
- if (!ttm)
- return;
-
- DRM_MEMORYBARRIER();
- for (i = ttm->num_pages-1; i >= 0; i--)
- drm_cache_flush_page(drm_ttm_get_page(ttm, i));
- DRM_MEMORYBARRIER();
-}
View
204 i915_compat.c
@@ -1,204 +0,0 @@
-#include "drmP.h"
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
-
-#include "i915_drm.h"
-#include "i915_drv.h"
-
-#define PCI_DEVICE_ID_INTEL_82946GZ_HB 0x2970
-#define PCI_DEVICE_ID_INTEL_82965G_1_HB 0x2980
-#define PCI_DEVICE_ID_INTEL_82965Q_HB 0x2990
-#define PCI_DEVICE_ID_INTEL_82965G_HB 0x29A0
-#define PCI_DEVICE_ID_INTEL_82965GM_HB 0x2A00
-#define PCI_DEVICE_ID_INTEL_82965GME_HB 0x2A10
-#define PCI_DEVICE_ID_INTEL_82945GME_HB 0x27AC
-#define PCI_DEVICE_ID_INTEL_G33_HB 0x29C0
-#define PCI_DEVICE_ID_INTEL_Q35_HB 0x29B0
-#define PCI_DEVICE_ID_INTEL_Q33_HB 0x29D0
-
-#define I915_IFPADDR 0x60
-#define I965_IFPADDR 0x70
-
-static struct _i9xx_private_compat {
- void __iomem *flush_page;
- struct resource ifp_resource;
-} i9xx_private;
-
-static struct _i8xx_private_compat {
- void *flush_page;
- struct page *page;
-} i8xx_private;
-
-static void
-intel_compat_align_resource(void *data, struct resource *res,
- resource_size_t size, resource_size_t align)
-{
- return;
-}
-
-
-static int intel_alloc_chipset_flush_resource(struct pci_dev *pdev)
-{
- int ret;
- ret = pci_bus_alloc_resource(pdev->bus, &i9xx_private.ifp_resource, PAGE_SIZE,
- PAGE_SIZE, PCIBIOS_MIN_MEM, 0,
- intel_compat_align_resource, pdev);
- if (ret != 0)
- return ret;
-
- return 0;
-}
-
-static void intel_i915_setup_chipset_flush(struct pci_dev *pdev)
-{
- int ret;
- u32 temp;
-
- pci_read_config_dword(pdev, I915_IFPADDR, &temp);
- if (!(temp & 0x1)) {
- intel_alloc_chipset_flush_resource(pdev);
-
- pci_write_config_dword(pdev, I915_IFPADDR, (i9xx_private.ifp_resource.start & 0xffffffff) | 0x1);
- } else {
- temp &= ~1;
-
- i9xx_private.ifp_resource.start = temp;
- i9xx_private.ifp_resource.end = temp + PAGE_SIZE;
- ret = request_resource(&iomem_resource, &i9xx_private.ifp_resource);
- if (ret) {
- i9xx_private.ifp_resource.start = 0;
- printk("Failed inserting resource into tree\n");
- }
- }
-}
-
-static void intel_i965_g33_setup_chipset_flush(struct pci_dev *pdev)
-{
- u32 temp_hi, temp_lo;
- int ret;
-
- pci_read_config_dword(pdev, I965_IFPADDR + 4, &temp_hi);
- pci_read_config_dword(pdev, I965_IFPADDR, &temp_lo);
-
- if (!(temp_lo & 0x1)) {
-
- intel_alloc_chipset_flush_resource(pdev);
-
- pci_write_config_dword(pdev, I965_IFPADDR + 4, (i9xx_private.ifp_resource.start >> 32));
- pci_write_config_dword(pdev, I965_IFPADDR, (i9xx_private.ifp_resource.start & 0xffffffff) | 0x1);
- } else {
- u64 l64;
-
- temp_lo &= ~0x1;
- l64 = ((u64)temp_hi << 32) | temp_lo;
-
- i9xx_private.ifp_resource.start = l64;
- i9xx_private.ifp_resource.end = l64 + PAGE_SIZE;
- ret = request_resource(&iomem_resource, &i9xx_private.ifp_resource);
- if (!ret) {
- i9xx_private.ifp_resource.start = 0;
- printk("Failed inserting resource into tree\n");
- }
- }
-}
-
-static void intel_i8xx_fini_flush(struct drm_device *dev)
-{
- kunmap(i8xx_private.page);
- i8xx_private.flush_page = NULL;
- unmap_page_from_agp(i8xx_private.page);
- flush_agp_mappings();
-
- __free_page(i8xx_private.page);
-}
-
-static void intel_i8xx_setup_flush(struct drm_device *dev)
-{
-
- i8xx_private.page = alloc_page(GFP_KERNEL | __GFP_ZERO | GFP_DMA32);
- if (!i8xx_private.page) {
- return;
- }
-
- /* make page uncached */
- map_page_into_agp(i8xx_private.page);
- flush_agp_mappings();
-
- i8xx_private.flush_page = kmap(i8xx_private.page);
- if (!i8xx_private.flush_page)
- intel_i8xx_fini_flush(dev);
-}
-
-
-static void intel_i8xx_flush_page(struct drm_device *dev)
-{
- unsigned int *pg = i8xx_private.flush_page;
- int i;
-
- /* HAI NUT CAN I HAZ HAMMER?? */
- for (i = 0; i < 256; i++)
- *(pg + i) = i;
-
- DRM_MEMORYBARRIER();
-}
-
-static void intel_i9xx_setup_flush(struct drm_device *dev)
-{
- struct pci_dev *agp_dev = dev->agp->agp_info.device;
-
- i9xx_private.ifp_resource.name = "GMCH IFPBAR";
- i9xx_private.ifp_resource.flags = IORESOURCE_MEM;
-
- /* Setup chipset flush for 915 */
- if (IS_I965G(dev) || IS_G33(dev)) {
- intel_i965_g33_setup_chipset_flush(agp_dev);
- } else {
- intel_i915_setup_chipset_flush(agp_dev);
- }
-
- if (i9xx_private.ifp_resource.start) {
- i9xx_private.flush_page = ioremap_nocache(i9xx_private.ifp_resource.start, PAGE_SIZE);
- if (!i9xx_private.flush_page)
- printk("unable to ioremap flush page - no chipset flushing");
- }
-}
-
-static void intel_i9xx_fini_flush(struct drm_device *dev)
-{
- iounmap(i9xx_private.flush_page);
- release_resource(&i9xx_private.ifp_resource);
-}
-
-static void intel_i9xx_flush_page(struct drm_device *dev)
-{
- if (i9xx_private.flush_page)
- writel(1, i9xx_private.flush_page);
-}
-
-void intel_init_chipset_flush_compat(struct drm_device *dev)
-{
- /* not flush on i8xx */
- if (IS_I9XX(dev))
- intel_i9xx_setup_flush(dev);
- else
- intel_i8xx_setup_flush(dev);
-
-}
-
-void intel_fini_chipset_flush_compat(struct drm_device *dev)
-{
- /* not flush on i8xx */
- if (IS_I9XX(dev))
- intel_i9xx_fini_flush(dev);
- else
- intel_i8xx_fini_flush(dev);
-}
-
-void drm_agp_chipset_flush(struct drm_device *dev)
-{
- if (IS_I9XX(dev))
- intel_i9xx_flush_page(dev);
- else
- intel_i8xx_flush_page(dev);
-}
-#endif
View
1,324 i915_dma.c
@@ -1,1324 +0,0 @@
-/* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
- */
-/*
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "i915_drm.h"
-#include "i915_drv.h"
-
-/* Really want an OS-independent resettable timer. Would like to have
- * this loop run for (eg) 3 sec, but have the timer reset every time
- * the head pointer changes, so that EBUSY only happens if the ring
- * actually stalls for (eg) 3 seconds.
- */
-int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- struct drm_i915_ring_buffer *ring = &(dev_priv->ring);
- u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
- int i;
-
- for (i = 0; i < 10000; i++) {
- ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
- ring->space = ring->head - (ring->tail + 8);
- if (ring->space < 0)
- ring->space += ring->Size;
- if (ring->space >= n)
- return 0;
-
- dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
-
- if (ring->head != last_head)
- i = 0;
-
- last_head = ring->head;
- DRM_UDELAY(1);
- }
-
- return -EBUSY;
-}
-
-void i915_kernel_lost_context(struct drm_device * dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- struct drm_i915_ring_buffer *ring = &(dev_priv->ring);
-
- ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
- ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
- ring->space = ring->head - (ring->tail + 8);
- if (ring->space < 0)
- ring->space += ring->Size;
-
- if (ring->head == ring->tail)
- dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
-}
-
-int i915_dma_cleanup(struct drm_device * dev)
-{
- /* Make sure interrupts are disabled here because the uninstall ioctl
- * may not have been called from userspace and after dev_private
- * is freed, it's too late.
- */
- if (dev->irq)
- drm_irq_uninstall(dev);
-
- return 0;
-}
-
-static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
-
- dev_priv->sarea = drm_getsarea(dev);
- if (!dev_priv->sarea) {
- DRM_ERROR("can not find sarea!\n");
- i915_dma_cleanup(dev);
- return -EINVAL;
- }
-
- dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
- if (!dev_priv->mmio_map) {
- i915_dma_cleanup(dev);
- DRM_ERROR("can not find mmio map!\n");
- return -EINVAL;
- }
-
-#ifdef I915_HAVE_BUFFER
- dev_priv->max_validate_buffers = I915_MAX_VALIDATE_BUFFERS;
-#endif
-
- dev_priv->sarea_priv = (drm_i915_sarea_t *)
- ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
-
- dev_priv->ring.Start = init->ring_start;
- dev_priv->ring.End = init->ring_end;
- dev_priv->ring.Size = init->ring_size;
- dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
-
- dev_priv->ring.map.offset = init->ring_start;
- dev_priv->ring.map.size = init->ring_size;
- dev_priv->ring.map.type = 0;
- dev_priv->ring.map.flags = 0;
- dev_priv->ring.map.mtrr = 0;
-
- drm_core_ioremap(&dev_priv->ring.map, dev);
-
- if (dev_priv->ring.map.handle == NULL) {
- i915_dma_cleanup(dev);
- DRM_ERROR("can not ioremap virtual address for"
- " ring buffer\n");
- return -ENOMEM;
- }
-
- dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
-
- dev_priv->cpp = init->cpp;
- dev_priv->sarea_priv->pf_current_page = 0;
-
- /* We are using separate values as placeholders for mechanisms for
- * private backbuffer/depthbuffer usage.
- */
- dev_priv->use_mi_batchbuffer_start = 0;
-
- /* Allow hardware batchbuffers unless told otherwise.
- */
- dev_priv->allow_batchbuffer = 1;
-
- /* Enable vblank on pipe A for older X servers
- */
- dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A;
-
- /* Program Hardware Status Page */
- if (!IS_G33(dev)) {
- dev_priv->status_page_dmah =
- drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
-
- if (!dev_priv->status_page_dmah) {
- i915_dma_cleanup(dev);
- DRM_ERROR("Can not allocate hardware status page\n");
- return -ENOMEM;
- }
- dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
- dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
-
- memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
-
- I915_WRITE(0x02080, dev_priv->dma_status_page);
- }
- DRM_DEBUG("Enabled hardware status page\n");
-#ifdef I915_HAVE_BUFFER
- mutex_init(&dev_priv->cmdbuf_mutex);
-#endif
- return 0;
-}
-
-static int i915_dma_resume(struct drm_device * dev)
-{
- struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
-
- DRM_DEBUG("%s\n", __FUNCTION__);
-
- if (!dev_priv->sarea) {
- DRM_ERROR("can not find sarea!\n");
- return -EINVAL;
- }
-
- if (!dev_priv->mmio_map) {
- DRM_ERROR("can not find mmio map!\n");
- return -EINVAL;
- }
-
- if (dev_priv->ring.map.handle == NULL) {
- DRM_ERROR("can not ioremap virtual address for"
- " ring buffer\n");
- return -ENOMEM;
- }
-
- /* Program Hardware Status Page */
- if (!dev_priv->hw_status_page) {
- DRM_ERROR("Can not find hardware status page\n");
- return -EINVAL;
- }
- DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
-
- if (dev_priv->status_gfx_addr != 0)
- I915_WRITE(0x02080, dev_priv->status_gfx_addr);
- else
- I915_WRITE(0x02080, dev_priv->dma_status_page);
- DRM_DEBUG("Enabled hardware status page\n");
-
- return 0;
-}
-
-static int i915_dma_init(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_i915_init *init = data;
- int retcode = 0;
-
- switch (init->func) {
- case I915_INIT_DMA:
- retcode = i915_initialize(dev, init);
- break;
- case I915_CLEANUP_DMA:
- retcode = i915_dma_cleanup(dev);
- break;
- case I915_RESUME_DMA:
- retcode = i915_dma_resume(dev);
- break;
- default:
- retcode = -EINVAL;
- break;
- }
-
- return retcode;
-}
-
-/* Implement basically the same security restrictions as hardware does
- * for MI_BATCH_NON_SECURE. These can be made stricter at any time.
- *
- * Most of the calculations below involve calculating the size of a
- * particular instruction. It's important to get the size right as
- * that tells us where the next instruction to check is. Any illegal
- * instruction detected will be given a size of zero, which is a
- * signal to abort the rest of the buffer.
- */
-static int do_validate_cmd(int cmd)
-{
- switch (((cmd >> 29) & 0x7)) {
- case 0x0:
- switch ((cmd >> 23) & 0x3f) {
- case 0x0:
- return 1; /* MI_NOOP */
- case 0x4:
- return 1; /* MI_FLUSH */
- default:
- return 0; /* disallow everything else */
- }
- break;
- case 0x1:
- return 0; /* reserved */
- case 0x2:
- return (cmd & 0xff) + 2; /* 2d commands */
- case 0x3:
- if (((cmd >> 24) & 0x1f) <= 0x18)
- return 1;
-
- switch ((cmd >> 24) & 0x1f) {
- case 0x1c:
- return 1;
- case 0x1d:
- switch ((cmd >> 16) & 0xff) {
- case 0x3:
- return (cmd & 0x1f) + 2;
- case 0x4:
- return (cmd & 0xf) + 2;
- default:
- return (cmd & 0xffff) + 2;
- }
- case 0x1e:
- if (cmd & (1 << 23))
- return (cmd & 0xffff) + 1;
- else
- return 1;
- case 0x1f:
- if ((cmd & (1 << 23)) == 0) /* inline vertices */
- return (cmd & 0x1ffff) + 2;
- else if (cmd & (1 << 17)) /* indirect random */
- if ((cmd & 0xffff) == 0)
- return 0; /* unknown length, too hard */
- else
- return (((cmd & 0xffff) + 1) / 2) + 1;
- else
- return 2; /* indirect sequential */
- default:
- return 0;
- }
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int validate_cmd(int cmd)
-{
- int ret = do_validate_cmd(cmd);
-
-/* printk("validate_cmd( %x ): %d\n", cmd, ret); */
-
- return ret;
-}
-
-static int i915_emit_cmds(struct drm_device * dev, int __user * buffer,
- int dwords)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- int i;
- RING_LOCALS;
-
- if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8)
- return -EINVAL;
-
- BEGIN_LP_RING((dwords+1)&~1);
-
- for (i = 0; i < dwords;) {
- int cmd, sz;
-
- if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
- return -EINVAL;
-
- if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
- return -EINVAL;
-
- OUT_RING(cmd);
-
- while (++i, --sz) {
- if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
- sizeof(cmd))) {
- return -EINVAL;
- }
- OUT_RING(cmd);
- }
- }
-
- if (dwords & 1)
- OUT_RING(0);
-
- ADVANCE_LP_RING();
-
- return 0;
-}
-
-static int i915_emit_box(struct drm_device * dev,
- struct drm_clip_rect __user * boxes,
- int i, int DR1, int DR4)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- struct drm_clip_rect box;
- RING_LOCALS;
-
- if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
- return -EFAULT;
- }
-
- if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
- DRM_ERROR("Bad box %d,%d..%d,%d\n",
- box.x1, box.y1, box.x2, box.y2);
- return -EINVAL;
- }
-
- if (IS_I965G(dev)) {
- BEGIN_LP_RING(4);
- OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
- OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
- OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
- OUT_RING(DR4);
- ADVANCE_LP_RING();
- } else {
- BEGIN_LP_RING(6);
- OUT_RING(GFX_OP_DRAWRECT_INFO);
- OUT_RING(DR1);
- OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
- OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
- OUT_RING(DR4);
- OUT_RING(0);
- ADVANCE_LP_RING();
- }
-
- return 0;
-}
-
-/* XXX: Emitting the counter should really be moved to part of the IRQ
- * emit. For now, do it in both places:
- */
-
-void i915_emit_breadcrumb(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- RING_LOCALS;
-
- if (++dev_priv->counter > BREADCRUMB_MASK) {
-#ifdef I915_HAVE_FENCE
- i915_invalidate_reported_sequence(dev);
-#endif
- dev_priv->counter = 1;
- DRM_DEBUG("Breadcrumb counter wrapped around\n");
- }
-
- dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
-
- BEGIN_LP_RING(4);
- OUT_RING(CMD_STORE_DWORD_IDX);
- OUT_RING(20);
- OUT_RING(dev_priv->counter);
- OUT_RING(0);
- ADVANCE_LP_RING();
-}
-
-
-int i915_emit_mi_flush(struct drm_device *dev, uint32_t flush)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- uint32_t flush_cmd = CMD_MI_FLUSH;
- RING_LOCALS;
-
- flush_cmd |= flush;
-
- i915_kernel_lost_context(dev);
-
- BEGIN_LP_RING(4);
- OUT_RING(flush_cmd);
- OUT_RING(0);
- OUT_RING(0);
- OUT_RING(0);
- ADVANCE_LP_RING();
-
- return 0;
-}
-
-
-static int i915_dispatch_cmdbuffer(struct drm_device * dev,
- struct drm_i915_cmdbuffer * cmd)
-{
-#ifdef I915_HAVE_FENCE
- struct drm_i915_private *dev_priv = dev->dev_private;
-#endif
- int nbox = cmd->num_cliprects;
- int i = 0, count, ret;
-
- if (cmd->sz & 0x3) {
- DRM_ERROR("alignment\n");
- return -EINVAL;
- }
-
- i915_kernel_lost_context(dev);
-
- count = nbox ? nbox : 1;
-
- for (i = 0; i < count; i++) {
- if (i < nbox) {
- ret = i915_emit_box(dev, cmd->cliprects, i,
- cmd->DR1, cmd->DR4);
- if (ret)
- return ret;
- }
-
- ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
- if (ret)
- return ret;
- }
-
- i915_emit_breadcrumb( dev );
-#ifdef I915_HAVE_FENCE
- if (unlikely((dev_priv->counter & 0xFF) == 0))
- drm_fence_flush_old(dev, 0, dev_priv->counter);
-#endif
- return 0;
-}
-
-static int i915_dispatch_batchbuffer(struct drm_device * dev,
- drm_i915_batchbuffer_t * batch)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- struct drm_clip_rect __user *boxes = batch->cliprects;
- int nbox = batch->num_cliprects;
- int i = 0, count;
- RING_LOCALS;
-
- if ((batch->start | batch->used) & 0x7) {
- DRM_ERROR("alignment\n");
- return -EINVAL;
- }
-
- i915_kernel_lost_context(dev);
-
- count = nbox ? nbox : 1;
-
- for (i = 0; i < count; i++) {
- if (i < nbox) {
- int ret = i915_emit_box(dev, boxes, i,
- batch->DR1, batch->DR4);
- if (ret)
- return ret;
- }
-
- if (dev_priv->use_mi_batchbuffer_start) {
- BEGIN_LP_RING(2);
- if (IS_I965G(dev)) {
- OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
- OUT_RING(batch->start);
- } else {
- OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
- OUT_RING(batch->start | MI_BATCH_NON_SECURE);
- }
- ADVANCE_LP_RING();
-
- } else {
- BEGIN_LP_RING(4);
- OUT_RING(MI_BATCH_BUFFER);
- OUT_RING(batch->start | MI_BATCH_NON_SECURE);
- OUT_RING(batch->start + batch->used - 4);
- OUT_RING(0);
- ADVANCE_LP_RING();
- }
- }
-
- i915_emit_breadcrumb( dev );
-#ifdef I915_HAVE_FENCE
- if (unlikely((dev_priv->counter & 0xFF) == 0))
- drm_fence_flush_old(dev, 0, dev_priv->counter);
-#endif
- return 0;
-}
-
-static void i915_do_dispatch_flip(struct drm_device * dev, int plane, int sync)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- u32 num_pages, current_page, next_page, dspbase;
- int shift = 2 * plane, x, y;
- RING_LOCALS;
-
- /* Calculate display base offset */
- num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
- current_page = (dev_priv->sarea_priv->pf_current_page >> shift) & 0x3;
- next_page = (current_page + 1) % num_pages;
-
- switch (next_page) {
- default:
- case 0:
- dspbase = dev_priv->sarea_priv->front_offset;
- break;
- case 1:
- dspbase = dev_priv->sarea_priv->back_offset;
- break;
- case 2:
- dspbase = dev_priv->sarea_priv->third_offset;
- break;
- }
-
- if (plane == 0) {
- x = dev_priv->sarea_priv->planeA_x;
- y = dev_priv->sarea_priv->planeA_y;
- } else {
- x = dev_priv->sarea_priv->planeB_x;
- y = dev_priv->sarea_priv->planeB_y;
- }
-
- dspbase += (y * dev_priv->sarea_priv->pitch + x) * dev_priv->cpp;
-
- DRM_DEBUG("plane=%d current_page=%d dspbase=0x%x\n", plane, current_page,
- dspbase);
-
- BEGIN_LP_RING(4);
- OUT_RING(sync ? 0 :
- (MI_WAIT_FOR_EVENT | (plane ? MI_WAIT_FOR_PLANE_B_FLIP :
- MI_WAIT_FOR_PLANE_A_FLIP)));
- OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | (sync ? 0 : ASYNC_FLIP) |
- (plane ? DISPLAY_PLANE_B : DISPLAY_PLANE_A));
- OUT_RING(dev_priv->sarea_priv->pitch * dev_priv->cpp);
- OUT_RING(dspbase);
- ADVANCE_LP_RING();
-
- dev_priv->sarea_priv->pf_current_page &= ~(0x3 << shift);
- dev_priv->sarea_priv->pf_current_page |= next_page << shift;
-}
-
-void i915_dispatch_flip(struct drm_device * dev, int planes, int sync)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- int i;
-
- DRM_DEBUG("%s: planes=0x%x pfCurrentPage=%d\n",
- __FUNCTION__,
- planes, dev_priv->sarea_priv->pf_current_page);
-
- i915_emit_mi_flush(dev, MI_READ_FLUSH | MI_EXE_FLUSH);
-
- for (i = 0; i < 2; i++)
- if (planes & (1 << i))
- i915_do_dispatch_flip(dev, i, sync);
-
- i915_emit_breadcrumb(dev);
-#ifdef I915_HAVE_FENCE
- if (unlikely(!sync && ((dev_priv->counter & 0xFF) == 0)))
- drm_fence_flush_old(dev, 0, dev_priv->counter);
-#endif
-}
-
-static int i915_quiescent(struct drm_device * dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
-
- i915_kernel_lost_context(dev);
- return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
-}
-
-static int i915_flush_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- return i915_quiescent(dev);
-}
-
-static int i915_batchbuffer(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
- drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
- dev_priv->sarea_priv;
- drm_i915_batchbuffer_t *batch = data;
- int ret;
-
- if (!dev_priv->allow_batchbuffer) {
- DRM_ERROR("Batchbuffer ioctl disabled\n");
- return -EINVAL;
- }
-
- DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
- batch->start, batch->used, batch->num_cliprects);
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
- batch->num_cliprects *
- sizeof(struct drm_clip_rect)))
- return -EFAULT;
-
- ret = i915_dispatch_batchbuffer(dev, batch);
-
- sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
- return ret;
-}
-
-static int i915_cmdbuffer(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
- struct drm_i915_sarea *sarea_priv = (struct drm_i915_sarea *)
- dev_priv->sarea_priv;
- struct drm_i915_cmdbuffer *cmdbuf = data;
- int ret;
-
- DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
- cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- if (cmdbuf->num_cliprects &&
- DRM_VERIFYAREA_READ(cmdbuf->cliprects,
- cmdbuf->num_cliprects *
- sizeof(struct drm_clip_rect))) {
- DRM_ERROR("Fault accessing cliprects\n");
- return -EFAULT;
- }
-
- ret = i915_dispatch_cmdbuffer(dev, cmdbuf);
- if (ret) {
- DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
- return ret;
- }
-
- sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
- return 0;
-}
-
-#ifdef I915_HAVE_BUFFER
-struct i915_relocatee_info {
- struct drm_buffer_object *buf;
- unsigned long offset;
- u32 *data_page;
- unsigned page_offset;
- struct drm_bo_kmap_obj kmap;
- int is_iomem;
-};
-
-static void i915_dereference_buffers_locked(struct drm_buffer_object **buffers,
- unsigned num_buffers)
-{
- while (num_buffers--)
- drm_bo_usage_deref_locked(&buffers[num_buffers]);
-}
-
-int i915_apply_reloc(struct drm_file *file_priv, int num_buffers,
- struct drm_buffer_object **buffers,
- struct i915_relocatee_info *relocatee,
- uint32_t *reloc)
-{
- unsigned index;
- unsigned long new_cmd_offset;
- u32 val;
- int ret;
-
- if (reloc[2] >= num_buffers) {
- DRM_ERROR("Illegal relocation buffer %08X\n", reloc[2]);
- return -EINVAL;
- }
-
- new_cmd_offset = reloc[0];
- if (!relocatee->data_page ||
- !drm_bo_same_page(relocatee->offset, new_cmd_offset)) {
- drm_bo_kunmap(&relocatee->kmap);
- relocatee->offset = new_cmd_offset;
- ret = drm_bo_kmap(relocatee->buf, new_cmd_offset >> PAGE_SHIFT,
- 1, &relocatee->kmap);
- if (ret) {
- DRM_ERROR("Could not map command buffer to apply relocs\n %08lx", new_cmd_offset);
- return ret;
- }
-
- relocatee->data_page = drm_bmo_virtual(&relocatee->kmap,
- &relocatee->is_iomem);
- relocatee->page_offset = (relocatee->offset & PAGE_MASK);
- }
-
- val = buffers[reloc[2]]->offset;
- index = (reloc[0] - relocatee->page_offset) >> 2;
-
- /* add in validate */
- val = val + reloc[1];
-
- relocatee->data_page[index] = val;
- return 0;
-}
-
-int i915_process_relocs(struct drm_file *file_priv,
- uint32_t buf_handle,
- uint32_t *reloc_buf_handle,
- struct i915_relocatee_info *relocatee,
- struct drm_buffer_object **buffers,
- uint32_t num_buffers)
-{
- struct drm_device *dev = file_priv->head->dev;
- struct drm_buffer_object *reloc_list_object;
- uint32_t cur_handle = *reloc_buf_handle;
- uint32_t *reloc_page;
- int ret, reloc_is_iomem, reloc_stride;
- uint32_t num_relocs, reloc_offset, reloc_end, reloc_page_offset, next_offset, cur_offset;
- struct drm_bo_kmap_obj reloc_kmap;
-
- memset(&reloc_kmap, 0, sizeof(reloc_kmap));
-
- mutex_lock(&dev->struct_mutex);
- reloc_list_object = drm_lookup_buffer_object(file_priv, cur_handle, 1);
- mutex_unlock(&dev->struct_mutex);
- if (!reloc_list_object)
- return -EINVAL;
-
- ret = drm_bo_kmap(reloc_list_object, 0, 1, &reloc_kmap);
- if (ret) {
- DRM_ERROR("Could not map relocation buffer.\n");
- goto out;
- }
-
- reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
- num_relocs = reloc_page[0] & 0xffff;
-
- if ((reloc_page[0] >> 16) & 0xffff) {
- DRM_ERROR("Unsupported relocation type requested\n");
- goto out;
- }
-
- /* get next relocate buffer handle */
- *reloc_buf_handle = reloc_page[1];
- reloc_stride = I915_RELOC0_STRIDE * sizeof(uint32_t); /* may be different for other types of relocs */
-
- DRM_DEBUG("num relocs is %d, next is %08X\n", num_relocs, reloc_page[1]);
-
- reloc_page_offset = 0;
- reloc_offset = I915_RELOC_HEADER * sizeof(uint32_t);
- reloc_end = reloc_offset + (num_relocs * reloc_stride);
-
- do {
- next_offset = drm_bo_offset_end(reloc_offset, reloc_end);
-
- do {
- cur_offset = ((reloc_offset + reloc_page_offset) & ~PAGE_MASK) / sizeof(uint32_t);
- ret = i915_apply_reloc(file_priv, num_buffers,
- buffers, relocatee, &reloc_page[cur_offset]);
- if (ret)
- goto out;
-
- reloc_offset += reloc_stride;
- } while (reloc_offset < next_offset);
-
- drm_bo_kunmap(&reloc_kmap);
-
- reloc_offset = next_offset;
- if (reloc_offset != reloc_end) {
- ret = drm_bo_kmap(reloc_list_object, reloc_offset >> PAGE_SHIFT, 1, &reloc_kmap);
- if (ret) {
- DRM_ERROR("Could not map relocation buffer.\n");
- goto out;
- }
-
- reloc_page = drm_bmo_virtual(&reloc_kmap, &reloc_is_iomem);
- reloc_page_offset = reloc_offset & ~PAGE_MASK;
- }
-
- } while (reloc_offset != reloc_end);
-out:
- drm_bo_kunmap(&relocatee->kmap);
- relocatee->data_page = NULL;
-
- drm_bo_kunmap(&reloc_kmap);
-
- mutex_lock(&dev->struct_mutex);
- drm_bo_usage_deref_locked(&reloc_list_object);
- mutex_unlock(&dev->struct_mutex);
-
- return ret;
-}
-
-static int i915_exec_reloc(struct drm_file *file_priv, drm_handle_t buf_handle,
- drm_handle_t buf_reloc_handle,
- struct drm_buffer_object **buffers,
- uint32_t buf_count)
-{
- struct drm_device *dev = file_priv->head->dev;
- struct i915_relocatee_info relocatee;
- int ret = 0;
-
- memset(&relocatee, 0, sizeof(relocatee));
-
- mutex_lock(&dev->struct_mutex);
- relocatee.buf = drm_lookup_buffer_object(file_priv, buf_handle, 1);
- mutex_unlock(&dev->struct_mutex);
- if (!relocatee.buf) {
- DRM_DEBUG("relocatee buffer invalid %08x\n", buf_handle);
- ret = -EINVAL;
- goto out_err;
- }
-
- while (buf_reloc_handle) {
- ret = i915_process_relocs(file_priv, buf_handle, &buf_reloc_handle, &relocatee, buffers, buf_count);
- if (ret) {
- DRM_ERROR("process relocs failed\n");
- break;
- }
- }
-
- mutex_lock(&dev->struct_mutex);
- drm_bo_usage_deref_locked(&relocatee.buf);
- mutex_unlock(&dev->struct_mutex);
-
-out_err:
- return ret;
-}
-
-/*
- * Validate, add fence and relocate a block of bos from a userspace list
- */
-int i915_validate_buffer_list(struct drm_file *file_priv,
- unsigned int fence_class, uint64_t data,
- struct drm_buffer_object **buffers,
- uint32_t *num_buffers)
-{
- struct drm_i915_op_arg arg;
- struct drm_bo_op_req *req = &arg.d.req;
- struct drm_bo_arg_rep rep;
- unsigned long next = 0;
- int ret = 0;
- unsigned buf_count = 0;
- struct drm_device *dev = file_priv->head->dev;
- uint32_t buf_reloc_handle, buf_handle;
-
-
- do {
- if (buf_count >= *num_buffers) {
- DRM_ERROR("Buffer count exceeded %d\n.", *num_buffers);
- ret = -EINVAL;
- goto out_err;
- }
-
- buffers[buf_count] = NULL;
-
- if (copy_from_user(&arg, (void __user *)(unsigned)data, sizeof(arg))) {
- ret = -EFAULT;
- goto out_err;
- }
-
- if (arg.handled) {
- data = arg.next;
- mutex_lock(&dev->struct_mutex);
- buffers[buf_count] = drm_lookup_buffer_object(file_priv, req->arg_handle, 1);
- mutex_unlock(&dev->struct_mutex);
- buf_count++;
- continue;
- }
-
- rep.ret = 0;
- if (req->op != drm_bo_validate) {
- DRM_ERROR
- ("Buffer object operation wasn't \"validate\".\n");
- rep.ret = -EINVAL;
- goto out_err;
- }
-
- buf_handle = req->bo_req.handle;
- buf_reloc_handle = arg.reloc_handle;
-
- if (buf_reloc_handle) {
- ret = i915_exec_reloc(file_priv, buf_handle, buf_reloc_handle, buffers, buf_count);
- if (ret)
- goto out_err;
- DRM_MEMORYBARRIER();
- }
-
- rep.ret = drm_bo_handle_validate(file_priv, req->bo_req.handle,
- req->bo_req.fence_class,
- req->bo_req.flags,
- req->bo_req.mask,
- req->bo_req.hint,
- 0,
- &rep.bo_info,
- &buffers[buf_count]);
-
- if (rep.ret) {
- DRM_ERROR("error on handle validate %d\n", rep.ret);
- goto out_err;
- }
-
-
- next = arg.next;
- arg.handled = 1;
- arg.d.rep = rep;
-
- if (copy_to_user((void __user *)(unsigned)data, &arg, sizeof(arg)))
- return -EFAULT;
-
- data = next;
- buf_count++;
-
- } while (next != 0);
- *num_buffers = buf_count;
- return 0;
-out_err:
- mutex_lock(&dev->struct_mutex);
- i915_dereference_buffers_locked(buffers, buf_count);
- mutex_unlock(&dev->struct_mutex);
- *num_buffers = 0;
- return (ret) ? ret : rep.ret;
-}
-
-static int i915_execbuffer(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
- drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
- dev_priv->sarea_priv;
- struct drm_i915_execbuffer *exec_buf = data;
- struct drm_i915_batchbuffer *batch = &exec_buf->batch;
- struct drm_fence_arg *fence_arg = &exec_buf->fence_arg;
- int num_buffers;
- int ret;
- struct drm_buffer_object **buffers;
- struct drm_fence_object *fence;
-
- if (!dev_priv->allow_batchbuffer) {
- DRM_ERROR("Batchbuffer ioctl disabled\n");
- return -EINVAL;
- }
-
-
- if (batch->num_cliprects && DRM_VERIFYAREA_READ(batch->cliprects,
- batch->num_cliprects *
- sizeof(struct drm_clip_rect)))
- return -EFAULT;
-
- if (exec_buf->num_buffers > dev_priv->max_validate_buffers)
- return -EINVAL;
-
-
- ret = drm_bo_read_lock(&dev->bm.bm_lock, 1);
- if (ret)
- return ret;
-
- /*
- * The cmdbuf_mutex makes sure the validate-submit-fence
- * operation is atomic.
- */
-
- ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
- if (ret) {
- drm_bo_read_unlock(&dev->bm.bm_lock);
- return -EAGAIN;
- }
-
- num_buffers = exec_buf->num_buffers;
-
- buffers = drm_calloc(num_buffers, sizeof(struct drm_buffer_object *), DRM_MEM_DRIVER);
- if (!buffers) {
- drm_bo_read_unlock(&dev->bm.bm_lock);
- mutex_unlock(&dev_priv->cmdbuf_mutex);
- return -ENOMEM;
- }
-
- /* validate buffer list + fixup relocations */
- ret = i915_validate_buffer_list(file_priv, 0, exec_buf->ops_list,
- buffers, &num_buffers);
- if (ret)
- goto out_free;
-
- /* make sure all previous memory operations have passed */
- DRM_MEMORYBARRIER();
- drm_agp_chipset_flush(dev);
-
- /* submit buffer */
- batch->start = buffers[num_buffers-1]->offset;
-
- DRM_DEBUG("i915 exec batchbuffer, start %x used %d cliprects %d\n",
- batch->start, batch->used, batch->num_cliprects);
-
- ret = i915_dispatch_batchbuffer(dev, batch);
- if (ret)
- goto out_err0;
-
- sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
-
- /* fence */
- ret = drm_fence_buffer_objects(dev, NULL, 0, NULL, &fence);
- if (ret)
- goto out_err0;
-
- if (!(fence_arg->flags & DRM_FENCE_FLAG_NO_USER)) {
- ret = drm_fence_add_user_object(file_priv, fence, fence_arg->flags & DRM_FENCE_FLAG_SHAREABLE);
- if (!ret) {
- fence_arg->handle = fence->base.hash.key;
- fence_arg->fence_class = fence->fence_class;
- fence_arg->type = fence->type;
- fence_arg->signaled = fence->signaled_types;
- }
- }
- drm_fence_usage_deref_unlocked(&fence);
-out_err0:
-
- /* handle errors */
- mutex_lock(&dev->struct_mutex);
- i915_dereference_buffers_locked(buffers, num_buffers);
- mutex_unlock(&dev->struct_mutex);
-
-out_free:
- drm_free(buffers, (exec_buf->num_buffers * sizeof(struct drm_buffer_object *)), DRM_MEM_DRIVER);
-
- mutex_unlock(&dev_priv->cmdbuf_mutex);
- drm_bo_read_unlock(&dev->bm.bm_lock);
- return ret;
-}
-#endif
-
-int i915_do_cleanup_pageflip(struct drm_device * dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- int i, planes, num_pages;
-
- DRM_DEBUG("%s\n", __FUNCTION__);
- if (!dev_priv->sarea_priv)
- return 0;
- num_pages = dev_priv->sarea_priv->third_handle ? 3 : 2;
- for (i = 0, planes = 0; i < 2; i++) {
- if (dev_priv->sarea_priv->pf_current_page & (0x3 << (2 * i))) {
- dev_priv->sarea_priv->pf_current_page =
- (dev_priv->sarea_priv->pf_current_page &
- ~(0x3 << (2 * i))) | (num_pages - 1) << (2 * i);
-
- planes |= 1 << i;
- }
- }
-
- if (planes)
- i915_dispatch_flip(dev, planes, 0);
-
- return 0;
-}
-
-static int i915_flip_bufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- struct drm_i915_flip *param = data;
-
- DRM_DEBUG("%s\n", __FUNCTION__);
-
- LOCK_TEST_WITH_RETURN(dev, file_priv);
-
- /* This is really planes */
- if (param->pipes & ~0x3) {
- DRM_ERROR("Invalid planes 0x%x, only <= 0x3 is valid\n",
- param->pipes);
- return -EINVAL;
- }
-
- i915_dispatch_flip(dev, param->pipes, 0);
-
- return 0;
-}
-
-
-static int i915_getparam(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- struct drm_i915_getparam *param = data;
- int value;
-
- if (!dev_priv) {
- DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
- return -EINVAL;
- }
-
- switch (param->param) {
- case I915_PARAM_IRQ_ACTIVE:
- value = dev->irq ? 1 : 0;
- break;
- case I915_PARAM_ALLOW_BATCHBUFFER:
- value = dev_priv->allow_batchbuffer ? 1 : 0;
- break;
- case I915_PARAM_LAST_DISPATCH:
- value = READ_BREADCRUMB(dev_priv);
- break;
- default:
- DRM_ERROR("Unknown parameter %d\n", param->param);
- return -EINVAL;
- }
-
- if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
- DRM_ERROR("DRM_COPY_TO_USER failed\n");
- return -EFAULT;
- }
-
- return 0;
-}
-
-static int i915_setparam(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- drm_i915_setparam_t *param = data;
-
- if (!dev_priv) {
- DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
- return -EINVAL;
- }
-
- switch (param->param) {
- case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
- if (!IS_I965G(dev))
- dev_priv->use_mi_batchbuffer_start = param->value;
- break;
- case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
- dev_priv->tex_lru_log_granularity = param->value;
- break;
- case I915_SETPARAM_ALLOW_BATCHBUFFER:
- dev_priv->allow_batchbuffer = param->value;
- break;
- default:
- DRM_ERROR("unknown parameter %d\n", param->param);
- return -EINVAL;
- }
-
- return 0;
-}
-
-drm_i915_mmio_entry_t mmio_table[] = {
- [MMIO_REGS_PS_DEPTH_COUNT] = {
- I915_MMIO_MAY_READ|I915_MMIO_MAY_WRITE,
- 0x2350,
- 8
- }
-};
-
-static int mmio_table_size = sizeof(mmio_table)/sizeof(drm_i915_mmio_entry_t);
-
-static int i915_mmio(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- uint32_t buf[8];
- struct drm_i915_private *dev_priv = dev->dev_private;
- drm_i915_mmio_entry_t *e;
- drm_i915_mmio_t *mmio = data;
- void __iomem *base;
- int i;
-
- if (!dev_priv) {
- DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
- return -EINVAL;
- }
-
- if (mmio->reg >= mmio_table_size)
- return -EINVAL;
-
- e = &mmio_table[mmio->reg];
- base = (u8 *) dev_priv->mmio_map->handle + e->offset;
-
- switch (mmio->read_write) {
- case I915_MMIO_READ:
- if (!(e->flag & I915_MMIO_MAY_READ))
- return -EINVAL;
- for (i = 0; i < e->size / 4; i++)
- buf[i] = I915_READ(e->offset + i * 4);
- if (DRM_COPY_TO_USER(mmio->data, buf, e->size)) {
- DRM_ERROR("DRM_COPY_TO_USER failed\n");
- return -EFAULT;
- }
- break;
-
- case I915_MMIO_WRITE:
- if (!(e->flag & I915_MMIO_MAY_WRITE))
- return -EINVAL;
- if(DRM_COPY_FROM_USER(buf, mmio->data, e->size)) {
- DRM_ERROR("DRM_COPY_TO_USER failed\n");
- return -EFAULT;
- }
- for (i = 0; i < e->size / 4; i++)
- I915_WRITE(e->offset + i * 4, buf[i]);
- break;
- }
- return 0;
-}
-
-static int i915_set_status_page(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- drm_i915_hws_addr_t *hws = data;
-
- if (!dev_priv) {
- DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
- return -EINVAL;
- }
- DRM_DEBUG("set status page addr 0x%08x\n", (u32)hws->addr);
-
- dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12);
-
- dev_priv->hws_map.offset = dev->agp->base + hws->addr;
- dev_priv->hws_map.size = 4*1024;
- dev_priv->hws_map.type = 0;
- dev_priv->hws_map.flags = 0;
- dev_priv->hws_map.mtrr = 0;
-
- drm_core_ioremap(&dev_priv->hws_map, dev);
- if (dev_priv->hws_map.handle == NULL) {
- i915_dma_cleanup(dev);
- dev_priv->status_gfx_addr = 0;
- DRM_ERROR("can not ioremap virtual address for"
- " G33 hw status page\n");
- return -ENOMEM;
- }
- dev_priv->hw_status_page = dev_priv->hws_map.handle;
-
- memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
- I915_WRITE(I915REG_HWS_PGA, dev_priv->status_gfx_addr);
- DRM_DEBUG("load hws 0x2080 with gfx mem 0x%x\n",
- dev_priv->status_gfx_addr);
- DRM_DEBUG("load hws at %p\n", dev_priv->hw_status_page);
- return 0;
-}
-
-struct drm_ioctl_desc i915_ioctls[] = {
- DRM_IOCTL_DEF(DRM_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I915_FLUSH, i915_flush_ioctl, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_FLIP, i915_flip_bufs, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_GETPARAM, i915_getparam, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I915_ALLOC, i915_mem_alloc, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_FREE, i915_mem_free, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- DRM_IOCTL_DEF(DRM_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_DESTROY_HEAP, i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
- DRM_IOCTL_DEF(DRM_I915_SET_VBLANK_PIPE, i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
- DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE, i915_vblank_pipe_get, DRM_AUTH ),
- DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_MMIO, i915_mmio, DRM_AUTH),
- DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH),
-#ifdef I915_HAVE_BUFFER
- DRM_IOCTL_DEF(DRM_I915_EXECBUFFER, i915_execbuffer, DRM_AUTH),
-#endif
-};
-
-int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
-
-/**
- * Determine if the device really is AGP or not.
- *
- * All Intel graphics chipsets are treated as AGP, even if they are really
- * PCI-e.
- *
- * \param dev The device to be tested.
- *
- * \returns
- * A value of 1 is always retured to indictate every i9x5 is AGP.
- */
-int i915_driver_device_is_agp(struct drm_device * dev)
-{
- return 1;
-}
-
View
366 i915_drm.h
@@ -1,366 +0,0 @@
-/*
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#ifndef _I915_DRM_H_
-#define _I915_DRM_H_
-
-/* Please note that modifications to all structs defined here are
- * subject to backwards-compatibility constraints.
- */
-
-#include "drm.h"
-
-/* Each region is a minimum of 16k, and there are at most 255 of them.
- */
-#define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use
- * of chars for next/prev indices */
-#define I915_LOG_MIN_TEX_REGION_SIZE 14
-
-typedef struct drm_i915_init {
- enum {
- I915_INIT_DMA = 0x01,
- I915_CLEANUP_DMA = 0x02,
- I915_RESUME_DMA = 0x03
- } func;
- unsigned int mmio_offset;
- int sarea_priv_offset;
- unsigned int ring_start;
- unsigned int ring_end;
- unsigned int ring_size;
- unsigned int front_offset;
- unsigned int back_offset;
- unsigned int depth_offset;
- unsigned int w;
- unsigned int h;
- unsigned int pitch;
- unsigned int pitch_bits;
- unsigned int back_pitch;
- unsigned int depth_pitch;
- unsigned int cpp;
- unsigned int chipset;
-} drm_i915_init_t;
-
-typedef struct drm_i915_sarea {
- struct drm_tex_region texList[I915_NR_TEX_REGIONS + 1];
- int last_upload; /* last time texture was uploaded */
- int last_enqueue; /* last time a buffer was enqueued */
- int last_dispatch; /* age of the most recently dispatched buffer */
- int ctxOwner; /* last context to upload state */
- int texAge;
- int pf_enabled; /* is pageflipping allowed? */
- int pf_active;
- int pf_current_page; /* which buffer is being displayed? */
- int perf_boxes; /* performance boxes to be displayed */
- int width, height; /* screen size in pixels */
-
- drm_handle_t front_handle;
- int front_offset;
- int front_size;
-
- drm_handle_t back_handle;
- int back_offset;
- int back_size;
-
- drm_handle_t depth_handle;
- int depth_offset;
- int depth_size;
-
- drm_handle_t tex_handle;
- int tex_offset;
- int tex_size;
- int log_tex_granularity;
- int pitch;
- int rotation; /* 0, 90, 180 or 270 */
- int rotated_offset;
- int rotated_size;
- int rotated_pitch;
- int virtualX, virtualY;
-
- unsigned int front_tiled;
- unsigned int back_tiled;
- unsigned int depth_tiled;
- unsigned int rotated_tiled;
- unsigned int rotated2_tiled;
-
- int planeA_x;
- int planeA_y;
- int planeA_w;
- int planeA_h;
- int planeB_x;
- int planeB_y;
- int planeB_w;
- int planeB_h;
-
- /* Triple buffering */
- drm_handle_t third_handle;
- int third_offset;
- int third_size;
- unsigned int third_tiled;
-} drm_i915_sarea_t;
-
-/* Driver specific fence types and classes.
- */
-
-/* The only fence class we support */
-#define DRM_I915_FENCE_CLASS_ACCEL 0
-/* Fence type that guarantees read-write flush */
-#define DRM_I915_FENCE_TYPE_RW 2
-/* MI_FLUSH programmed just before the fence */
-#define DRM_I915_FENCE_FLAG_FLUSHED 0x01000000
-
-/* Flags for perf_boxes
- */
-#define I915_BOX_RING_EMPTY 0x1
-#define I915_BOX_FLIP 0x2
-#define I915_BOX_WAIT 0x4
-#define I915_BOX_TEXTURE_LOAD 0x8
-#define I915_BOX_LOST_CONTEXT 0x10
-
-/* I915 specific ioctls
- * The device specific ioctl range is 0x40 to 0x79.
- */
-#define DRM_I915_INIT 0x00
-#define DRM_I915_FLUSH 0x01
-#define DRM_I915_FLIP 0x02
-#define DRM_I915_BATCHBUFFER 0x03
-#define DRM_I915_IRQ_EMIT 0x04
-#define DRM_I915_IRQ_WAIT 0x05
-#define DRM_I915_GETPARAM 0x06
-#define DRM_I915_SETPARAM 0x07
-#define DRM_I915_ALLOC 0x08
-#define DRM_I915_FREE 0x09
-#define DRM_I915_INIT_HEAP 0x0a
-#define DRM_I915_CMDBUFFER 0x0b
-#define DRM_I915_DESTROY_HEAP 0x0c
-#define DRM_I915_SET_VBLANK_PIPE 0x0d
-#define DRM_I915_GET_VBLANK_PIPE 0x0e
-#define DRM_I915_VBLANK_SWAP 0x0f
-#define DRM_I915_MMIO 0x10
-#define DRM_I915_HWS_ADDR 0x11
-#define DRM_I915_EXECBUFFER 0x12
-
-#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
-#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
-#define DRM_IOCTL_I915_FLIP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_FLIP, drm_i915_flip_t)
-#define DRM_IOCTL_I915_BATCHBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_I915_BATCHBUFFER, drm_i915_batchbuffer_t)
-#define DRM_IOCTL_I915_IRQ_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_IRQ_EMIT, drm_i915_irq_emit_t)
-#define DRM_IOCTL_I915_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_IRQ_WAIT, drm_i915_irq_wait_t)
-#define DRM_IOCTL_I915_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GETPARAM, drm_i915_getparam_t)
-#define DRM_IOCTL_I915_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SETPARAM, drm_i915_setparam_t)
-#define DRM_IOCTL_I915_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_ALLOC, drm_i915_mem_alloc_t)
-#define DRM_IOCTL_I915_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_FREE, drm_i915_mem_free_t)
-#define DRM_IOCTL_I915_INIT_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT_HEAP, drm_i915_mem_init_heap_t)
-#define DRM_IOCTL_I915_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_I915_CMDBUFFER, drm_i915_cmdbuffer_t)
-#define DRM_IOCTL_I915_DESTROY_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_DESTROY_HEAP, drm_i915_mem_destroy_heap_t)
-#define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
-#define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
-#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t)
-#define DRM_IOCTL_I915_EXECBUFFER DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_EXECBUFFER, struct drm_i915_execbuffer)
-
-/* Asynchronous page flipping:
- */
-typedef struct drm_i915_flip {
- /*
- * This is really talking about planes, and we could rename it
- * except for the fact that some of the duplicated i915_drm.h files
- * out there check for HAVE_I915_FLIP and so might pick up this
- * version.
- */
- int pipes;
-} drm_i915_flip_t;
-
-/* Allow drivers to submit batchbuffers directly to hardware, relying
- * on the security mechanisms provided by hardware.
- */
-typedef struct drm_i915_batchbuffer {
- int start; /* agp offset */
- int used; /* nr bytes in use */
- int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */
- int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */
- int num_cliprects; /* mulitpass with multiple cliprects? */
- struct drm_clip_rect __user *cliprects; /* pointer to userspace cliprects */
-} drm_i915_batchbuffer_t;
-
-/* As above, but pass a pointer to userspace buffer which can be
- * validated by the kernel prior to sending to hardware.
- */
-typedef struct drm_i915_cmdbuffer {
- char __user *buf; /* pointer to userspace command buffer */
- int sz; /* nr bytes in buf */
- int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */
- int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */
- int num_cliprects; /* mulitpass with multiple cliprects? */
- struct drm_clip_rect __user *cliprects; /* pointer to userspace cliprects */
-} drm_i915_cmdbuffer_t;
-
-/* Userspace can request & wait on irq's:
- */
-typedef struct drm_i915_irq_emit {
- int __user *irq_seq;
-} drm_i915_irq_emit_t;
-
-typedef struct drm_i915_irq_wait {
- int irq_seq;
-} drm_i915_irq_wait_t;
-
-/* Ioctl to query kernel params:
- */
-#define I915_PARAM_IRQ_ACTIVE 1
-#define I915_PARAM_ALLOW_BATCHBUFFER 2
-#define I915_PARAM_LAST_DISPATCH 3
-
-typedef struct drm_i915_getparam {
- int param;
- int __user *value;
-} drm_i915_getparam_t;
-
-/* Ioctl to set kernel params:
- */
-#define I915_SETPARAM_USE_MI_BATCHBUFFER_START 1
-#define I915_SETPARAM_TEX_LRU_LOG_GRANULARITY 2
-#define I915_SETPARAM_ALLOW_BATCHBUFFER 3
-
-typedef struct drm_i915_setparam {
- int param;
- int value;
-} drm_i915_setparam_t;
-
-/* A memory manager for regions of shared memory:
- */
-#define I915_MEM_REGION_AGP 1
-
-typedef struct drm_i915_mem_alloc {
- int region;
- int alignment;
- int size;
- int __user *region_offset; /* offset from start of fb or agp */
-} drm_i915_mem_alloc_t;
-
-typedef struct drm_i915_mem_free {
- int region;
- int region_offset;
-} drm_i915_mem_free_t;
-
-typedef struct drm_i915_mem_init_heap {
- int region;
- int size;
- int start;
-} drm_i915_mem_init_heap_t;
-
-/* Allow memory manager to be torn down and re-initialized (eg on
- * rotate):
- */
-typedef struct drm_i915_mem_destroy_heap {
- int region;
-} drm_i915_mem_destroy_heap_t;
-
-/* Allow X server to configure which pipes to monitor for vblank signals
- */
-#define DRM_I915_VBLANK_PIPE_A 1
-#define DRM_I915_VBLANK_PIPE_B 2
-
-typedef struct drm_i915_vblank_pipe {
- int pipe;
-} drm_i915_vblank_pipe_t;
-
-/* Schedule buffer swap at given vertical blank:
- */
-typedef struct drm_i915_vblank_swap {
- drm_drawable_t drawable;
- enum drm_vblank_seq_type seqtype;
- unsigned int sequence;
-} drm_i915_vblank_swap_t;
-
-#define I915_MMIO_READ 0
-#define I915_MMIO_WRITE 1
-
-#define I915_MMIO_MAY_READ 0x1
-#define I915_MMIO_MAY_WRITE 0x2
-
-#define MMIO_REGS_IA_PRIMATIVES_COUNT 0
-#define MMIO_REGS_IA_VERTICES_COUNT 1
-#define MMIO_REGS_VS_INVOCATION_COUNT 2
-#define MMIO_REGS_GS_PRIMITIVES_COUNT 3
-#define MMIO_REGS_GS_INVOCATION_COUNT 4
-#define MMIO_REGS_CL_PRIMITIVES_COUNT 5
-#define MMIO_REGS_CL_INVOCATION_COUNT 6
-#define MMIO_REGS_PS_INVOCATION_COUNT 7
-#define MMIO_REGS_PS_DEPTH_COUNT 8
-
-typedef struct drm_i915_mmio_entry {
- unsigned int flag;
- unsigned int offset;
- unsigned int size;
-} drm_i915_mmio_entry_t;
-
-typedef struct drm_i915_mmio {
- unsigned int read_write:1;
- unsigned int reg:31;
- void __user *data;
-} drm_i915_mmio_t;
-
-typedef struct drm_i915_hws_addr {
- uint64_t addr;
-} drm_i915_hws_addr_t;
-
-/*
- * Relocation header is 4 uint32_ts
- * 0 - (16-bit relocation type << 16)| 16 bit reloc count
- * 1 - buffer handle for another list of relocs
- * 2-3 - spare.
- */
-#define I915_RELOC_HEADER 4
-
-/*
- * type 0 relocation has 4-uint32_t stride
- * 0 - offset into buffer
- * 1 - delta to add in
- * 2 - index into buffer list
- * 3 - reserved (for optimisations later).
- */
-#define I915_RELOC_TYPE_0 0
-#define I915_RELOC0_STRIDE 4
-
-struct drm_i915_op_arg {
- uint64_t next;
- uint32_t reloc_handle;
- int handled;
- union {
- struct drm_bo_op_req req;
- struct drm_bo_arg_rep rep;
- } d;
-
-};
-
-struct drm_i915_execbuffer {
- uint64_t ops_list;
- uint32_t num_buffers;
- struct drm_i915_batchbuffer batch;
- drm_context_t context; /* for lockless use in the future */
- struct drm_fence_arg fence_arg;
-};
-
-#endif /* _I915_DRM_H_ */
View
607 i915_drv.c
@@ -1,607 +0,0 @@
-/* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
- */
-/*
- *
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include "drmP.h"
-#include "drm.h"
-#include "i915_drm.h"
-#include "intel_drv.h"
-#include "i915_drv.h"
-
-#include "drm_pciids.h"
-
-static struct pci_device_id pciidlist[] = {
- i915_PCI_IDS
-};
-
-#ifdef I915_HAVE_FENCE
-extern struct drm_fence_driver i915_fence_driver;
-#endif
-
-#ifdef I915_HAVE_BUFFER
-
-static uint32_t i915_mem_prios[] = {DRM_BO_MEM_VRAM, DRM_BO_MEM_PRIV0, DRM_BO_MEM_TT, DRM_BO_MEM_LOCAL};
-static uint32_t i915_busy_prios[] = {DRM_BO_MEM_TT, DRM_BO_MEM_PRIV0, DRM_BO_MEM_VRAM, DRM_BO_MEM_LOCAL};
-
-static struct drm_bo_driver i915_bo_driver = {
- .mem_type_prio = i915_mem_prios,
- .mem_busy_prio = i915_busy_prios,
- .num_mem_type_prio = sizeof(i915_mem_prios)/sizeof(uint32_t),
- .num_mem_busy_prio = sizeof(i915_busy_prios)/sizeof(uint32_t),
- .create_ttm_backend_entry = i915_create_ttm_backend_entry,
- .fence_type = i915_fence_types,
- .invalidate_caches = i915_invalidate_caches,
- .init_mem_type = i915_init_mem_type,
- .evict_mask = i915_evict_mask,
- .move = i915_move,
- .ttm_cache_flush = i915_flush_ttm,
- .command_stream_barrier = NULL,
-};
-#endif
-
-enum pipe {
- PIPE_A = 0,
- PIPE_B,
-};
-
-static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
-
- if (pipe == PIPE_A)
- return (I915_READ(DPLL_A) & DPLL_VCO_ENABLE);
- else
- return (I915_READ(DPLL_B) & DPLL_VCO_ENABLE);
-}
-
-static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- unsigned long reg = (pipe == PIPE_A ? PALETTE_A : PALETTE_B);
- u32 *array;
- int i;
-
- if (!i915_pipe_enabled(dev, pipe))
- return;
-
- if (pipe == PIPE_A)
- array = dev_priv->save_palette_a;
- else
- array = dev_priv->save_palette_b;
-
- for(i = 0; i < 256; i++)
- array[i] = I915_READ(reg + (i << 2));
-}
-
-static void i915_restore_palette(struct drm_device *dev, enum pipe pipe)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- unsigned long reg = (pipe == PIPE_A ? PALETTE_A : PALETTE_B);
- u32 *array;
- int i;
-
- if (!i915_pipe_enabled(dev, pipe))
- return;
-
- if (pipe == PIPE_A)
- array = dev_priv->save_palette_a;
- else
- array = dev_priv->save_palette_b;
-
- for(i = 0; i < 256; i++)
- I915_WRITE(reg + (i << 2), array[i]);
-}
-
-static u8 i915_read_indexed(u16 index_port, u16 data_port, u8 reg)
-{
- outb(reg, index_port);
- return inb(data_port);
-}
-
-static u8 i915_read_ar(u16 st01, u8 reg, u16 palette_enable)
-{
- inb(st01);
- outb(palette_enable | reg, VGA_AR_INDEX);
- return inb(VGA_AR_DATA_READ);
-}
-
-static void i915_write_ar(u8 st01, u8 reg, u8 val, u16 palette_enable)
-{
- inb(st01);
- outb(palette_enable | reg, VGA_AR_INDEX);
- outb(val, VGA_AR_DATA_WRITE);
-}
-
-static void i915_write_indexed(u16 index_port, u16 data_port, u8 reg, u8 val)
-{
- outb(reg, index_port);
- outb(val, data_port);
-}
-
-static void i915_save_vga(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- int i;
- u16 cr_index, cr_data, st01;
-
- /* VGA color palette registers */
- dev_priv->saveDACMASK = inb(VGA_DACMASK);
- /* DACCRX automatically increments during read */
- outb(0, VGA_DACRX);
- /* Read 3 bytes of color data from each index */
- for (i = 0; i < 256 * 3; i++)
- dev_priv->saveDACDATA[i] = inb(VGA_DACDATA);
-
- /* MSR bits */
- dev_priv->saveMSR = inb(VGA_MSR_READ);
- if (dev_priv->saveMSR & VGA_MSR_CGA_MODE) {
- cr_index = VGA_CR_INDEX_CGA;
- cr_data = VGA_CR_DATA_CGA;
- st01 = VGA_ST01_CGA;
- } else {
- cr_index = VGA_CR_INDEX_MDA;
- cr_data = VGA_CR_DATA_MDA;
- st01 = VGA_ST01_MDA;
- }
-
- /* CRT controller regs */
- i915_write_indexed(cr_index, cr_data, 0x11,
- i915_read_indexed(cr_index, cr_data, 0x11) &
- (~0x80));
- for (i = 0; i < 0x24; i++)
- dev_priv->saveCR[i] =
- i915_read_indexed(cr_index, cr_data, i);
- /* Make sure we don't turn off CR group 0 writes */
- dev_priv->saveCR[0x11] &= ~0x80;
-
- /* Attribute controller registers */
- inb(st01);
- dev_priv->saveAR_INDEX = inb(VGA_AR_INDEX);
- for (i = 0; i < 20; i++)
- dev_priv->saveAR[i] = i915_read_ar(st01, i, 0);
- inb(st01);
- outb(dev_priv->saveAR_INDEX, VGA_AR_INDEX);
-
- /* Graphics controller registers */
- for (i = 0; i < 9; i++)
- dev_priv->saveGR[i] =
- i915_read_indexed(VGA_GR_INDEX, VGA_GR_DATA, i);
-
- dev_priv->saveGR[0x10] =
- i915_read_indexed(VGA_GR_INDEX, VGA_GR_DATA, 0x10);
- dev_priv->saveGR[0x11] =
- i915_read_indexed(VGA_GR_INDEX, VGA_GR_DATA, 0x11);
- dev_priv->saveGR[0x18] =
- i915_read_indexed(VGA_GR_INDEX, VGA_GR_DATA, 0x18);
-
- /* Sequencer registers */
- for (i = 0; i < 8; i++)
- dev_priv->saveSR[i] =
- i915_read_indexed(VGA_SR_INDEX, VGA_SR_DATA, i);
-}
-
-static void i915_restore_vga(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- int i;
- u16 cr_index, cr_data, st01;
-
- /* MSR bits */
- outb(dev_priv->saveMSR, VGA_MSR_WRITE);
- if (dev_priv->saveMSR & VGA_MSR_CGA_MODE) {
- cr_index = VGA_CR_INDEX_CGA;
- cr_data = VGA_CR_DATA_CGA;
- st01 = VGA_ST01_CGA;
- } else {
- cr_index = VGA_CR_INDEX_MDA;
- cr_data = VGA_CR_DATA_MDA;
- st01 = VGA_ST01_MDA;
- }
-
- /* Sequencer registers, don't write SR07 */
- for (i = 0; i < 7; i++)
- i915_write_indexed(VGA_SR_INDEX, VGA_SR_DATA, i,
- dev_priv->saveSR[i]);
-
- /* CRT controller regs */
- /* Enable CR group 0 writes */
- i915_write_indexed(cr_index, cr_data, 0x11, dev_priv->saveCR[0x11]);
- for (i = 0; i < 0x24; i++)
- i915_write_indexed(cr_index, cr_data, i, dev_priv->saveCR[i]);
-
- /* Graphics controller regs */
- for (i = 0; i < 9; i++)
- i915_write_indexed(VGA_GR_INDEX, VGA_GR_DATA, i,
- dev_priv->saveGR[i]);
-
- i915_write_indexed(VGA_GR_INDEX, VGA_GR_DATA, 0x10,
- dev_priv->saveGR[0x10]);
- i915_write_indexed(VGA_GR_INDEX, VGA_GR_DATA, 0x11,
- dev_priv->saveGR[0x11]);
- i915_write_indexed(VGA_GR_INDEX, VGA_GR_DATA, 0x18,
- dev_priv->saveGR[0x18]);
-
- /* Attribute controller registers */
- for (i = 0; i < 20; i++)
- i915_write_ar(st01, i, dev_priv->saveAR[i], 0);
- inb(st01); /* switch back to index mode */
- outb(dev_priv->saveAR_INDEX | 0x20, VGA_AR_INDEX);
-
- /* VGA color palette registers */
- outb(dev_priv->saveDACMASK, VGA_DACMASK);