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Update KGSL from ics_chocolate

Lift KGSL from CAF's ics_chocolate branch as of commit 92b921b3. Modify
board config and fixup various things to make it work right.

Notably, this should fix some possible stability problems and fixes
out of vmalloc space problems (white textures).

Change-Id: I48eb04d464edd6ae73916d8c666818bac51d9cfb
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Grigori Goronzy
Grigori Goronzy committed Feb 24, 2013
1 parent 0189f38 commit c0cd1aa1811524e941009895a64abb02b094bb93
@@ -940,54 +940,48 @@ static void __init bt_power_init(void)
#ifdef CONFIG_ARCH_MSM7X27
static struct resource kgsl_3d0_resources[] = {
- {
- .name = KGSL_3D0_REG_MEMORY,
- .start = 0xA0000000,
- .end = 0xA001ffff,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = KGSL_3D0_IRQ,
- .start = INT_GRAPHICS,
- .end = INT_GRAPHICS,
- .flags = IORESOURCE_IRQ,
- },
+ {
+ .name = KGSL_3D0_REG_MEMORY,
+ .start = 0xA0000000,
+ .end = 0xA001ffff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = KGSL_3D0_IRQ,
+ .start = INT_GRAPHICS,
+ .end = INT_GRAPHICS,
+ .flags = IORESOURCE_IRQ,
+ },
};
static struct kgsl_device_platform_data kgsl_3d0_pdata = {
- .pwr_data = {
- .pwrlevel = {
- {
- .gpu_freq = 128000000,
- .bus_freq = 128000000,
- },
- },
- .init_level = 0,
- .num_levels = 1,
- .set_grp_async = NULL,
- .idle_timeout = HZ/5,
- .nap_allowed = true,
- },
- .clk = {
- .name = {
- .clk = "grp_clk",
- .pclk = "grp_pclk",
+ /* bus_freq has been set to 160000 for power savings.
+ * OEMs may modify the value at their discretion for performance
+ * The appropriate maximum replacement for 160000 is:
+ * msm7x2x_clock_data.max_axi_khz
+ */
+ .pwrlevel = {
+ {
+ .gpu_freq = 0,
+ .bus_freq = 160000000,
},
},
- .imem_clk_name = {
- .clk = "imem_clk",
- .pclk = NULL,
- },
+ .init_level = 0,
+ .num_levels = 1,
+ .set_grp_async = NULL,
+ .idle_timeout = HZ,
+ .strtstp_sleepwake = true,
+ .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM,
};
struct platform_device msm_kgsl_3d0 = {
- .name = "kgsl-3d0",
- .id = 0,
- .num_resources = ARRAY_SIZE(kgsl_3d0_resources),
- .resource = kgsl_3d0_resources,
- .dev = {
- .platform_data = &kgsl_3d0_pdata,
- },
+ .name = "kgsl-3d0",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(kgsl_3d0_resources),
+ .resource = kgsl_3d0_resources,
+ .dev = {
+ .platform_data = &kgsl_3d0_pdata,
+ },
};
#endif
View
@@ -64,24 +64,10 @@ config MSM_KGSL_DRM
bool "Build a DRM interface for the MSM_KGSL driver"
depends on MSM_KGSL && DRM
-config MSM_KGSL_GPUMMU
- bool "Enable the GPU MMU in the MSM_KGSL driver"
- depends on MSM_KGSL && !MSM_KGSL_CFF_DUMP
- default y
-
-config MSM_KGSL_IOMMU
- bool "Enable the use of IOMMU in the MSM_KGSL driver"
- depends on MSM_KGSL && MSM_IOMMU && !MSM_KGSL_GPUMMU && !MSM_KGSL_CFF_DUMP
-
-config MSM_KGSL_MMU
- bool
- depends on MSM_KGSL_GPUMMU || MSM_KGSL_IOMMU
- default y
-
config KGSL_PER_PROCESS_PAGE_TABLE
bool "Enable Per Process page tables for the KGSL driver"
default n
- depends on MSM_KGSL_GPUMMU && !MSM_KGSL_DRM
+ depends on !MSM_KGSL_DRM
---help---
The MMU will use per process pagetables when enabled.
@@ -105,7 +91,6 @@ config MSM_KGSL_PAGE_TABLE_COUNT
config MSM_KGSL_MMU_PAGE_FAULT
bool "Force the GPU MMU to page fault for unmapped regions"
default y
- depends on MSM_KGSL_GPUMMU
config MSM_KGSL_DISABLE_SHADOW_WRITES
bool "Disable register shadow writes for context switches"
View
@@ -1,29 +1,37 @@
-ccflags-y := -Iinclude/drm
+ccflags-y := -Iinclude/drm -Idrivers/gpu/msm
msm_kgsl_core-y = \
kgsl.o \
+ kgsl_trace.o \
kgsl_sharedmem.o \
kgsl_pwrctrl.o \
kgsl_pwrscale.o \
kgsl_mmu.o \
- kgsl_gpummu.o
+ kgsl_gpummu.o \
+ kgsl_iommu.o \
+ kgsl_snapshot.o
msm_kgsl_core-$(CONFIG_DEBUG_FS) += kgsl_debugfs.o
msm_kgsl_core-$(CONFIG_MSM_KGSL_CFF_DUMP) += kgsl_cffdump.o
msm_kgsl_core-$(CONFIG_MSM_KGSL_DRM) += kgsl_drm.o
msm_kgsl_core-$(CONFIG_MSM_SCM) += kgsl_pwrscale_trustzone.o
-msm_kgsl_core-$(CONFIG_MSM_SLEEP_STATS) += kgsl_pwrscale_idlestats.o
+msm_kgsl_core-$(CONFIG_MSM_SLEEP_STATS_DEVICE) += kgsl_pwrscale_idlestats.o
msm_adreno-y += \
adreno_ringbuffer.o \
adreno_drawctxt.o \
adreno_postmortem.o \
+ adreno_snapshot.o \
adreno_a2xx.o \
+ adreno_a2xx_trace.o \
+ adreno_a2xx_snapshot.o \
adreno.o
msm_adreno-$(CONFIG_DEBUG_FS) += adreno_debugfs.o
-msm_z180-y += z180.o
+msm_z180-y += \
+ z180.o \
+ z180_trace.o
msm_kgsl_core-objs = $(msm_kgsl_core-y)
msm_adreno-objs = $(msm_adreno-y)
View
@@ -1,4 +1,4 @@
-/* Copyright (c) 2002,2007-2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2002,2007-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -413,6 +413,40 @@ union reg_cp_rb_cntl {
#define REG_A225_RB_COLOR_INFO3 0x2005
#define REG_A225_PC_MULTI_PRIM_IB_RESET_INDX 0x2103
#define REG_A225_GRAS_UCP0X 0x2340
+#define REG_A225_GRAS_UCP5W 0x2357
#define REG_A225_GRAS_UCP_ENABLED 0x2360
+/* Debug registers used by snapshot */
+#define REG_PA_SU_DEBUG_CNTL 0x0C80
+#define REG_PA_SU_DEBUG_DATA 0x0C81
+#define REG_RB_DEBUG_CNTL 0x0F26
+#define REG_RB_DEBUG_DATA 0x0F27
+#define REG_PC_DEBUG_CNTL 0x0C38
+#define REG_PC_DEBUG_DATA 0x0C39
+#define REG_GRAS_DEBUG_CNTL 0x0C80
+#define REG_GRAS_DEBUG_DATA 0x0C81
+#define REG_SQ_DEBUG_MISC 0x0D05
+#define REG_SQ_DEBUG_INPUT_FSM 0x0DAE
+#define REG_SQ_DEBUG_CONST_MGR_FSM 0x0DAF
+#define REG_SQ_DEBUG_EXP_ALLOC 0x0DB3
+#define REG_SQ_DEBUG_FSM_ALU_0 0x0DB1
+#define REG_SQ_DEBUG_FSM_ALU_1 0x0DB2
+#define REG_SQ_DEBUG_PTR_BUFF 0x0DB4
+#define REG_SQ_DEBUG_GPR_VTX 0x0DB5
+#define REG_SQ_DEBUG_GPR_PIX 0x0DB6
+#define REG_SQ_DEBUG_TB_STATUS_SEL 0x0DB7
+#define REG_SQ_DEBUG_VTX_TB_0 0x0DB8
+#define REG_SQ_DEBUG_VTX_TB_1 0x0DB9
+#define REG_SQ_DEBUG_VTX_TB_STATE_MEM 0x0DBB
+#define REG_SQ_DEBUG_TP_FSM 0x0DB0
+#define REG_SQ_DEBUG_VTX_TB_STATUS_REG 0x0DBA
+#define REG_SQ_DEBUG_PIX_TB_0 0x0DBC
+#define REG_SQ_DEBUG_PIX_TB_STATUS_REG_0 0x0DBD
+#define REG_SQ_DEBUG_PIX_TB_STATUS_REG_1 0x0DBE
+#define REG_SQ_DEBUG_PIX_TB_STATUS_REG_2 0x0DBF
+#define REG_SQ_DEBUG_PIX_TB_STATUS_REG_3 0x0DC0
+#define REG_SQ_DEBUG_PIX_TB_STATE_MEM 0x0DC1
+#define REG_SQ_DEBUG_MISC_0 0x2309
+#define REG_SQ_DEBUG_MISC_1 0x230A
+
#endif /* __A200_REG_H */
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2 comments on commit c0cd1aa

C3C0 replied Feb 26, 2013

Hi. Missing some kgsl_snapshot and adreno_snapshot. Are they necessary?? Thanks.

Owner

grigorig replied Feb 26, 2013

Looks like I forgot to add the new files. I'll do that in a sec.

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