Conversation
Wait, is bors still with us? |
Fails for me.
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@dpc hmm, let me have a look. Which branch are you working from? |
@bgamari You did the r+ backwards?
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@dpc You want to use set_unlock, not just set.
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@bharrisau ahem, yes I did. I'll try that again. |
Also, I might not fully understand this immediate patch, but I think it's not best approach. Writes to |
@dpc that is a fair point. @bharrisau is there a reason you chose to eliminate buffering in this case? |
@bharrisau: i do use set_unlock
and latter:
It works without bb46d6e |
Yeah, hold off on the r+. I did it up last night because you wanted to Once you post your watchdog module as a PR we will hand a better chance of
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@dpc @bharrisau how does this look? bgamari@0d8d9c6 |
I need to do two consecutive writes of two different values to the same register. But it is seems a read between them is breaking the sequence and hardware will not register such sequence as valid. I guess chaining could be confusing for users in case someone wanted to do:
and hopping it is going to perform two writes, but I think this is not a big deal, and it is easy to understand that chaining is used precisely for merging accesses. |
@dpc: correct. As you point out, it's important that users understand when it's alright to use chaining. In particular, chained operations will be combined into a single read-modify-write cycle. This means only the last update to a given field in a chain will be committed. Ideally we'd have a lint to ensure that users don't accidentally step into this trap. For this reason I think it's important that we remain consistent in the semantics of chaining and not perform immediate writes in the case of write-only registers. |
In the future a lint or the type system will be able to check for mistakes |
@bgamari: bgamari/zinc@0d8d9c6 Looks OK and produces good assembler, so I think it's OK. I'll try with the hardware in few hours. |
Two minor changes to ioreg for registers with only write-only fields. I'll throw some tests in later.
closes #139
closes #140