diff --git a/headers/private/kernel/arch/arm/arm_mmu.h b/headers/private/kernel/arch/arm/arm_mmu.h
index 1ff3a97a6cc..9388c4ac980 100644
--- a/headers/private/kernel/arch/arm/arm_mmu.h
+++ b/headers/private/kernel/arch/arm/arm_mmu.h
@@ -52,6 +52,7 @@
  * I will use the old format...
  */
 
+#define ARM_MMU_L2_TYPE_LARGE			0x1
 #define ARM_MMU_L2_TYPE_SMALLEXT		0x3
 
 /* for new format entries (cortex-a8) */
diff --git a/src/system/kernel/arch/arm/paging/32bit/ARMPagingMethod32Bit.cpp b/src/system/kernel/arch/arm/paging/32bit/ARMPagingMethod32Bit.cpp
index b95d3999238..eb3c42cead3 100644
--- a/src/system/kernel/arch/arm/paging/32bit/ARMPagingMethod32Bit.cpp
+++ b/src/system/kernel/arch/arm/paging/32bit/ARMPagingMethod32Bit.cpp
@@ -22,7 +22,6 @@
 #include <thread.h>
 #include <vm/vm.h>
 #include <vm/VMAddressSpace.h>
-#include <arm_mmu.h>
 
 #include "paging/32bit/ARMPagingStructures32Bit.h"
 #include "paging/32bit/ARMVMTranslationMap32Bit.h"
@@ -172,7 +171,7 @@ ARMPagingMethod32Bit::PhysicalPageSlotPool::Map(phys_addr_t physicalAddress,
 	page_table_entry& pte = fPageTable[
 		(virtualAddress - fVirtualBase) / B_PAGE_SIZE];
 	pte = (physicalAddress & ARM_PTE_ADDRESS_MASK)
-		| ARM_PTE_TYPE_SMALL_PAGE;
+		| ARM_MMU_L2_TYPE_SMALLEXT;
 
 	arch_cpu_invalidate_TLB_range(virtualAddress, virtualAddress + B_PAGE_SIZE);
 //	invalidate_TLB(virtualAddress);
@@ -462,8 +461,7 @@ ARMPagingMethod32Bit::IsKernelPageAccessible(addr_t virtualAddress,
 ARMPagingMethod32Bit::PutPageTableInPageDir(page_directory_entry* entry,
 	phys_addr_t pgtablePhysical, uint32 attributes)
 {
-	*entry = (pgtablePhysical & ARM_PDE_ADDRESS_MASK)
-		| ARM_PDE_TYPE_COARSE_L2_PAGE_TABLE;
+	*entry = (pgtablePhysical & ARM_PDE_ADDRESS_MASK) | ARM_MMU_L1_TYPE_COARSE;
 		// TODO: we ignore the attributes of the page table - for compatibility
 		// with BeOS we allow having user accessible areas in the kernel address
 		// space. This is currently being used by some drivers, mainly for the
@@ -480,7 +478,7 @@ ARMPagingMethod32Bit::PutPageTableEntryInTable(page_table_entry* entry,
 	bool globalPage)
 {
 	page_table_entry page = (physicalAddress & ARM_PTE_ADDRESS_MASK)
-		| ARM_PTE_TYPE_SMALL_PAGE;
+		| ARM_MMU_L2_TYPE_SMALLEXT;
 #if 0 //IRA
 		| ARM_PTE_PRESENT | (globalPage ? ARM_PTE_GLOBAL : 0)
 		| MemoryTypeToPageTableEntryFlags(memoryType);
diff --git a/src/system/kernel/arch/arm/paging/32bit/paging.h b/src/system/kernel/arch/arm/paging/32bit/paging.h
index 8bc04683227..66bd2f3cca0 100644
--- a/src/system/kernel/arch/arm/paging/32bit/paging.h
+++ b/src/system/kernel/arch/arm/paging/32bit/paging.h
@@ -16,25 +16,8 @@
 #include <int.h>
 #include <kernel.h>
 
-#define VADDR_TO_PDENT(va)					((va) >> 20)
-#define VADDR_TO_PTENT(va)					(((va) & 0xff000) >> 12)
-#define VADDR_TO_PGOFF(va)					((va) & 0x0fff)
+#include <arm_mmu.h>
 
-// page directory entry bits
-#define ARM_PDE_TYPE_MASK					0x00000003
-#define ARM_PDE_TYPE_COARSE_L2_PAGE_TABLE	0x00000001
-#define ARM_PDE_TYPE_SECTION				0x00000002
-#define ARM_PDE_TYPE_FINE_L2_PAGE_TABLE		0x00000003
-
-#define ARM_PDE_ADDRESS_MASK				0xfffffc00
-
-// page table entry bits
-#define ARM_PTE_TYPE_MASK					0x00000003
-#define ARM_PTE_TYPE_LARGE_PAGE				0x00000001
-#define ARM_PTE_TYPE_SMALL_PAGE				0x00000002
-#define ARM_PTE_TYPE_EXT_SMALL_PAGE			0x00000003
-
-#define ARM_PTE_ADDRESS_MASK				0xfffff000
 
 #define FIRST_USER_PGDIR_ENT				(VADDR_TO_PDENT(USER_BASE))
 #define NUM_USER_PGDIR_ENTS					(VADDR_TO_PDENT(ROUNDUP(USER_SIZE, \