{"payload":{"header_redesign_enabled":false,"results":[{"id":"191375079","archived":false,"color":"#b2b7f8","followers":45,"has_funding_file":false,"hl_name":"halftop/Interface-Protocol-in-Verilog","hl_trunc_description":"Interface Protocol in Verilog","language":"Verilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":191375079,"name":"Interface-Protocol-in-Verilog","owner_id":30852770,"owner_login":"halftop","updated_at":"2019-08-02T11:57:41.476Z","has_issues":true}},"sponsorable":false,"topics":["spi","uart-verilog","verilog-hdl","uart-protocol"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":127,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Ahalftop%252FInterface-Protocol-in-Verilog%2B%2Blanguage%253AVerilog","metadata":null,"csrf_tokens":{"/halftop/Interface-Protocol-in-Verilog/star":{"post":"Kwk5dzHSIcI5D6dNYlTmyjNs-x3rBVaax5FLuMwBZxXl5U56ks_-_cqJqF_K3fihX9tZIc0LxsEtVzhI5Oaq4g"},"/halftop/Interface-Protocol-in-Verilog/unstar":{"post":"8u9YYNVdHXWAsDBH4YUYp67ZFPr_q41yfM1byzrRvA0SmOO3TiHbK4nEkzeonQVEX3naTKAxTYzBwaC5io449A"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"J15bfReEdVTxHiL0Cqi5s7usJduC5xFHhJFaIS7nYDKPIOs-KhiYYa8ajm5eWtxiapNmOjBuGxYGXL_ZTjuTrQ"}}},"title":"Repository search results"}