From 8a5ce447c335bb48f5969730a843994cab59b029 Mon Sep 17 00:00:00 2001 From: Till Harbaum Date: Sat, 1 Jun 2024 13:47:44 +0200 Subject: [PATCH] Add NTSC support and prepare OSD configuration --- src/hdmi/hdmi.sv | 28 +++++++++++++++------------- src/minimig/Minimig1.v | 31 ++++++++++++++----------------- src/misc/video_analyzer.v | 10 +++++++--- src/tang/nano20k/top.sv | 28 ++++++++++++++++++++++++---- 4 files changed, 60 insertions(+), 37 deletions(-) diff --git a/src/hdmi/hdmi.sv b/src/hdmi/hdmi.sv index 2347896..3ead3a5 100644 --- a/src/hdmi/hdmi.sv +++ b/src/hdmi/hdmi.sv @@ -33,17 +33,19 @@ module hdmi parameter bit [7:0] SOURCE_DEVICE_INFORMATION = 8'h00 // See README.md or CTA-861-G for the list of valid codes ) ( - input logic clk_pixel_x5, - input logic clk_pixel, - input logic clk_audio, + input logic clk_pixel_x5, + input logic clk_pixel, + input logic clk_audio, + + input logic pal_mode, // 1 for pal timing // synchronous reset back to 0,0 - input logic reset, - input logic [23:0] rgb, + input logic reset, + input logic [23:0] rgb, input logic [AUDIO_BIT_WIDTH-1:0] audio_sample_word [1:0], // These outputs go to your HDMI port - output logic [2:0] tmds, - output logic tmds_clock + output logic [2:0] tmds, + output logic tmds_clock ); localparam int NUM_CHANNELS = 3; @@ -52,15 +54,15 @@ logic vsync; logic [1:0] invert; -// PAL start frame screen s_start s_len +// PAL/NTSC start frame screen s_start s_len wire [54:0] htiming0 = { 11'd0, 11'd908, 11'd768, 11'd24, 11'd72 }; -wire [39:0] vtiming0 = { 10'd626, 10'd576, 10'd5, 10'd5 }; +wire [39:0] vtiming0 = { 10'd626, 10'd576, 10'd5, 10'd5 }; // PAL +wire [39:0] vtiming1 = { 10'd526, 10'd480, 10'd5, 10'd5 }; // NTSC wire [7:0] cea0 = 8'd17; // CEA is HDMI mode in group 1 +wire [7:0] cea1 = 8'd2; -wire [102:0] timing0 = { htiming0, vtiming0, cea0 }; - -// select timing as indicated by control signals coming for Atari ST core -wire [102:0] timing = timing0; +wire [102:0] timing = pal_mode?{ htiming0, vtiming0, cea0 }: + { htiming0, vtiming1, cea1 }; // demux timing parameters wire [10:0] start_x = timing[102:92]; diff --git a/src/minimig/Minimig1.v b/src/minimig/Minimig1.v index 32d96ed..d293823 100644 --- a/src/minimig/Minimig1.v +++ b/src/minimig/Minimig1.v @@ -164,6 +164,11 @@ module Minimig1 input clk, // system clock (7.09379 MHz) input clk28m, // 28.37516 MHz clock + // system configuration options + input [2:0] chipset_config, + input [3:0] memory_config, + input [2:0] floppy_config, + // rs232 pins input rxd, // rs232 receive output txd, // rs232 send @@ -317,9 +322,6 @@ wire [1:0] lr_filter = 2'b00;// lowres interpolation filter mode: bit 0 - horizo wire [1:0] hr_filter = 2'b00;// hires interpolation filter mode: bit 0 - horizontal, bit 1 - vertical wire [1:0] scanline; // scanline effect configuration wire hires; // hires signal from Denise for interpolation filter enable in Amber -wire [3:0] memory_config; // memory configuration -wire [3:0] floppy_config; // floppy drives configuration (drive number and speed) -wire [3:0] chipset_config; // chipset features selection // gayle stuff wire sel_ide; // select IDE drive registers @@ -341,7 +343,7 @@ assign pwrled = !_led; // NTSC/PAL switching is controlled by OSD menu, change requires reset to take effect always @(posedge clk) if (cpurst) - ntsc <= (chipset_config[1]); + ntsc <= (chipset_config[0]); // vertical sync for the MCU reg vsync_del = 1'b0; // delayed vsync signal for edge detection @@ -391,8 +393,8 @@ Agnus AGNUS1 .disk_dmas(disk_dmas), .bls(bls), .ntsc(ntsc), - .a1k(chipset_config[2]), - .ecs(chipset_config[3]), + .a1k(chipset_config[1]), + .ecs(chipset_config[2]), .floppy_speed(floppy_config[0]) ); @@ -445,15 +447,10 @@ Paula PAULA1 .sdc_byte_in_addr(sdc_byte_in_addr), .sdc_byte_in_data(sdc_byte_in_data), - .floppy_drives(floppy_config[3:2]) + .floppy_drives(floppy_config[2:1]) ); -assign chipset_config = 4'b1000; // ecs, a500 (!a1k), pal, unused -// assign memory_config = 4'b0101; // 1MB chip & 512k slow ram -assign memory_config = 4'b0011; // 2MB chip -assign floppy_config = 4'b0101; // two floppy drives, unused, speed 0 - -assign scanline = 1'b0; +assign scanline = 2'b00; // ----------------------- simple replacement for user_io hw registers -------------------- parameter JOY0DAT = 9'h00a; @@ -538,8 +535,8 @@ Denise DENISE1 .red(red_i), .green(green_i), .blue(blue_i), - .ecs(chipset_config[3]), - .a1k(chipset_config[2]), + .ecs(chipset_config[2]), + .a1k(chipset_config[1]), .hires(hires) ); @@ -655,7 +652,7 @@ bank_mapper BMAP1 .slow1(sel_slow[1]), .slow2(sel_slow[2]), .kick(sel_kick), - .ecs(chipset_config[3]), + .ecs(chipset_config[2]), .memory_config(memory_config), .bank(bank) ); @@ -696,7 +693,7 @@ gary GARY1 .ram_rd(ram_rd), .ram_hwr(ram_hwr), .ram_lwr(ram_lwr), - .ecs(chipset_config[3]), + .ecs(chipset_config[2]), .sel_chip(sel_chip), .sel_slow(sel_slow), .sel_kick(sel_kick), diff --git a/src/misc/video_analyzer.v b/src/misc/video_analyzer.v index 5fdf311..2bde2a5 100644 --- a/src/misc/video_analyzer.v +++ b/src/misc/video_analyzer.v @@ -10,7 +10,7 @@ module video_analyzer input clk, input hs, input vs, - + output reg pal, // pal mode detected output reg vreset ); @@ -46,9 +46,13 @@ always @(posedge clk) begin if(!vs && vsD) begin // check if image height has changed during last cycle vcntL <= vcnt; - if(vcntL != vcnt) + if(vcntL != vcnt) begin + if(vcnt == 11'd525) pal <= 1'b0; + if(vcnt == 11'd625) pal <= 1'b1; + changed <= 1'b1; - + end + vcnt <= 0; end else diff --git a/src/tang/nano20k/top.sv b/src/tang/nano20k/top.sv index 825393b..7766f57 100644 --- a/src/tang/nano20k/top.sv +++ b/src/tang/nano20k/top.sv @@ -20,6 +20,8 @@ + get phi/reset working - make Minimig use gated 28Mhz - use unified mouse counter + - reduce mouse event speed + + implement NTSC CHANGES: - remove userio @@ -102,7 +104,8 @@ module top( wire [5:0] leds; -assign leds[5] = 1'b0; +assign leds[5:4] = 2'b00; +assign leds[3] = |sd_rd; assign leds_n = ~leds; // ============================== clock generation =========================== @@ -381,6 +384,18 @@ wire [15:0] sdram_dout; // TODO: latch data assign ram_din = sdram_dout; +wire [1:0] osd_chipmem = 2'd0; // 512k chip (0=512k, 1=1M, 2=1.5M, 3=2M) +wire [1:0] osd_slowmem = 2'd1; // 512k slow (0=None, 1=512k, 2=1M, 3=1.5M) +wire [1:0] osd_floppies = 2'd0; // one floppy drive +wire osd_fturbo = 1'd1; // floppy turbo on +wire [1:0] osd_chipset = 2'd2; // 0=OCS-A500, 1=OCS-A1000, 2=ECS +wire osd_video = 1'd0; // PAL (0=PAL, 1=NTSC) + +// pack config values into minimig config +wire [2:0] chipset_config = { osd_chipset,osd_video }; +wire [3:0] memory_config = { osd_slowmem, osd_chipmem }; +wire [2:0] floppy_config = { osd_floppies, osd_fturbo }; + Minimig1 MINIMIG1 ( // m68k pins @@ -408,6 +423,11 @@ Minimig1 MINIMIG1 .clk(clk_7m), // system clock (7.09379 MHz) .clk28m(clk_28m), // 28.37516 MHz clock + // system configuration + .chipset_config(3'b100), // ecs, a500 (!a1k), pal + .memory_config(4'b0100), // 512k chip + 512k slow + .floppy_config(3'b011), // two floppy drives, unused, speed 0 + // rs232 pins are connected to the pins used for MIDI on Atari ST // connecting a USB UART adapter here allows to e.g. control DiagROM from a PC .rxd(midi_in), // rs232 receive @@ -538,8 +558,6 @@ wire flash_busy; // once the copy counter has run to zero, all rom has been copied wire rom_done = (word_count == 0); -assign leds[4] = !pll_lock; -assign leds[3] = !mem_ready; assign leds[2] = !rom_done; reg [21:0] flash_ram_addr; @@ -690,11 +708,12 @@ end wire [2:0] tmds; wire tmds_clock; -wire vreset; +wire vreset, vpal; video_analyzer video_analyzer ( .clk ( clk_28m ), .hs ( hs_n ), .vs ( vs_n ), + .pal ( vpal ), .vreset ( vreset ) ); @@ -710,6 +729,7 @@ hdmi #( .tmds(tmds), .tmds_clock(tmds_clock), + .pal_mode(vpal), .reset(vreset), // signal to synchronize HDMI .rgb( { video_red, 2'b00, video_green, 2'b00, video_blue, 2'b00 } )