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drm: exynos: Add a pixel clock to support Vu5A

To support Vu5A, a pixel clock, 33.9MHz is needed.
But, there is no exact hdmi phy table of exynos5422,
so the cloest table will be used as a workaround.

- Vu5A timing
Detailed mode: Clock 33.900 MHz, 476 mm x 268 mm
                800  844  932 1056 hborder 0
                480  483  489  535 vborder 0
               +hsync +vsync

Change-Id: Ia361526ecbcf83c714ccef62f878f5f665a4caa0
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Joy Cho
Joy Cho committed Apr 17, 2018
1 parent b8aafc4 commit 6cb93b55deffdd634a0a114384da2f238493af6d
Showing with 14 additions and 0 deletions.
  1. +14 −0 drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -445,6 +445,20 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
0x54, 0x80, 0x25, 0x01, 0x00, 0x00, 0x01, 0x80,
},
},
/*
* To support Vu5A, pixel clock 33.9MHz is needed
* but we don't have the exact HDMI PHY table
* so as a workaround, the closest table will be used.
*/
{
.pixel_clock = 33900000,
.conf = {
0x01, 0x51, 0x28, 0x55, 0x44, 0x40, 0x00, 0xC8,
0x02, 0xC8, 0xF0, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
0x54, 0x80, 0x25, 0x01, 0x00, 0x00, 0x01, 0x80,
},
},
{
.pixel_clock = 36000000,
.conf = {

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