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missed an adjustment for cache clear lines

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commit 97643da9462c74cb25717234b0f20ec81252b724 1 parent ea46632
@hcs64 authored
Showing with 16 additions and 7 deletions.
  1. +15 −7 buffer.as
  2. +1 −0  newdlist.as
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22 buffer.as
@@ -577,15 +577,15 @@ function tile_cache_update_set()
ora cmd_start
tay
- ldx cmd_lines
+ lda cmd_lines
if (carry)
{
- txa
adc #7 // +1
- tax
}
+ tax
+
lda tile_cache_update_set_jmptab_0, X
sta tmp_addr+0
lda tile_cache_update_set_jmptab_1, X
@@ -716,15 +716,15 @@ function tile_cache_update_clr()
ora cmd_start
tay
- ldx cmd_lines
+ lda cmd_lines
if (carry)
{
- txa
adc #7 // +1
- tax
}
+ tax
+
lda tile_cache_update_clr_jmptab_0, X
sta tmp_addr+0
lda tile_cache_update_clr_jmptab_1, X
@@ -906,7 +906,15 @@ function noreturn tile_cache_remove_lines()
ora cmd_start
tay
- ldx cmd_lines
+ lda cmd_lines
+
+ if (carry)
+ {
+ adc #7 // +1
+ }
+
+ tax
+
lda tile_cache_remove_lines_jmptab_0, X
sta tmp_addr+0
lda tile_cache_remove_lines_jmptab_1, X
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1  newdlist.as
@@ -1108,6 +1108,7 @@ function cmd_tile_cache_write()
cmd_tcwl_1_100:
copy_cache_byte_100(0)
+ finalize_command()
}
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