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range-sensitive updates

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1 parent f98b0dd commit a2c09f97062f302b11dc30fa8ffb0e0695b0405b @hcs64 committed Jan 25, 2012
Showing with 399 additions and 61 deletions.
  1. +4 −0 Makefile
  2. +137 −54 buffer.as
  3. +5 −3 mem.as
  4. +217 −4 newdlist.as
  5. +36 −0 updaterange.py
View
4 Makefile
@@ -8,6 +8,7 @@ vector.as
PREGEN = \
advancetab.bin \
rangetab.bin \
+updaterange.bin \
codegen.as
IMAGES =
@@ -29,6 +30,9 @@ advancetab.bin: advancetab.py
rangetab.bin: rangetab.py
$(PYTHON) rangetab.py
+updaterange.bin: updaterange.py
+ $(PYTHON) updaterange.py
+
codegen.as: codegen.py
$(PYTHON) codegen.py > codegen.as
View
191 buffer.as
@@ -1,5 +1,34 @@
// mechanism for keeping track of double buffered tiles
+#align 256
+updaterangetab:
+#incbin "updaterange.bin"
+
+rangetab:
+#incbin "rangetab.bin"
+
+byte tile_cache_tab_0[8] = {
+ lo(tile_cache_0),
+ lo(tile_cache_1),
+ lo(tile_cache_2),
+ lo(tile_cache_3),
+ lo(tile_cache_4),
+ lo(tile_cache_5),
+ lo(tile_cache_6),
+ lo(tile_cache_7),
+}
+
+byte tile_cache_tab_1[8] = {
+ hi(tile_cache_0),
+ hi(tile_cache_1),
+ hi(tile_cache_2),
+ hi(tile_cache_3),
+ hi(tile_cache_4),
+ hi(tile_cache_5),
+ hi(tile_cache_6),
+ hi(tile_cache_7),
+}
+
function init_tracktiles()
{
// clear
@@ -29,6 +58,7 @@ function init_tracktiles()
sta tile_cache_5, X
sta tile_cache_6, X
sta tile_cache_7, X
+ sta tile_cache_dirty_range, X
} while (not zero)
// init free list
@@ -53,25 +83,26 @@ function init_tracktiles()
inline tracktiles_finish_frame0(count, page)
{
ldx #count
- do {
+
+finish_loop:
dex
lda tile_status+page, X
- beq no_finish_needed
+ beq no_finish_halfway
bmi finish_cache
// never need to update if it wasn't touched previous frame
bit other_frame_mask
- beq no_finish_needed
+ beq no_finish_halfway
eor other_frame_mask
sta tile_status+page, X
// never need to update if it was touched already this frame
bit this_frame_mask
- bne no_finish_needed
+ bne no_finish_halfway
stx tmp_byte2
tay
@@ -99,27 +130,22 @@ inline tracktiles_finish_frame0(count, page)
cmd_tile_copy()
jmp finish_finished
+no_finish_halfway:
+ cpx #0
+ bne finish_loop
+ jmp finish_loop_end
+
finish_cache:
- // TODO: range logic
and #CACHE_LINE_MASK
tay
lda tile_cache_list, Y
+
+ sta tmp_byte
- bit other_frame_mask
- beq no_clear_other
-
- eor other_frame_mask
- sta tile_cache_list, Y
- jmp do_from_cache
-
-no_clear_other:
-
- bit this_frame_mask
+ and #(DIRTY_FRAME_0|DIRTY_FRAME_1)
beq no_finish_needed
-do_from_cache:
-
stx tmp_byte2
// prepare an address
@@ -135,15 +161,46 @@ do_from_cache:
sta cmd_addr+1
sty cmd_cache_start
+
+ lda tmp_byte
+ bit other_frame_mask
+ beq finish_cache_do_this_frame
+
+ // write the whole tile (needed due to other frame's activity)
+ eor other_frame_mask
+ sta tile_cache_list, Y
+
+ lda #0
+ sta tile_cache_dirty_range, Y
+
cmd_tile_cache_write()
+ jmp finish_finished
+
+finish_cache_do_this_frame:
+ // write only lines touched in this frame
+
+ ldx tile_cache_dirty_range, Y
+ lda updaterangetab, X
+ sta cmd_lines
+ lda updaterangetab+0x100, X
+ sta cmd_start
+
+ lda #0
+ sta tile_cache_dirty_range, Y
+
+ cmd_tile_cache_write_lines()
finish_finished:
ldx tmp_byte2
no_finish_needed:
cpx #0
- } while (not equal)
+ beq finish_loop_end
+ jmp finish_loop
+
+finish_loop_end:
+ nop
}
function tracktiles_finish_frame()
@@ -221,19 +278,27 @@ inline add_prim_cached(page)
bne add_cached_copy
add_cached_update:
- tile_cache_update_set()
// write back only the changed lines
- // TODO: set range
+ lda cmd_lines
+ asl A
+ asl A
+ asl A
+ ora cmd_start
+ tax
+ lda rangetab-8, X
+ ora tile_cache_dirty_range, Y
+ sta tile_cache_dirty_range, Y
+
+ tile_cache_update_set()
rts
add_cached_copy:
- stx cmd_cache_start
+ // write the whole block
+ lda #$FF
+ sta tile_cache_dirty_range, Y
tile_cache_update_set()
-
- // write the whole block
- // TODO: set range
rts
}
@@ -301,6 +366,16 @@ try_add_cache:
ora #1
sta tile_cache_list, Y
+ // set dirty range
+ lda cmd_lines
+ asl A
+ asl A
+ asl A
+ ora cmd_start
+ tax
+ lda rangetab-8, X
+ sta tile_cache_dirty_range, Y
+
tile_cache_add_lines()
}
rts
@@ -377,10 +452,27 @@ remove_cached_update:
if (zero)
{
- // TODO: only clear active range
- cmd_tile_clear()
+ // update dirty range with current clear
+ lda cmd_lines
+ asl A
+ asl A
+ asl A
+ ora cmd_start
+ tay
+ lda rangetab-8, Y
+ ora tile_cache_dirty_range, X
+ tay
+
+ // clear active range
+ lda updaterangetab, Y
+ sta cmd_lines
+ lda updaterangetab+0x100, Y
+ sta cmd_start
+
+ cmd_clr_lines()
evict_from_cache:
+
ldx tmp_byte
lda tile_status+page, X
and #CACHE_LINE_MASK
@@ -398,16 +490,29 @@ evict_from_cache:
ldy tile_cache_free_ptr
+ lda #0
+ sta tile_cache_dirty_range, Y
+
tile_cache_remove_lines()
rts
}
txa
tay
- tile_cache_update_clr()
- // TODO: set range
+ // mark updated lines
+ lda cmd_lines
+ asl A
+ asl A
+ asl A
+ ora cmd_start
+ tax
+ lda rangetab-8, X
+ ora tile_cache_dirty_range, Y
+ sta tile_cache_dirty_range, Y
+
+ tile_cache_update_clr()
rts
@@ -428,11 +533,12 @@ remove_cached_copy:
txa
tay
- sty cmd_cache_start
- tile_cache_update_clr()
+ // update entire tile
+ lda #$FF
+ sta tile_cache_dirty_range, Y
- // TODO: set range
+ tile_cache_update_clr()
rts
@@ -903,26 +1009,3 @@ byte tile_cache_remove_lines_jmptab_1[9] = {
hi(tile_cache_remove),
}
-#align 256
-byte tile_cache_tab_0[8] = {
- lo(tile_cache_0),
- lo(tile_cache_1),
- lo(tile_cache_2),
- lo(tile_cache_3),
- lo(tile_cache_4),
- lo(tile_cache_5),
- lo(tile_cache_6),
- lo(tile_cache_7),
-}
-
-byte tile_cache_tab_1[8] = {
- hi(tile_cache_0),
- hi(tile_cache_1),
- hi(tile_cache_2),
- hi(tile_cache_3),
- hi(tile_cache_4),
- hi(tile_cache_5),
- hi(tile_cache_6),
- hi(tile_cache_7),
-}
-
View
8 mem.as
@@ -41,6 +41,7 @@ byte dlist_orig_S
byte dlist_data_read
byte dlist_data_write
+#tell.bankoffset
word cmd_addr
byte cmd_start
byte cmd_cache_start
@@ -102,16 +103,17 @@ byte zp_immed_7[5] // NN ; sta $2007 ; rts
#ram.end
-#ram.org 0x100, 0x60
+#ram.org 0x100, 0xa0
// stack
byte stack[0x20]
stack_end:
byte tile_cache_4[TILE_CACHE_ELEMENTS]
+byte tile_cache_dirty_range[TILE_CACHE_ELEMENTS]
#ram.end
-#ram.org 0x182, 0x7E
-byte dlist[0x7E]
+#ram.org 0x1a0, 0x60
+byte dlist[0x60]
#ram.end
#ram.org 0x200, 0x300
View
221 newdlist.as
@@ -28,9 +28,6 @@ zp_writer_rom_end:
advancetab:
#incbin "advancetab.bin" // first 0x100 is +1, up to +3
-rangetab:
-#incbin "rangetab.bin"
-
#include "codegen.as"
byte bytes_to_rows[10] = {
@@ -187,7 +184,22 @@ retry_add:
cpy dlist_next_cmd_read
bne enough_space
cpy dlist_cmd_end
- bne retry_add
+ beq enough_space
+
+
+ lda #0
+ sta nmi_hit
+ do
+ {
+ lda nmi_hit
+ } while (zero)
+
+ lda dlist_reset_cycles
+ if (not zero)
+ {
+ inc_16(stuck_cnt)
+ }
+ jmp retry_add
enough_space:
sty dlist_cmd_end
@@ -314,6 +326,12 @@ inline copy_cache_byte_of_8(cache_page, line)
sta dlist_data_0+( ( (1+line) - ( ( (1+line) / 3) * 3))*0x100)+( (1+line)/3), X
}
+inline copy_cache_byte(cache_page, line)
+{
+ lda cache_page, Y
+ sta dlist_data_0+( ( (2+line) - ( ( (2+line) / 3) * 3))*0x100)+( (2+line)/3), X
+}
+
// ******** commands
function cmd_tile_clear()
{
@@ -1083,6 +1101,201 @@ function cmd_tile_cache_write()
cmd_advance(3)
}
+
+function cmd_tile_cache_write_lines()
+{
+ ldy cmd_lines
+ cpy #8
+
+ beq cmd_tile_cache_write
+
+#tell.bankoffset
+ lda cmd_set_lines_tab_0-1, Y
+ ldx cmd_set_lines_tab_1-1, Y
+
+ add_command()
+
+ store_line_address()
+
+ ldy cmd_start
+ lda cmd_tile_cache_write_lines_jmptab_0, Y
+ sta tmp_addr+0
+ lda cmd_tile_cache_write_lines_jmptab_1, Y
+ sta tmp_addr+1
+
+ lda cmd_lines
+ sta tmp_byte
+
+ ldy cmd_cache_start
+
+ jmp [tmp_addr]
+
+ cmd_tcwl_0:
+ copy_cache_byte(tile_cache_0, 0)
+ dec tmp_byte
+ beq cmd_tcwl_0_end
+
+ copy_cache_byte(tile_cache_1, 1)
+ dec tmp_byte
+ beq cmd_tcwl_0_end
+
+ copy_cache_byte(tile_cache_2, 2)
+ dec tmp_byte
+ beq cmd_tcwl_0_end
+
+ copy_cache_byte(tile_cache_3, 3)
+ dec tmp_byte
+ beq cmd_tcwl_0_end
+
+ copy_cache_byte(tile_cache_4, 4)
+ dec tmp_byte
+ beq cmd_tcwl_0_end
+
+ copy_cache_byte(tile_cache_5, 5)
+ dec tmp_byte
+ beq cmd_tcwl_0_end
+
+ copy_cache_byte(tile_cache_6, 6)
+
+ cmd_tcwl_0_end:
+ cmd_advance_lines()
+ rts
+
+ cmd_tcwl_1:
+ copy_cache_byte(tile_cache_1, 0)
+ dec tmp_byte
+ beq cmd_tcwl_1_end
+
+ copy_cache_byte(tile_cache_2, 1)
+ dec tmp_byte
+ beq cmd_tcwl_1_end
+
+ copy_cache_byte(tile_cache_3, 2)
+ dec tmp_byte
+ beq cmd_tcwl_1_end
+
+ copy_cache_byte(tile_cache_4, 3)
+ dec tmp_byte
+ beq cmd_tcwl_1_end
+
+ copy_cache_byte(tile_cache_5, 4)
+ dec tmp_byte
+ beq cmd_tcwl_1_end
+
+ copy_cache_byte(tile_cache_6, 5)
+ dec tmp_byte
+ beq cmd_tcwl_1_end
+
+ copy_cache_byte(tile_cache_7, 6)
+
+ cmd_tcwl_1_end:
+ cmd_advance_lines()
+ rts
+
+ cmd_tcwl_2:
+ copy_cache_byte(tile_cache_2, 0)
+ dec tmp_byte
+ beq cmd_tcwl_2_end
+
+ copy_cache_byte(tile_cache_3, 1)
+ dec tmp_byte
+ beq cmd_tcwl_2_end
+
+ copy_cache_byte(tile_cache_4, 2)
+ dec tmp_byte
+ beq cmd_tcwl_2_end
+
+ copy_cache_byte(tile_cache_5, 3)
+ dec tmp_byte
+ beq cmd_tcwl_2_end
+
+ copy_cache_byte(tile_cache_6, 4)
+ dec tmp_byte
+ beq cmd_tcwl_2_end
+
+ copy_cache_byte(tile_cache_7, 5)
+
+ cmd_tcwl_2_end:
+ cmd_advance_lines()
+ rts
+
+ cmd_tcwl_3:
+ copy_cache_byte(tile_cache_3, 0)
+ dec tmp_byte
+ beq cmd_tcwl_3_end
+
+ copy_cache_byte(tile_cache_4, 1)
+ dec tmp_byte
+ beq cmd_tcwl_3_end
+
+ copy_cache_byte(tile_cache_5, 2)
+ dec tmp_byte
+ beq cmd_tcwl_3_end
+
+ copy_cache_byte(tile_cache_6, 3)
+ dec tmp_byte
+ beq cmd_tcwl_3_end
+
+ copy_cache_byte(tile_cache_7, 4)
+
+ cmd_tcwl_3_end:
+ cmd_advance_lines()
+ rts
+
+ cmd_tcwl_4:
+ copy_cache_byte(tile_cache_4, 0)
+ dec tmp_byte
+ beq cmd_tcwl_4_end
+
+ copy_cache_byte(tile_cache_5, 1)
+ dec tmp_byte
+ beq cmd_tcwl_4_end
+
+ copy_cache_byte(tile_cache_6, 2)
+ dec tmp_byte
+ beq cmd_tcwl_4_end
+
+ copy_cache_byte(tile_cache_7, 3)
+
+ cmd_tcwl_4_end:
+ cmd_advance_lines()
+ rts
+
+ cmd_tcwl_5:
+ copy_cache_byte(tile_cache_5, 0)
+ dec tmp_byte
+ beq cmd_tcwl_5_end
+
+ copy_cache_byte(tile_cache_6, 1)
+ dec tmp_byte
+ beq cmd_tcwl_5_end
+
+ copy_cache_byte(tile_cache_7, 2)
+
+ cmd_tcwl_5_end:
+ cmd_advance_lines()
+ rts
+
+ cmd_tcwl_6:
+ copy_cache_byte(tile_cache_6, 0)
+ dec tmp_byte
+ beq cmd_tcwl_6_end
+
+ copy_cache_byte(tile_cache_7, 1)
+
+ cmd_tcwl_6_end:
+ cmd_advance_lines()
+ rts
+
+ cmd_tcwl_7:
+ copy_cache_byte(tile_cache_7, 0)
+ cmd_advance(1)
+}
+
+byte cmd_tile_cache_write_lines_jmptab_0[8] = { lo(cmd_tcwl_0), lo(cmd_tcwl_1), lo(cmd_tcwl_2), lo(cmd_tcwl_3), lo(cmd_tcwl_4), lo(cmd_tcwl_5), lo(cmd_tcwl_6), lo(cmd_tcwl_7), }
+
+byte cmd_tile_cache_write_lines_jmptab_1[8] = { hi(cmd_tcwl_0), hi(cmd_tcwl_1), hi(cmd_tcwl_2), hi(cmd_tcwl_3), hi(cmd_tcwl_4), hi(cmd_tcwl_5), hi(cmd_tcwl_6), hi(cmd_tcwl_7), }
+
function dlist_finish_frame()
{
lda #lo(rt_finish_frame_cycles)
View
36 updaterange.py
@@ -0,0 +1,36 @@
+#!/usr/bin/python
+
+from struct import pack
+from io import open
+
+outfile = open("updaterange.bin", 'wb')
+
+lengths = []
+starts = []
+# convert sparse to solid ranges
+for bf in range(0,256):
+ first = 0
+ for i in range(0,8):
+ if bf&(1<<i):
+ first = i
+ break
+
+ last = -1
+ for i in range(7,-1,-1):
+ if bf&(1<<i):
+ last = i
+ break
+
+ length = 1+last-first
+ lengths.append(length)
+ starts.append(first)
+ #mask = (1<<length)-1
+ #outfile.write(pack("B", (mask << first)&0xFF))
+
+# 000-0ff: lengths
+for i in range(0,256):
+ outfile.write(pack("B", lengths[i]))
+
+# 100-1ff: starts (from right)
+for i in range(0,256):
+ outfile.write(pack("B", starts[i]))

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