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base fork: hcs64/Nestify
base: f9cb9ca6f7
...
head fork: hcs64/Nestify
compare: ae724b4e51
  • 2 commits
  • 4 files changed
  • 0 commit comments
  • 1 contributor
Showing with 44 additions and 23 deletions.
  1. +28 −15 dlist.as
  2. +6 −1 mem.as
  3. +4 −3 test.as
  4. +6 −4 vector.as
View
43 dlist.as
@@ -1,6 +1,6 @@
// display list stuff
-#define MAX_VBLANK_CYCLES 2000
+#define MAX_VBLANK_CYCLES 2120
// 62 cycles
zp_writer_rom:
@@ -128,7 +128,14 @@ inline check_reset_cycles()
lsr dlist_reset_cycles
if (carry)
{
- assign_16i(dlist_cycles_left, MAX_VBLANK_CYCLES)
+ // reset, subtract time of last command that was never exposed
+ sec
+ lda #lo(MAX_VBLANK_CYCLES)
+ sbc last_cmd_cycles
+ sta dlist_cycles_left+0
+ lda #hi(MAX_VBLANK_CYCLES)
+ sbc #0
+ sta dlist_cycles_left+1
}
}
@@ -208,10 +215,14 @@ space_for_wrap:
out_of_space:
- //inc_16(stuck_cnt)
-
wait_for_interruption()
+ lda dlist_reset_cycles
+ if (not zero)
+ {
+ inc_16(stuck_cnt)
+ }
+
jmp check_for_space_and_cycles
exactly_at_dlist_start:
@@ -248,6 +259,10 @@ inline finalize_command()
lda #$0 // BRK
tay
sta [dlist_next_byte], Y
+
+ // no advance, we will be overwriting that BRK later
+ lda cmd_cycles
+ sta last_cmd_cycles
}
inline finalize_prev_command()
@@ -256,8 +271,6 @@ inline finalize_prev_command()
ldy #$0
lda dlist_cmd_first_inst_byte
sta [dlist_cmd_first_inst_addr], Y
-
- // no advance, we will be overwriting that BRK later
}
function finalize_dlist()
@@ -476,6 +489,9 @@ function sendchr_finish_frame()
function process_dlist()
{
sec // flag to know whether we've run an incomplete dlist
+
+ ppu_ctl1_assign(#0) // disable rendering until we're done
+
jmp dlist_start_jmp
// this will ultimately be returned by an RTS in the IRQ handler
@@ -487,6 +503,9 @@ inline process_dlist_complete()
// get rid of saved flags
pla
+ vram_clear_address()
+ ppu_ctl1_assign(#CR_BACKVISIBLE) // reenable rendering
+
// back up to one past the BRK, if this was a complete dlist
ldx #1
@@ -499,14 +518,12 @@ inline process_dlist_complete()
// back up to where the BRK was
ldx #2
- //inc_16(incomplete_vblanks)
+ inc_16(incomplete_vblanks)
}
- /*
else
{
inc_16(complete_vblanks)
}
- */
stx irq_temp
pla
@@ -788,9 +805,7 @@ byte cmd_set_lines_cycles[8] = {
function cmd_set_lines()
{
- //
- lda cmd_lines
- tax
+ ldx cmd_lines
lda cmd_set_lines_bytes-1, X
sta cmd_size
lda cmd_set_lines_cycles-1, X
@@ -891,9 +906,7 @@ byte cmd_clr_lines_cycles[8] = {
function cmd_clr_lines()
{
- //
- lda cmd_lines
- tax
+ ldx cmd_lines
lda cmd_clr_lines_bytes-1, X
sta cmd_size
lda cmd_clr_lines_cycles-1, X
View
7 mem.as
@@ -15,6 +15,10 @@ byte nmi_temp
// always set by NMI, use to check if ops could be interrupted
byte nmi_hit
+
+word incomplete_vblanks
+word complete_vblanks
+word stuck_cnt
#ram.end
#ram.org 0x10, 0x20
@@ -32,6 +36,7 @@ byte count_mask_zp
byte cur_nametable_page
// small dlist stuff
+#tell.bankoffset
word dlist_cycles_left
byte dlist_reset_cycles
@@ -53,9 +58,9 @@ byte cmd_byte[8]
// only check_for_space_and_cycles() uses these
byte cmd_size // reused for operation line range
byte cmd_cycles
+byte last_cmd_cycles
#define TILE_CACHE_USED_SIZE 4 // 31 bits
-#tell.bankoffset
byte tile_cache_used[TILE_CACHE_USED_SIZE]
//
View
7 test.as
@@ -37,7 +37,7 @@ interrupt.nmi int_nmi()
pha
lda PPU.STATUS
- ppu_ctl1_assign(#0)
+ //ppu_ctl1_assign(#0)
lda #1
sta nmi_hit
@@ -45,8 +45,9 @@ interrupt.nmi int_nmi()
process_dlist()
// done with PPU stuff
- vram_clear_address()
- ppu_ctl1_assign(#CR_BACKVISIBLE)
+#tell.bankoffset
+ //vram_clear_address()
+ //ppu_ctl1_assign(#CR_BACKVISIBLE)
pla
tay
View
10 vector.as
@@ -320,8 +320,9 @@ inline bresenham_down_fcn(cmd_fcn, empty_row) {
if (equal)
{
// is this block new already?
- lda cmd_lines
- if (not zero)
+ lda cmd_byte+7
+ cmp #empty_row
+ if (not equal)
{
// send this block
ldx line_block+0
@@ -367,8 +368,9 @@ inline bresenham_up_fcn(cmd_fcn, empty_row) {
if (minus)
{
// is this block new already?
- lda cmd_lines
- if (not zero)
+ lda cmd_byte
+ cmp #empty_row
+ if (not equal)
{
// send this block
ldx line_block+0

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