forbidden.conf

# The Armv8 Application Level Memory Model.
#
# This is a machine-readable, executable and formal artefact, which aims to
# generate systematic families of litmus tests which are forbidden by the Arm
# memory model.
# If you have comments on the content of this file, please send an email to
# jade.alglave@arm.com, referring to version number:
# 9470edab1356b1d824422808bf681d59529e8b91
#
# For the executable formal Armv memory model, see:
# https://developer.arm.com/architectures/cpu-architecture/a-profile/memory-model-tool
# For a textual version of the model, see section B2.3 of the Armv8 ARM:
# https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile
#
# Author: Will Deacon <will.deacon@arm.com>
# Author: Jade Alglave <jade.alglave@arm.com>
#
# Copyright (C) 2016-2020, Arm Ltd.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met:
#
#     * Redistributions of source code must retain the above copyright
#       notice, this list of conditions and the following disclaimer.
#     * Redistributions in binary form must reproduce the above copyright
#       notice, this list of conditions and the following disclaimer in
#       the documentation and/or other materials provided with the
#       distribution.
#     * Neither the name of ARM nor the names of its contributors may be
#       used to endorse or promote products derived from this software
#       without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
# PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
# TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-arch AArch64

-nprocs 2

-size 8

-name Armv8-ext-forbidden

-relaxlist Rfe Fre Wse Hat DpAddrdR DpAddrdW DpAddrsR DpAddrsW DpDatadW DpDatasW DpCtrldW DpCtrlsW DpCtrlIsbdR [DpAddrdR, ISBd*R] [DpAddrdW, ISBd*R] DpCtrlIsbsR [DpAddrsR, ISBs*R] [DpAddrsW, ISBs*R] [DpAddrsR, ISBd*R] [DpAddrsW, ISBd*R] [DpAddrdR, ISBs*R] [DpAddrdW, ISBs*R] [DpAddrdR, Pod*W] [DpAddrdW, Pod*W] [DpAddrsR, Pos*W] [DpAddrsW, Pos*W] [DpAddrsR, Pod*W] [DpAddrsW, Pod*W] [DpAddrdR, Pos*W] [DpAddrdW, Pos*W] [DpAddrdW, Rfi] [DpDatadW, Rfi] [DpAddrsW, Rfi] [DpDatasW, Rfi] DMB.SYd** DMB.SYs** PodWRLA PosWRLA DMB.LDdR* DMB.LDsR* PodR*AP PodR*QP PosR*AP PosR*QP PodRRAA PodRRQA PosRRAA PosRRQA PodRRAQ PodRRQQ PosRRAQ PosRRQQ PodRWAL PodRWQL PosRWAL PosRWQL DMB.STdWW DMB.STsWW Pod*WPL Pos*WPL PodWWLL PosWWLL Pos*W LxSx LxSxAP LxSxPL LxSxAL [LxSx, RfiPA] [LxSx, RfiPQ] [LxSxAP, RfiPA] [LxSxAP, RfiPQ] [LxSxPL, RfiLA] [LxSxPL, RfiLQ] [LxSxAL, RfiLA] [LxSxAL, RfiLQ] Amo.Swp Amo.Cas Amo.LdAdd Amo.LdEor Amo.LdClr Amo.LdSet Amo.StAdd Amo.StEor Amo.StClr Amo.StSet Amo.SwpAP Amo.CasAP Amo.LdAddAP Amo.LdEorAP Amo.LdClrAP Amo.LdSetAP Amo.SwpPL Amo.CasPL Amo.LdAddPL Amo.LdEorPL Amo.LdClrPL Amo.LdSetPL Amo.StAddPL Amo.StEorPL Amo.StClrPL Amo.StSetPL Amo.SwpAL Amo.CasAL Amo.LdAddAL Amo.LdEorAL Amo.LdClrAL Amo.LdSetAL [Amo.Swp, RfiPA] [Amo.Cas, RfiPA] [Amo.LdAdd, RfiPA] [Amo.LdEor, RfiPA] [Amo.LdClr, RfiPA] [Amo.LdSet, RfiPA] [Amo.StAdd, RfiPA] [Amo.StEor, RfiPA] [Amo.StClr, RfiPA] [Amo.StSet, RfiPA] [Amo.Swp, RfiPQ] [Amo.Cas, RfiPQ] [Amo.LdAdd, RfiPQ] [Amo.LdEor, RfiPQ] [Amo.LdClr, RfiPQ] [Amo.LdSet, RfiPQ] [Amo.StAdd, RfiPQ] [Amo.StEor, RfiPQ] [Amo.StClr, RfiPQ] [Amo.StSet, RfiPQ] [Amo.SwpAP, RfiPA] [Amo.CasAP, RfiPA] [Amo.LdAddAP, RfiPA] [Amo.LdEorAP, RfiPA] [Amo.LdClrAP, RfiPA] [Amo.LdSetAP, RfiPA] [Amo.SwpAP, RfiPQ] [Amo.CasAP, RfiPQ] [Amo.LdAddAP, RfiPQ] [Amo.LdEorAP, RfiPQ] [Amo.LdClrAP, RfiPQ] [Amo.LdSetAP, RfiPQ] [Amo.SwpPL, RfiLA] [Amo.CasPL, RfiLA] [Amo.LdAddPL, RfiLA] [Amo.LdEorPL, RfiLA] [Amo.LdClrPL, RfiLA] [Amo.LdSetPL, RfiLA] [Amo.StAddPL, RfiLA] [Amo.StEorPL, RfiLA] [Amo.StClrPL, RfiLA] [Amo.StSetPL, RfiLA] [Amo.SwpPL, RfiLQ] [Amo.CasPL, RfiLQ] [Amo.LdAddPL, RfiLQ] [Amo.LdEorPL, RfiLQ] [Amo.LdClrPL, RfiLQ] [Amo.LdSetPL, RfiLQ] [Amo.StAddPL, RfiLQ] [Amo.StEorPL, RfiLQ] [Amo.StClrPL, RfiLQ] [Amo.StSetPL, RfiLQ] [Amo.SwpAL, RfiLA] [Amo.CasAL, RfiLA] [Amo.LdAddAL, RfiLA] [Amo.LdEorAL, RfiLA] [Amo.LdClrAL, RfiLA] [Amo.LdSetAL, RfiLA] [Amo.SwpAL, RfiLQ] [Amo.CasAL, RfiLQ] [Amo.LdAddAL, RfiLQ] [Amo.LdEorAL, RfiLQ] [Amo.LdClrAL, RfiLQ] [Amo.LdSetAL, RfiLQ] [Pod**, Amo.SwpAL] [Pod**, Amo.CasAL] [Pod**, Amo.LdAddAL] [Pod**, Amo.LdEorAL] [Pod**, Amo.LdClrAL] [Pod**, Amo.LdSetAL] [Pos**, Amo.SwpAL] [Pos**, Amo.CasAL] [Pos**, Amo.LdAddAL] [Pos**, Amo.LdEorAL] [Pos**, Amo.LdClrAL] [Pos**, Amo.LdSetAL] [Amo.SwpAL, Pod**] [Amo.CasAL, Pod**] [Amo.LdAddAL, Pod**] [Amo.LdEorAL, Pod**] [Amo.LdClrAL, Pod**] [Amo.LdSetAL, Pod**] [Amo.SwpAL, Pos**] [Amo.CasAL, Pos**] [Amo.LdAddAL, Pos**] [Amo.LdEorAL, Pos**] [Amo.LdClrAL, Pos**] [Amo.LdSetAL, Pos**] [Pod**, Amo.SwpAL, Pod**] [Pod**, Amo.CasAL, Pod**] [Pod**, Amo.LdAddAL, Pod**] [Pod**, Amo.LdEorAL, Pod**] [Pod**, Amo.LdClrAL, Pod**] [Pod**, Amo.LdSetAL, Pod**] [Pos**, Amo.SwpAL, Pos**] [Pos**, Amo.CasAL, Pos**] [Pos**, Amo.LdAddAL, Pos**] [Pos**, Amo.LdEorAL, Pos**] [Pos**, Amo.LdClrAL, Pos**] [Pos**, Amo.LdSetAL, Pos**]